ON MAC15-8G Triacs silicon bidirectional thyristor Datasheet

MAC15 Series
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed primarily for full-wave ac control applications, such as
solid−state relays, motor controls, heating controls and power
supplies; or wherever full−wave silicon gate controlled solid−state
devices are needed. Triac type thyristors switch from a blocking to a
conducting state for either polarity of applied main terminal voltage
with positive or negative gate triggering.
http://onsemi.com
TRIACS
15 AMPERES RMS
400 thru 800 VOLTS
Features
• Blocking Voltage to 800 V
• All Diffused and Glass Passivated Junctions for Greater Parameter
•
•
•
Uniformity and Stability
Small, Rugged, Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
Gate Triggering Guaranteed in Three Modes (MAC15 Series) or
Four Modes (MAC15A Series)
Pb−Free Packages are Available*
MT2
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Peak Repetitive Off−State Voltage Note 1
(TJ = −40 to +125°C, Sine Wave 50 to 60 Hz,
Gate Open)
MAC15A6
MAC15−8, MAC15A8
MAC15−10, MAC15A10
VDRM,
VRRM
Peak Gate Voltage
(Pulse Width v 1.0 msec; TC = 90°C)
4
Value
Unit
TO−220AB
CASE 221A
STYLE 4
V
400
600
800
1
VGM
10
V
On−State Current RMS; Full Cycle Sine
Wave 50 to 60 Hz (TC = +90°C)
IT(RMS)
15
A
Circuit Fusing Consideration (t = 8.3 ms)
I2t
93
A2s
Peak Non−Repetitive Surge Current (One
Full Cycle Sine Wave, 60 Hz, TC = +80°C)
Preceded and Followed by Rated Current
ITSM
150
A
Peak Gate Power
(TC = +80°C, Pulse Width = 1.0 ms)
PGM
20
W
PG(AV)
0.5
W
Average Gate Power (TC = +80°C, t = 8.3 ms)
MT1
G
2
MAC15xxG
AYWW
3
MAC15xx
xx
A
Y
WW
G
= Specific Device Code
= See Table on Page 2
= Assembly Location
= Year
= Work Week
= Pb−Free Package
PIN ASSIGNMENT
1
Main Terminal 1
Peak Gate Current
(Pulse Width v 1.0 msec; TC = 90°C)
IGM
2.0
A
2
Main Terminal 2
Operating Junction Temperature Range
TJ
−40 to +125
°C
3
Gate
Storage Temperature Range
Tstg
−40 to +150
°C
4
Main Terminal 2
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2008
October, 2008 − Rev. 4
1
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MAC15A4/D
MAC15 Series
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Thermal Resistance, Junction−to−Case
Characteristic
RqJC
2.0
°C/W
Thermal Resistance, Junction−to−Ambient
RqJA
62.5
°C/W
TL
260
°C
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions)
Characteristic
Symbol
Min
Typ
Max
Unit
IDRM,
IRRM
−
−
−
−
10
2.0
mA
mA
Peak On−State Voltage Note 2 (ITM = "21 A Peak)
VTM
−
1.3
1.6
V
Gate Trigger Current (Continuous dc) (VD = 12 Vdc, RL = 100 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
IGT
−
−
−
−
−
−
−
−
50
50
50
75
Gate Trigger Voltage (Continuous dc) (VD = 12 Vdc, RL = 100 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
VGT
−
−
−
−
0.9
0.9
1.1
1.4
2
2
2
2.5
Gate Non−Trigger Voltage (VD = 12 V, RL = 100 W) TJ = 110°C)
MT2(+), G(+); MT2(−), G(−); MT2(+), G(−)
MT2(−), G(+) “A’’ SUFFIX ONLY
VGD
0.2
0.2
−
−
−
−
OFF CHARACTERISTICS
Peak Blocking Current
(VD = Rated VDRM, VRRM; Gate Open)
TJ = 25°C
TJ = 125°C
ON CHARACTERISTICS
mA
V
V
Holding Current (VD = 12 Vdc, Gate Open, Initiating Current = "200 mA)
IH
−
6.0
40
mA
Turn-On Time (VD = Rated VDRM, ITM = 17 A)
(IGT = 120 mA, Rise Time = 0.1 ms, Pulse Width = 2 ms)
tgt
−
1.5
−
ms
dv/dt(c)
−
5.0
−
V/ms
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Commutation Voltage (VD = Rated VDRM, ITM = 21 A,
Commutating di/dt = 7.6 A/ms, Gate Unenergized, TC = 80°C)
2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
ORDERING INFORMATION
Device
Device Marking
Package
MAC15−008
MAC15−8G
TO−220AB
MAC15−8
TO−220AB
(Pb−Free)
MAC15−10
MAC15−10G
TO−220AB
MAC1510
TO−220AB
(Pb−Free)
MAC15A6
MAC15A6G
TO−220AB
MAC15A6
TO−220AB
(Pb−Free)
MAC15A8
MAC15A8G
500 Units Bulk
TO−220AB
MAC15A8
TO−220AB
(Pb−Free)
MAC15A10
MAC15A10G
Shipping
TO−220AB
TO−220AB
(Pb−Free)
MAC15A10
MAC15A10T
TO−220AB
http://onsemi.com
2
50 Units / Rail
MAC15 Series
Voltage Current Characteristic of Triacs
(Bidirectional Device)
+ Current
Symbol
Parameter
VTM
VDRM
Peak Repetitive Forward Off State Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Reverse Off State Voltage
IRRM
Peak Reverse Blocking Current
VTM
Maximum On State Voltage
IH
Holding Current
on state
IRRM at VRRM
IH
Quadrant 3
MainTerminal 2 −
IH
off state
VTM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
(+) MT2
Quadrant II
(+) MT2
(−) IGT
GATE
Quadrant I
(+) IGT
GATE
MT1
MT1
REF
REF
IGT −
+ IGT
(−) MT2
Quadrant III
(−) MT2
Quadrant IV
(+) IGT
GATE
(−) IGT
GATE
MT1
MT1
REF
REF
−
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1.
With in−phase signals (using standard AC lines) quadrants I and III are used.
http://onsemi.com
3
Quadrant 1
MainTerminal 2 +
+ Voltage
IDRM at VDRM
MAC15 Series
20
PAV, AVERAGE POWER (WATTS)
TC, CASE TEMPERATURE (°C)
130
α = 30°
α = 60°
120
α = 90°
110
α = 180°
100
dc
α
90
α
TJ ≈ 125°
α = CONDUCTION ANGLE
80
0
2
4
6
120°
TJ ≈ 125°
16
dc
90°
α
12
60°
α
30°
8 α = CONDUCTION ANGLE
4
0
8
10
12
14
16
0
2
4
6
8
10
12
14
IT(RMS), RMS ON-STATE CURRENT (AMP)
IT(RMS), ON-STATE CURRENT (AMP)
Figure 1. RMS Current Derating
Figure 2. On−State Power Dissipation
1.8
16
50
OFF-STATE VOLTAGE = 12 V
IGT, GATE TRIGGER CURRENT (mA)
VGT, GATE TRIGGER VOLTAGE (VOLTS)
α = 180°
1.6
1.4
QUADRANT 4
1.2
1.0
0.8
QUADRANTS
0.6
0.4
-60
1
2
3
-40
-20
0
20
40
60
80
100
120
OFF-STATE VOLTAGE = 12 V
30
20
10
1
2
QUADRANT 3
7.0
5.0
-60
140
TJ, JUNCTION TEMPERATURE (°C)
4
-40
-20
0
20
40
60
80
100
120
TJ, JUNCTION TEMPERATURE (°C)
Figure 4. Typical Gate Trigger Current
Figure 3. Typical Gate Trigger Voltage
http://onsemi.com
4
140
MAC15 Series
100
20
I H, HOLDING CURRENT (mA)
50
TJ = 25°C
125°C
30
10
7.0
5.0
MAIN TERMINAL #2
POSITIVE
3.0
10
2.0
-60
7
-40
-20
0
20
40
60
80
100
120
140
TJ, JUNCTION TEMPERATURE (°C)
5
Figure 6. Typical Holding Current
3
2
300
1
TSM, PEAK SURGE CURRENT (AMP)
i TM, INSTANTANEOUS FORWARD CURRENT (AMP)
20
GATE OPEN
MAIN TERMINAL #1
POSITIVE
70
0.7
0.5
0.3
0.2
200
100
70
TC = 80°C
Tf = 60 Hz
50
Surge is preceded and followed by rated current
0.1
0.4
30
0.8
1.2
1.6
2
2.4
2.8
3.2
3.6
4
1
4.4
2
3
5
7
vTM, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
NUMBER OF CYCLES
Figure 5. On−State Characteristics
Figure 7. Maximum Non−Repetitive
Surge Current
10
r(t) TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
1
0.5
ZqJC(t) = r(t) • RqJC
0.2
0.1
0.05
0.02
0.01
0.1
0.2
0.5
1
2
5
10
20
50
100
t, TIME (ms)
Figure 8. Thermal Response
http://onsemi.com
5
200
500
1k
2k
5k
10 k
MAC15 Series
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−07
ISSUE O
−T−
B
F
4
Q
T
SEATING
PLANE
C
S
A
U
1 2 3
H
K
Z
R
L
V
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.014
0.022
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
STYLE 4:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.36
0.55
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
MAIN TERMINAL 2
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MAC15A4/D
Similar pages