Sample & Buy Product Folder Support & Community Tools & Software Technical Documents INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 INA12x-HT Precision, Low-Power Instrumentation Amplifiers 1 Features 3 Description • • • • • • 2 Applications The INA128-HT and INA129-HT are low-power, general-purpose instrumentation amplifiers offering excellent accuracy. The versatile three-operationalamplifier design and small size make them ideal for a wide range of applications. Current-feedback input circuitry provides wide bandwidth even at high gain. A single external resistor sets any gain from 1 to 10000. The INA128-HT provides an industry-standard gain equation; the INA129-HT gain equation is compatible with the AD620. • • • • • • The INA128-HT and INA129-HT are laser trimmed for very low offset voltage (25 μV Typ) and high common-mode rejection (93 dB at G ≥ 100). These devices operate with power supplies as low as ±2.25 V, and quiescent current of 2 mA, typically. Internal input protection can withstand up to ±40 V without damage. 1 Low Offset Voltage: 25 uV Typical Low Input Bias Current: 50 nA Typical (1) High CMR: 95 dB Typical(1) Inputs Protected to ±40 V Wide Supply Range: ±2.25 V to ±18 V Low Quiescent Current: 2 mA Typical(1) Bridge Amplifiers Thermocouple Amplifiers RTD Sensor Amplifiers Medical Instrumentation Data Acquisition Supports Extreme Temperature Applications: – Controlled Baseline – One Assembly/Test Site – One Fabrication Site – Available in Extreme Temperature Ranges (–55°C to 210°C) (2) – Extended Product Life Cycle – Extended Product-Change Notification – Product Traceability Texas Instruments' high-temperature products use highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures. The INA129-HT is available in 8-pin ceramic DIP and 8-pin ceramic surface-mount packages, specified for the –55°C to 210°C temperature range. The INA128HT is available in an 8-pin SOIC-8 surface-mount package, specified for the –55°C to 175°C temperature range. Device Information(1) PART NUMBER INA128-HT INA129-HT (1) (2) PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm CFP (8) 6.90 mm × 5.65 mm CDIP SB (8) 11.81 mm × 7.49 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical values for 210°C application. Custom temperature ranges available. 4 Simplified Schematic V+ INA128: 7 50 kW RG G=1+ INA128, INA129 2 VIN Over-Voltage Protection INA129: A1 40 kW 1 G=1+ 40 kW (1) 49.4 kW RG 25 kW A3 RG 8 6 VO (1) 25 kW + VIN 3 Over-Voltage Protection 5 A2 40 kW Ref 40 kW 4 NOTE: (1) INA129: 24.7 kW V- 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 7.1 7.2 7.3 7.4 7.5 7.6 7.7 8 1 1 1 1 2 3 5 Absolute Maximum Ratings ...................................... 5 ESD Ratings ............................................................ 5 Recommended Operating Conditions....................... 5 Thermal Information: INA128-HT.............................. 5 Electrical Characteristics: INA128-HT....................... 6 Electrical Characteristics: INA129-HT....................... 8 Typical Characteristics ............................................ 11 Detailed Description ............................................ 14 8.1 Overview ................................................................. 14 8.2 Functional Block Diagram ....................................... 14 8.3 Feature Description................................................. 14 8.4 Device Functional Modes........................................ 15 9 Application and Implementation ........................ 16 9.1 Application Information............................................ 16 9.2 Typical Application .................................................. 16 10 Power Supply Recommendations ..................... 20 10.1 Low Voltage Operation ......................................... 20 11 Layout................................................................... 22 11.1 Layout Guidelines ................................................. 22 11.2 Layout Example .................................................... 22 12 Device and Documentation Support ................. 23 12.1 12.2 12.3 12.4 12.5 Device Support...................................................... Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 23 23 23 23 23 13 Mechanical, Packaging, and Orderable Information ........................................................... 23 5 Revision History Changes from Revision E (July 2013) to Revision F Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................. 1 • Deleted Ordering Information table; for all available packages, see the package option addendum ................................... 3 2 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 6 Pin Configuration and Functions D, HKJ, or JDJ Package 8-Pin SOIC, CFP, or CDIP SB Top View HKQ Package 8-Pin CFP Top View RG 1 8 RG V- IN 2 7 V+ V+IN 3 6 VO V- 4 5 Ref 1 8 RG RG V+ V- IN VO V+IN Ref V- 5 4 HKQ as formed or HKJ mounted dead bug Pin Functions PIN NAME NO. I/O DESCRIPTION Ref 5 I Output voltage reference RG 1, 8 O Gain resistor connection V+ 7 Power Positive power supply voltage from 2.25 V to 18 V V– 4 Power Negative power supply voltage from –2.25 V to –18 V V+IN 3 I Non-inverting input voltage V–IN 2 I Inverting input voltage VO 6 O Output voltage Bare Die Information DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION 15 mils Silicon with backgrind GND Al-Si-Cu (0.5%) Origin a c b d Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 3 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com Bond Pad Coordinates in Mils (1) DESCRIPTION PAD NUMBER a b c d NC 1 –57.4 –31.1 –53.3 –27 V-IN 2 –9.85 –31.4 –5.75 –27.3 V+IN 3 25.05 –31.4 29.15 –27.3 –30.2 V- 4 56.2 –34.3 60.3 Ref 5 53.75 –17.6 57.85 –11 VO 6 50.35 27.8 56.95 31.9 V+ 7 7.75 30.2 11.85 34.3 32.5 NC 8 –57.4 28.4 –53.3 RG (1) 9 –57.4 13.4 –53.3 20 RG (1) 10 –57.5 2.7 –53.4 9.3 RG (1) 11 –57.5 –7.9 –53.4 –1.3 RG (1) 12 –57.4 –18.6 –53.3 –12 Pads 9 and 10 must both be bonded to a common point and correspond to package pin 8. Pads 11 and 12 must both be bonded to a common point and correspond to package pin 1. NC RG RG RG RG NC PAD #1 V-IN V+ V+IN VO V- 4 Submit Documentation Feedback Ref Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Volttage Current Storage temperature, Tstg (1) ±18 Analog input ±40 Output short-circuit (to ground) Operating temperature MAX Supply UNIT V Continuous HKJ, HKQ, KGD and JD packages –55 210 D package –55 175 HKJ, HKQ, KGD and JD packages –55 210 D package –55 175 °C °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE UNIT A. INA218-HT (D, HKJ, or JDJ Package) Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) V(ESD) Electrostatic discharge ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) V ±50 B. INA129-HT (HKQ Package) V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±4000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) ±200 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) V power supply Input common-mode voltage range for VO = 0 MIN NOM ±2.25 ±15 MAX UNIT ±18 V V-2V V + –2 V TA operating temperature INA128-HT –55 175 °C TA operating temperature INA129-HT –55 210 °C 7.4 Thermal Information: INA128-HT INA128-HT THERMAL METRIC (1) D [SOIC] UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 110 RθJC(top) Junction-to-case (top) thermal resistance 57 RθJB Junction-to-board thermal resistance 54 ψJT Junction-to-top characterization parameter 11 ψJB Junction-to-board characterization parameter 53 (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 5 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 7.5 Electrical Characteristics: INA128-HT over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 175°C (1) TA = –55°C to +125°C MIN MIN TYP MAX UNIT TYP MAX ±25 ±100/G ±125 ±1000/G ±0.2 ±5/G ±1 ±20/G ±3.5 ±80/G µV/°C ±2 ±200/G ±5 ±500/G µV/V INPUT OFFSET VOLTAGE, RTI Initial TA = 25°C vs temperature TA = TMIN to TMAX vs power supply VS = ±2.25 V to ±18 V Long-term stability ±1 ±3/G 10 Impedance, differential 10 ±1 ±3/G 10 || 2 VO = 0 V (V+) − 2 (V+) − 1.4 (V−) + 2 (V−) + 1.7 Safe input voltage µV/mo || 2 Ω || pF 1011||9 Ω || pF 10 1011||9 Common mode Common mode voltage range (2) µV (V+) − 2 (V+) − 1.4 (V−) + 2 (V−) + 1.7 ±40 V V ±40 V VCM = ±13 V, ΔRS = 1 kΩ Common-mode rejection G=1 58 86 58 G = 10 78 106 78 75 85 G = 100 99 125 99 110 G = 1000 113 130 113 120 dB CURRENT Bias current ±2 vs temperature ±10 ±45 ±30 Offset Current ±1 vs temperature ±550 ±10 nA pA/°C ±45 nA ±30 ±550 pA/°C f = 10 Hz 10 10 nV/√Hz f = 100 Hz 8 8 nV/√Hz f = 1 kHz 8 8 nV/√Hz 0.2 0.8 NOISE Noise voltage, RTI G = 1000, RS = 0 Ω fB = 0.1 Hz to 10 Hz µVPP Noise current (1) (2) 6 f = 10 Hz 0.9 pA/√Hz f = 1 kHz 0.3 pA/√Hz fB = 0.1 Hz to 10 Hz 30 pAPP Minimum and maximum parameters are characterized for operation at TA = 175°C, but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. Input common-mode range varies with output voltage — see typical curves. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Electrical Characteristics: INA128-HT (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TA = 175°C (1) TA = –55°C to +125°C TEST CONDITIONS MIN TYP MAX MIN TYP UNIT MAX GAIN 1+ (50 kΩ/RG) Gain equation Range of gain 1 Gain error Gain vs temperature (3) 10000 1 V/V 10000 G=1 ±0.01 ±0.1 ±0.1% G = 10 ±0.02 ±0.5 ±0.5% ±1% G = 100 ±0.05 ±0.7 ±0.7% ±1.5% G = 1000 ±0.5 ±2.5 ±2% ±4% G=1 V/V ±0.5% ±1 ±10 ±75 ppm/°C ±25 ±100 ±75 ppm/°C VO = ±13.6 V, G=1 ±0.0001 ±0.001 ±0.008 G = 10 ±0.0003 ±0.002 ±0.01 G = 100 ±0.0005 ±0.002 ±0.01 G = 1000 ±0.001 50-kΩ resistance (3) (4) Nonlinearity 1+ (50 kΩ/RG) See (5) ±0.6 See % of FSR (5) OUTPUT Voltage Positive RL = 10 kΩ (V+) − 1.4 (V+) − 0.9 (V+) − 1.4 (V+) − 0.9 Negative RL = 10 kΩ (V−) + 1.4 (V−) + 0.8 (V−) + 1.4 (V−) + 0.8 Load capacitance stability V 1000 1000 pF +6/−15 +6/−15 mA G=1 1300 1100 G = 10 700 700 G = 100 200 190 G = 1000 Short-circuit current FREQUENCY RESPONSE Bandwidth, −3 dB Slew rate Settling time, 0.01% Overload recovery 20 17.5 VO = ±10 V, G = 10 4 4 G=1 7 7 G = 10 7 7 G = 100 9 9 G = 1000 80 80 4 4 50% overdrive kHz V/µs µs µs POWER SUPPLY Voltage range Current, total ±2.25 VIN = 0 V ±15 ±18 ±18 V ±0.7 ±1 ±2.25 ±15 ±1 mA TEMPERATURE RANGE Specification −55 +125 175 °C Operating −55 +125 175 °C (3) (4) (5) Specified by wafer test. Temperature coefficient of the 50-kΩ term in the gain equation. Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%. Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 7 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 7.6 Electrical Characteristics: INA129-HT over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 210°C (1) TA = –55°C to +125°C MIN MIN TYP MAX UNIT TYP MAX ±25 ±100/G ±125 ±1000/G ±0.2 ±5/G ±1 ±20/G ±1 ±850/G µV/°C ±0.2 ±20/G ±2 ±200/G ±20 ±1000/G µV/V INPUT OFFSET VOLTAGE, RTI Initial TA = 25°C vs temperature TA = TMIN to TMAX vs power supply VS = ±2.25 V to ±18 V Long-term stability ±1 ±3/G 10 Impedance, differential 10 ±1 ±3/G 10 || 2 VO = 0 V (V+) − 2 (V+) − 1.4 (V−) + 2 (V−) + 1.7 Safe input voltage µV/mo || 2 Ω || pF 1011||9 Ω || pF 10 1011||9 Common mode Common mode voltage range (2) µV (V+) − 2 (V+) − 1.4 (V−) + 2 (V−) + 1.7 ±40 V V ±40 V VCM = ±13 V, ΔRS = 1 kΩ Common-mode rejection G=1 58 86 53 G = 10 78 106 69 G = 100 99 125 89 G = 1000 113 130 95 dB CURRENT Bias current ±2 vs temperature ±10 ±30 Offset Current ±1 nA pA/°C ±50 nA ±30 ±600 pA/°C f = 10 Hz 10 25 nV/√Hz f = 100 Hz 8 20 nV/√Hz f = 1 kHz 8 20 nV/√Hz 0.2 2 µVPP vs temperature ±10 ±50 ±600 NOISE Noise voltage, RTI G = 1000, RS = 0 Ω fB = 0.1 Hz to 10 Hz Noise current (1) (2) 8 f = 10 Hz 0.9 pA/√Hz f = 1 kHz 0.3 pA/√Hz fB = 0.1 Hz to 10 Hz 30 pAPP Minimum and maximum parameters are characterized for operation at TA = 210°C, but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. Input common-mode range varies with output voltage — see typical curves. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Electrical Characteristics: INA129-HT (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TA = 210°C (1) TA = –55°C to +125°C TEST CONDITIONS MIN TYP MAX MIN TYP UNIT MAX GAIN 1+ (49.4 kΩ/RG) Gain equation Range of gain 1 Gain error Gain vs temperature (3) 10000 1 ±0.01% ±0.1% G = 10 ±0.02% ±0.5% ±2.6% G = 100 ±0.05% ±0.7% ±13.5% G = 1000 ±0.5% ±2.5% ±65.5% G=1 V/V 10000 G=1 V/V ±1.1% ±1 ±10 ±100 ppm/°C ±25 ±100 ±100 ppm/°C VO = ±13.6 V, G=1 ±0.0001 ±0.001 ±0.1 G = 10 ±0.0003 ±0.002 ±0.2 G = 100 ±0.0005 ±0.002 ±0.7 G = 1000 ±0.001 (5) ±2.4 49.4-kΩ resistance (3) (4) Nonlinearity 1+ (49.4 kΩ/RG) See % of FSR See (5) OUTPUT Voltage Positive RL = 10kΩ (V+) − 1.4 (V+) − 0.9 (V+) − 1.4 (V+) − 0.9 Negative RL = 10kΩ (V−) + 1.4 (V−) + 0.8 (V−) + 1.4 (V−) + 0.8 Load capacitance stability V 1000 1000 pF +6/−15 +12/−5 mA G=1 1300 850 G = 10 700 400 G = 100 200 50 G = 1000 Short-curcuit current FREQUENCY RESPONSE Bandwidth, −3 dB Slew rate Settling time, 0.01% Overload recovery 20 7.5 VO = ±10 V, G = 10 4 4 G=1 7 10 G = 10 7 10 G = 100 9 30 G = 1000 80 150 4 4 50% overdrive kHz V/µs µs µs POWER SUPPLY Voltage range Current, total ±2.25 VIN = 0 V ±15 ±18 ±0.7 ±1 ±2.25 ±15 ±18 ±2 V mA TEMPERATURE RANGE Specification −55 +125 210 °C Operating −55 +125 210 °C (3) (4) (5) Specified by wafer test. Temperature coefficient of the 49.4-kΩ term in the gain equation. Nonlinearity measurements in G = 1000 are dominated by noise. Typical nonlinearity is ±0.001%. Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 9 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com Estimated Life (Hours) 1000000 100000 Electromigration Fail Mode 10000 Wirebond Failure Mode 1000 110 120 130 140 150 160 170 180 190 200 210 Continuous TJ (°C) (1) See the data sheet for absolute maximum and minimum recommended operating conditions. (2) The predicted operating lifetime vs. junction temperature is based on reliability modeling using electromigration as the dominant failure mechanism affecting device wearout for the specific device process and design characterisitics. (3) Wirebond lifetime is only applicable for D package. Figure 1. INA128HD, INA129SKGD1, and INA129SKGD2 Operating Life Derating Chart 10 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 7.7 Typical Characteristics At TA = 25°C, VS = ±15 V, unless otherwise noted. 60 140 G =1000V/V G =100V/V G = 1000V/V Common-Mode Rejection (dB) 50 40 Gain (dB) G = 100V/V 30 20 G = 10 V/V 10 0 G = 1V/V − 10 120 G =10V/V 100 G =1V/V 80 60 40 20 − 20 0 10k 1k 100k 10M 1M 10 100 10k 1k Frequency (Hz) 100k 1M Frequency (Hz) Figure 2. Gain vs Frequency Figure 3. Common-Mode Rejection vs Frequency 140 140 Power Supply Rejection (dB) Power Supply Rejection (dB) G = 1000V/V 120 G =1000V/V 100 G =100V/V 80 60 G= 10V/V 40 G=1V/V 20 120 80 60 100 10k 1k 100k G=1V/V 20 0 10 1M Frequency (Hz) Frequency (Hz) Figure 4. Positive Power-Supply Rejection vs Frequency Figure 5. Negative Power-Supply Rejection vs Frequency 5 15 G ≥ 10 G ≥ 10 G=1 G=1 5 +15V VD/2 0 VD/2 5 + VO Ref + VCM -15V 10 3 2 G ≥ 10 G ≥ 10 4 10 Common-Mode Voltage (V) Common-Mode Voltage (V) G=10V/V 40 0 10 G =100V/V 100 G=1 G=1 G ≥ 10 1 0 G=1 1 2 3 VS = ±5V VS = ±2.5V 4 5 15 -15 -10 -5 0 10 5 15 -5 -4 -3 -2 -1 0 1 2 3 4 5 Output Voltage (V) Output Voltage (V) VS = ±5 V, ±2.5 V VS = ±15 V Figure 6. Input Common-Mode Range vs Output Voltage Figure 7. Input Common-Mode Range vs Output Voltage Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 11 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com Typical Characteristics (continued) At TA = 25°C, VS = ±15 V, unless otherwise noted. 100 100 ¾ Input Bias Current Noise (pA/√Hz) ¾ Input-Referred Voltage Noise (nV/√Hz) 1k 100 10 G =10V/V 10 1 G =100, 1000V/V Current Noise 1 0.01% Settling Time (ms) G = 1V / V 0.1% 10 1 0.1 1 10 100 10 1 10k 1k Figure 8. Input-Referred Noise vs Frequency 5 4 4 3.5 3 3 1.5 2.5 2 1 1.5 IQ 0 -55 -25 0 25 50 75 100 125 155 190 Input Current (mA) Slew Rate 0.5 Flat region represents normal linear operation. 2 G = 1V / V 0 1 +15V G=1V/V 2 1 3 0.5 4 0 5 VIN G = 1000V/V -50 210 G = 1000V/V 1 -40 -30 -20 -10 0 IIN 15V 10 20 30 40 50 Input Voltage (V) Temperature (°C) Figure 10. Quiescent Current and Slew Rate vs Temperature Figure 11. Input Overvoltage Voltage-to-Current Characteristics 10 33 8 28 6 Input Bias Current (nA) Offset Voltage Change (mV) 1000 Figure 9. Settling Time vs Gain 4.5 Slew Rate (V/µS) Quiescent Current (mA) 2.5 2 100 Gain (V/V) Frequency (Hz) 4 2 0 -2 -4 -6 23 18 13 IB 8 3 -8 I OS -10 -2 0 12 100 200 300 400 500 -50 -25 0 25 50 75 100 125 150 190 Time (ms) Temperature (°C) Figure 12. Input Offset Voltage Warm-Up Figure 13. Input Bias Current vs Temperature Submit Documentation Feedback 210 Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Typical Characteristics (continued) (V+) (V+) (V+)-0.4 (V+)-0.4 Output Voltage Swing (V) Output Voltage (V) At TA = 25°C, VS = ±15 V, unless otherwise noted. (V+)-0.8 (V+)-1.2 (V-)+1.2 (V-)+0.8 +25°C (V+)-0.8 (V+)-1.2 -40 °C RL = 10 k Ω +25°C (V-)+1.2 -40 °C +85°C (V-)+0.8 +85°C -40 °C (V-)+0.4 (V-)+0.4 (V-) (V-) 0 1 2 3 0 4 5 10 15 20 Power Supply Voltage (V) Output Current (mA) Figure 14. Output Voltage Swing vs Output Current Figure 15. Output Voltage Swing vs Power Supply Voltage 30 18 G =10, 100 -I SC Peak-to-Peak Output Voltage (VPP) 16 Short-Circuit Current (mA) +85°C 14 12 10 8 6 +I SC 4 2 25 G=1 G = 1000 20 15 10 5 0 0 -50 -25 0 25 50 75 100 125 190 10k 1k 210 100k 1M Frequency (Hz) Temperature (°C) Figure 17. Maximum Output Voltage vs Frequency Figure 16. Short-Circuit Output Current vs Temperature 1 TH D + N (% ) VO = 1 Vrms 500kHz Measurement Bandwidth 0.1 G=1 RL = 10kW G =100, RL = 100kW 0.01 G =10V/V RL = 100kW G =1, RL = 100kW Dashed Portion is noise limited. 0.001 100 1k 10k 100k Frequency (Hz) Figure 18. Total Harmonic Distortion + Noise vs Frequency Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 13 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 8 Detailed Description 8.1 Overview The INA12x instrumentation amplifier is a type of differential amplifier that has been outfitted with input protection circuit and input buffer amplifiers, which eliminate the need for input impedance matching and make the amplifier particularly suitable for use in measurement and test equipment. Additional characteristics of the INA12x include a very low DC offset, low drift, low noise, very high open-loop gain, very high common-mode rejection ratio, and very high input impedances. The INA12x is used where great accuracy and stability of the circuit both short and long term are required. 8.2 Functional Block Diagram V+ INA128: 7 50 kW RG G=1+ INA128, INA129 2 - VIN Over-Voltage Protection INA129: A1 40 kW 1 G=1+ 40 kW (1) 49.4 kW RG 25 kW 6 A3 RG 8 VO (1) 25 kW + VIN 3 5 A2 Over-Voltage Protection 40 kW Ref 40 kW 4 NOTE: (1) INA129: 24.7 kW V- 8.3 Feature Description The INA128-HT and INA129-HT are low power, general-purpose instrumentation amplifiers offering excellent accuracy. The versatile three-operational-amplifier design and small size make the amplifiers ideal for a wide range of applications. Current-feedback input circuitry provides wide bandwidth, even at high gain. A single external resistor sets any gain from 1 to 10,000. The INA128-HT and INA129-HT are laser trimmed for very low offset voltage (25 μV typical) and high common-mode rejection (93 dB at G ≥ 100). These devices operate with power supplies as low as ±2.25 V, and quiescent current of 2 mA, typically. The internal input protection can withstand up to ±40 V without damage. 14 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 8.4 Device Functional Modes 8.4.1 Noise Performance The INA128-HT and INA129-HT provide very low noise in most applications. Low-frequency noise is approximately 2 μVPP measured from 0.1 Hz to 10 Hz (G ≥ 100). This provides dramatically improved noise when compared to state-of-the-art, chopper-stabilized amplifiers. 0.1mV/div 1s/div G ≥ 100 Figure 19. 0.1-Hz to 10-Hz Input-Referred Voltage Noise 8.4.2 Input Common-Mode Range The linear input voltage ranges of the input circuitry of the INA128-HT and INA129-HT are from approximately 1.4 V below the positive supply voltage to 1.7 V above the negative supply. As a differential input voltage causes the output voltage increase, however, the linear input range will be limited by the output voltage swing of amplifiers A1 and A2. So the linear common-mode input range is related to the output voltage of the complete amplifier. This behavior also depends on supply voltage (see Figure 6 and Figure 7). Input-overload can produce an output voltage that appears normal. For example, if an input overload condition drives both input amplifiers to their positive output swing limit, the difference voltage measured by the output amplifier will be near zero. The output of A3 will be near 0 V even though both inputs are overloaded. Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 15 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The INA12x measures small differential voltage with high common-mode voltage developed between the noninverting and inverting input. The high-input voltage protection circuit in conjunction with high input impedance make the INA12x suitable for a wide range of applications. The ability to set the reference pin to adjust the functionality of the output signal offers additional flexibility that is practical for multiple configurations. 9.2 Typical Application Figure 20 shows the basic connections required for operation of the INA128-HT and INA129-HT. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. The output is referred to the output reference (Ref) pin that is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 8 Ω in series with the Ref pin will cause a typical device to degrade. V+ INA129: INA128: G=1+ 50 kW RG 0.1mF G=1+ 49.4 kW RG 7 INA128, INA129 INA128 DESIRED GAIN (V/V) 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 INA129 RG (W) NEAREST 1% RG (W) NC 50K 12.5K 5.556K 2.632K 1.02K 505.1 251.3 100.2 50.5 25.01 10 5.001 NC 49.9K 12.4K 5.62K 2.61K 1.02K 511 249 100 49.9 24.9 10 4.99 RG (W) NC 49.4K 12.35K 5489 2600 1008 499 248 99 49.5 24.7 9.88 4.94 VIN NEAREST 1% RG (W) NC 49.9K 12.4K 5.49K 2.61K 1K 499 249 100 49.9 24.9 9.76 4.87 2 Over Voltage Protection A1 40kW 1 6 + 8 3 VO = G · (VIN- - VIN+) A3 RG + VIN 40kW 25kW (1) 25kW(1) Load VO A2 Over Voltage Protection 40kW 4 NOTE: (1) INA129: 24.7kW 40kW 5 Ref 0.1mF NC: No Connection V IN V Also drawn in simplified form: RG + V IN INA1 28 VO Ref Figure 20. Basic Connections 9.2.1 Design Requirements The device can be configured to monitor the input differential voltage when the gain of the input signal is set by the external resistor RG. The output signal references to the Ref pin. The most common application is where the output is referenced to ground when no input signal is present by connecting the Ref pin to ground, as Figure 20 shows. When the input signal increases, the output voltage at the OUT pin increases, too. 16 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Typical Application (continued) 9.2.2 Detailed Design Procedure 9.2.2.1 Setting the Gain Gain is set by connecting a single external resistor, RG, between pins 1 and 8. INA128-HT: 50 kW G=1+ ¾ RG (1) INA129-HT: 49.4 kW G=1+ ¾ RG (2) Commonly used gains and resistor values are shown in Figure 20. The 50-kΩ term in Equation 1 (49.4-kΩ in Equation 2) comes from the sum of the two internal feedback resistors of A1 and A2. These on-chip metal film resistors are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these internal resistors are included in the gain accuracy and drift specifications of the INA128-HT and INA129-HT. The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The RG contribution to gain accuracy and drift can be directly inferred from Equation 2. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater. 9.2.2.2 Dynamic Performance Figure 2 shows that, despite its low quiescent current, the INA128-HT and INA129-HT achieve wide bandwidth, even at high gain. This is due to the current-feedback topology of the input stage circuitry. Settling time also remains excellent at high gain. 9.2.2.3 Offset Trimming The INA128-HT and INA129-HT are laser trimmed for low offset voltage and offset voltage drift. Most applications require no external offset adjustment. Figure 21 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed with the output. The operational amplifier buffer provides low impedance at the Ref terminal to preserve good common-mode rejection. VIN V+ RG INA129 VO 100mA 1/2 REF200 Ref V+ IN OPA177 ±10mV Adjustment Range 10kW 100W 100W 100mA 1/2 REF200 V- (1) OPA177 and REF200 are not tested or characterized at 210°C. Figure 21. Optional Trimming of Output Offset Voltage Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 17 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com Typical Application (continued) 9.2.2.4 Input Bias Current Return Path The input impedances of the INA128-HT and INA129-HT are extremely high (approximately 1010 Ω). However, a path must be provided for the input bias current of both inputs. This input bias current is approximately ±50 nA. High input impedance means that this input bias current changes very little with varying input voltage. Input circuitry must provide a path for this input bias current for proper operation. Figure 22 shows various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which exceeds the common-mode range, and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 22). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better highfrequency common-mode rejection. Microphone, Hydrophone etc. INA129 47kW 47kW Thermocouple INA129 10kW INA129 Center-tap provides bias current return. Figure 22. Providing an Input Common-Mode Current Path 18 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Typical Application (continued) 9.2.3 Application Curves G=1 G = 10 0 20mV/div 20mV/div G = 10 G = 10 0 0 20ms/div 5ms/div G = 100, 1000 G = 1, 10 Figure 24. Small Signal Figure 23. Small Signal G=1 G =100 5V/div 5V/div G = 10 G =1000 5ms/div 20ms/div G = 1, 10 G = 100, 1000 Figure 25. Large Signal Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Figure 26. Large Signal Submit Documentation Feedback 19 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 10 Power Supply Recommendations The minimum power supply voltage for INA12x is ±2.25 V and the maximum power supply voltage is ±18 V. This minimum and maximum range covers a wide range of power supplies; but for optimum performance, ±15 V is recommended. TI recommends adding a bypass capacitor at the input to compensate for the layout and power supply source impedance. 10.1 Low Voltage Operation The INA128-HT and INA129-HT can be operated on power supplies as low as ±2.25 V. Performance remains excellent with power supplies ranging from ±2.25 V to ±18 V. Most parameters vary only slightly throughout this supply voltage range. Operation at very low supply voltage requires careful attention to assure that the input voltages remain within their linear range. Voltage swing requirements of internal nodes limit the input common-mode range with low power supply voltage. Figure 6 and Figure 7 show the range of linear operation for ±15 V, ±5 V, and ±2.5 V supplies. (1) OPA130 is not tested or characterized at 210°C. +5V 2.5V - ∆V 300W VIN + RG VO RG INA129 Ref VO INA129 C1 0.1mF Ref R1 1MW 2.5V + ∆V OPA130 1 f-3dB= 2pR1C1 = 1.59 Hz Figure 27. Bridge Amplifier Figure 28. AC-Coupled Instrumentation Amplifier V+ 10.0V 6 REF102 R1 2 R2 4 Pt100 Cu K VO Cu RG INA129 Ref R3 100Ω = Pt100 at 0°C ISA TYPE E J K T (1) MATERIAL +Chromel -Constantan +Iron -Constantan +Chromel -Alumel +Copper -Constantan SEEBECK COEFFICIENT (mV/°C) R1, R2 58.5 66.5kW 50.2 76.8kW 39.4 97.6kW 38 102kW REF102 is not tested or characterized at 210°C. Figure 29. Thermocouple Amplifier With RTD Cold-Junction Compensation 20 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 Low Voltage Operation (continued) - IO = R1 VIN RG INA129 V IN · G R1 + Ref IB A1 (1) A1 IB ERROR OPA177 ±1.5 nA OPA131 ±50 pA OPA602 ±1 pA OPA128 ±75 fA IO Load OPA177, OPA131, OPA602, and OPA128 are not tested or characterized at 210°C. Figure 30. Differential Voltage-to-Current Converter RG = 5.6kW 2.8kW G = 10 LA RA RG/2 INA129 VO Ref 2.8kW 390kW 1/2 OPA2131 RL VG 10kW 390kW (1) VG 1/2 OPA2131 NOTE: Due to the INA129’s current-feedback topology, VG is approximately 0.7 V less than the common-mode input voltage. This DC offset in this guard potential is satisfactory for many guarding applications. OPA2131 is not tested or characterized at 210°C. Figure 31. ECG Amplifier With Right-Leg Drive Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 21 INA128-HT, INA129-HT SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 www.ti.com 11 Layout 11.1 Layout Guidelines Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The recommended value of this bypass capacitor is 0.1 μF to 1 μF. If necessary, additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies. These decoupling capacitors must be placed between the power supply and INA12x device. The gain resistor must be placed close to pin 1 and pin 8. This placement limits the layout loop and minimizes any noise coupling into the part. 11.2 Layout Example Gain Resistor Bypass Capacitor VIN VIN – + R6 R6 V–IH V+ V+IH VO V– REF V+ VOUT GND Bypass Capacitor V– GND Figure 32. Recommended Layout 22 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT INA128-HT, INA129-HT www.ti.com SBOS501F – JANUARY 2010 – REVISED FEBRUARY 2015 12 Device and Documentation Support 12.1 Device Support 12.1.1 Development Support Table 1. Design Kits and Evaluation Modules NAME PART NUMBER TYPE DIP Adapter Evaluation Module DIP-ADAPTER-EVM Evaluation Modules and Boards Universal Instrumentation Amplifier Evaluation Module INAEVM Evaluation Modules and Boards Table 2. Development Tools NAME PART NUMBER TYPE Calculate Input Common-Mode Range of Instrumentation Amplifiers INA-CMV-CALC Calculation Tools SPICE-Based Analog Simulation Program TINA-TI Circuit Design and Simulation 12.2 Related Links Table 3 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 3. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY INA128-HT Click here Click here Click here Click here Click here INA129-HT Click here Click here Click here Click here Click here 12.3 Trademarks All trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: INA128-HT INA129-HT Submit Documentation Feedback 23 PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) INA128HD ACTIVE SOIC D 8 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -55 to +175 128HD INA129SHKJ ACTIVE CFP HKJ 8 1 TBD Call TI N / A for Pkg Type -55 to 210 INA129S HKJ INA129SHKQ ACTIVE CFP HKQ 8 1 TBD AU N / A for Pkg Type -55 to 210 INA129S HKQ INA129SJD ACTIVE CDIP SB JDJ 8 1 TBD POST-PLATE N / A for Pkg Type -55 to 210 INA129SJD INA129SKGD1 ACTIVE XCEPT KGD 0 80 TBD Call TI N / A for Pkg Type -55 to 210 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 12-Jul-2015 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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