LINER LT5521 Very high linearity active mixer Datasheet

LT5521
Very High Linearity
Active Mixer
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FEATURES
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DESCRIPTIO
The LT®5521 is a very high linearity mixer optimized for
low distortion and low LO leakage applications. The chip
includes a high speed LO buffer with single-ended input
and a double-balanced active mixer. The LT5521 requires
only –5dBm LO input power to achieve excellent distortion and noise performance, while reducing external drive
circuit requirements. The LO buffer is internally 50Ω
matched for wideband operation.
Wideband Output Frequency Range to 3.7GHz
+24.2dBm IIP3 at 1.95GHz RF Output
Low LO Leakage: –42dBm
Integrated LO Buffer: Low LO Drive Level
Single-Ended LO Drive
Wide Single Supply Range: 3.15V to 5.25V
Double-Balanced Active Mixer
Shutdown Function
16-Lead (4mm × 4mm) QFN Package
With a 250MHz input, a 1.7GHz LO and a 1.95GHz output
frequency, the mixer has a typical IIP3 of +24.2dBm,
–0.5dB conversion gain and a 12.5dB noise figure.
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APPLICATIO S
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The LT5521 offers exceptional LO-RF isolation, greatly
reducing the need for output filtering to meet LO suppression requirements.
Cellular, W-CDMA, PHS and UMTS Infrastructure
Cable Downlink Infrastructure
Wireless Infrastructure
Fixed Wireless Access Equipment
High Linearity Mixer Applications
The device is designed to work over a supply voltage range
from 3.15V to 5.25V.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
Fundamental, 3rd Order
Intermodulation Distortion
vs Input Power
LO INPUT
–5dBm
6.8pF
20
LO
GND
110Ω
1nF
IF
INPUT
IN+
OUT+
IN–
OUT–
2.7nH
4:1
82pF
1:1
10pF
6.8pF
BPF
PA
2.7nH
1nF
110Ω
82pF
BIAS
1nF
EN VCC VCC VCC
5V DC
1µF
5521 TA01
RF
OUTPUT
OUTPUT POWER (dBm)
0
BPF
PFUND
–20
–40
IM3
–60
–80
–100
–14 –12 –10 –8 –6 –4 –2
PIN (dBm)
fIF = 250MHz
fLO = 1.7GHz
fRF = 1.95GHz
PLO = –5dBm
TA = 25°C
0
2
4
6
5521 TA02
5521f
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LT5521
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Power Supply Voltage ........................................... 5.5V
Enable Voltage ............................... –0.2V to VCC + 0.2V
LO Input Power ................................................ +10dBm
LO Input DC Voltage ..................................... 0V to 1.5V
IF Input Power ................................................. +10dBm
Difference Voltage Across Output Pins ................ ±1.5V
Maximum Pin 2 or Pin 3 Current ......................... 34mA
Operating Ambient Temperature Range .. – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 125°C
Maximum Junction Temperature .......................... 125°C
ORDER PART
NUMBER
GND
GND
LO
GND
TOP VIEW
16 15 14 13
+
IN
LT5521EUF
12 OUT+
GND 1
2
11 GND
17
IN– 3
10 GND
GND 4
5
6
7
8
EN
VCC
VCC
VCC
9
OUT–
UF PART
MARKING
UF PACKAGE
16-LEAD (4mm × 4mm) PLASTIC QFN
5521
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 17) IS GND
MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
DC ELECTRICAL CHARACTERISTICS VCC = 5V, EN = 2.9V, TA = 25°C unless otherwise noted.
Test circuit shown in Figure 1. (Note 2)
PARAMETER
CONDITIONS
Supply Voltage
MIN
Supply Current
Shutdown Current
TYP
3.15
EN = 0.2V
MAX
UNITS
5.25
V
82
98
mA
20
100
µA
Enable (EN) Low = Off, High = On
Enable Mode
EN = High
2.9
V
Disable Mode
EN = Low
Enable Current
EN = 5V
137
µA
Shutdown Enable Current
EN = 0.2V
0.1
µA
Turn-On Time (Note 3)
200
ns
Turn-Off Time (Note 4)
200
ns
0.2
V
LO Voltage (Pin 15)
Internally Biased
0.96
V
Input Voltage (Pins 2, 3)
VCC = 5V, Internally Biased
VCC = 3.3V, Internally Biased
2.20
0.46
V
V
AC ELECTRICAL CHARACTERISTICS
Test circuit shown in Figure 1. (Note 2)
PARAMETER
VCC = 5V, EN = 2.9V, TA = 25°C unless otherwise noted.
CONDITIONS
MIN
TYP
MAX
UNITS
LO Frequency Range
10 to 4000
MHz
Input Frequency Range
10 to 3000
MHz
Output Frequency Range
10 to 3700
LO Input Power
–5
MHz
1
dBm
LO Return Loss
ZO = 50Ω, fLO = 1700MHz
12
dB
Output Return Loss
Requires Matching
12
dB
Input Return Loss (Pins 2, 3)
Requires Matching
15
dB
5521f
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LT5521
AC ELECTRICAL CHARACTERISTICS
VCC = 5V, EN = 2.9V, fIF = 250MHz, PIF = –7dBm, fLO = 1700MHz,
PLO = –5dBm, fRF = 1950MHz, TA = 25°C. Test circuit shown in Figure 1.
PARAMETER
CONDITIONS
MIN
Conversion Gain
TYP
MAX
–0.5
Conversion Gain Variation vs Temperature
Input P1dB
Single-Side Band Noise Figure
UNITS
dB
–0.009
dB/°C
+10
dBm
12.5
dB
IIP3
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone
+24.2
dBm
IIP2 (Note 6)
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone,
fLO + fIF1 + fIF2
+49
dBm
LO-RF Leakage
–42
dBm
LO-IF Leakage
–40
dBm
VCC = 5V, EN = 2.9V, fIF = 44MHz, PIF = –7dBm, fLO = 1001MHz, PLO = –5dBm, fRF = 1045MHz, TA = 25°C.
PARAMETER
CONDITIONS
MIN
Conversion Gain
TYP
MAX
–0.5
Conversion Gain Variation vs Temperature
UNITS
dB
–0.012
dB/°C
Input P1dB
+10
dBm
Single-Side Band Noise Figure
12.8
dB
IIP3
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone
+24.5
dBm
IIP2 (Note 6)
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone,
fLO + fIF1 + fIF2
+49
dBm
LO-RF Leakage
–38
dBm
LO-IF Leakage
–59
dBm
VCC = 3.3V, EN = 2.9V, fIF = 250MHz, PIF = –7dBm, fLO = 1700MHz, PLO = –5dBm, fRF = 1950MHz, TA = 25°C. (Note 5)
PARAMETER
CONDITIONS
MIN
Conversion Gain
TYP
–0.5
Conversion Gain Variation vs Temperature
MAX
UNITS
dB
–0.013
dB/°C
Input P1dB
+11
dBm
Single-Side Band Noise Figure
13.5
dB
IIP3
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone
+25.8
dBm
IIP2 (Note 6)
Two Tones, ∆fIF = 5MHz, PIF = –7dBm/Tone,
fLO + fIF1 + fIF2
+50
dBm
LO-RF Leakage
–36
dBm
LO-IF Leakage
–60
dBm
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
controls.
Note 3: Interval from the rising edge of the Enable input to the time when
the RF output is within 1dB of its steady-state output.
Note 4: Interval from the falling edge of the Enable signal to a 20dB drop
in the RF output power.
Note 5: R1 = R7 = 22.6Ω, Z1 = Z7 = 100nH.
Note 6: Second harmonic distortion measured at fLO + fIF1 + fIF2.
5521f
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LT5521
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TYPICAL DC PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
(5V Application)
Supply Current vs Supply Voltage
(3.3V Application)
110
100
95
100
85°C
90
85°C
90
ICC (mA)
85
ICC (mA)
Test circuit shown in Figure 1.
25°C
80
75
25°C
80
–40°C
70
–40°C
70
60
65
60
4.7
4.8
4.9
5.1
5.0
VCC (V)
5.2
50
3.1
5.3
3.2
3.3
VCC (V)
3.4
3.5
5521 G02
5521 G01
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TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz, PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit
shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 5V.
Fundamental, 2nd and 3rd Order
Intermodulation Distortion
vs Input Power
85°C
25°C
–40°C
0.5
0
GC (dB)
IM3
–20
–40
IM2
–40°C
8
85°C
–60
IM2
–80
0
2
4
6
5521 G03
2
0
–2.0
–2
–2.5
0
–25 –20 –15 –10 –5
PIN (dBm)
5
10
15
22
4
–1.5
IM3
–100
–14 –12 –10 –8 –6 –4 –2
PIN (dBm)
23
6
25°C
–0.5
–1.0
24
IIP3
–4
1750
85°C
25°C
–40°C
21
GC
IIP3 (dBm)
OUTPUT POWER (dBm)
0
25
10
1.0
PFUND
GC (dB)
20
Conversion Gain and IIP3
vs RF Frequency
Conversion Gain vs Input Power
20
19
1850
1950
2050
18
2150
RFOUT (MHz)
5521 G04
5521 G05
5521f
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LT5521
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TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output
frequency and VCC = 5V.
Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage
10
–38
8
30
IIP3
25
85°C
25°C
–40°C
GC (dB)
6
85°C
–42
25°C
–44
4
20
15
NF
2
10
GC
–46
0
–48
1500 1550 1600 1650 1700 1750 1800 1850 1900
LO FREQUENCY (MHz)
5
–2
4.6
4.7
4.8
4.9
5.0 5.1
VCC (V)
5.2
5.3
5521 G06
LO-RF Leakage vs LO Power
23
6
4
85°C
25°C
–40°C
2
22
21
GC
0
20
–2
19
–4
–25 –20
0
–15 –10 –5
LO POWER (dBm)
–34
–36
18
10
5
5521 G08
LO-RF Leakage vs Supply Voltage
–34
Noise Figure vs LO Power
20
19
18
–36
–38
–40°C
–40
85°C
–42
–44
25°C
–46
NOISE FIGURE (dB)
LO LEAKAGE (dBm)
–38
–40°C
–40
85°C
–42
–44
25°C
–46
–15 –10 –5
0
LO POWER (dBm)
5
–50
4.7
10
4.8
4.9
5.1
5.0
VCC (V)
5.2
Low Side LO (LS) and High Side
LO (HS) Comparison: Conversion
Gain and IIP3 vs RF Frequency
LS
IIP3
8
HS
18
16
LS
10
–20
5.3
–15
–5
–10
LO POWER (dBm)
1950
0
5
5521 G11
12.9
12.7
12.5
HS
12.3
12.1
LS
11.9
HS
1850
IIP3 (dBm)
2
–4
1750
–40°C
LS: R1 = R7 = 110Ω
13.3 HS: R1 = R7 = 121Ω
f = 250MHz
13.1 IF
22
20
–2
13
13.5
24
LS: R1 = R7 = 110Ω
4 HS: R1 = R7 = 121Ω
fIF = 250MHz
GC
25°C
14
Low Side LO (LS) and High Side
LO (HS) Comparison: Noise Figure
vs RF Frequency
26
10
0
85°C
15
5521 G10
5521 G09
6
16
11
NOISE FIGURE (dB)
–20
17
12
–48
–48
GC (dB)
LO LEAKAGE (dBm)
IIP3
5521 G07
–32
–50
–25
0
5.4
24
8
IIP3 (dBm)
LEAKAGE (dBm)
–40°C
–40
25
10
IIP3 (dBm) AND NOISE FIGURE (dB)
–36
Conversion Gain and IIP3
vs LO Power
GC (dB)
LO-RF Leakage vs LO Frequency
14
2050
12
2150
RFOUT (MHz)
5521 G13
11.7
11.5
1700 1750 1800 1850 1900 1950 2000 2050 2100
RFOUT (MHz)
5521 G14
5521f
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LT5521
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TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output
frequency.
Fundamental, 2nd and 3rd Order
Intermodulation Distortion
vs Input Power
Conversion Gain and IIP3
vs RF Frequency, Fixed IF
Conversion Gain vs Input Power
1.0
20
0
0.5
PFUND
25
10
–40°C
24
8
IIP3
–20
0
IM2
–80
85°C
25°C
–40°C
–100
–120
–14 –12 –10 –8 –6 –4 –2 0
INPUT POWER (dBm)
2
85°C
–1.0
–2.0
–2
GC (dB)
NF
18
14
2
10
GC
0
85°C
900
950 1000 1050 1100
LO FREQUENCY (MHz)
1150
–2
4.6
6
4.7
4.8
4.9
5.0 5.1
VCC (V)
5.2
LO-RF Leakage vs LO Power
23
6
85°C
25°C
–40°C
4
2
22
21
GC
0
20
–2
19
–4
–25 –20
0
–15 –10 –5
LO POWER (dBm)
5
18
10
5521 G20
LO-RF Leakage vs Supply Voltage
–32
LO LEAKAGE (dBm)
–32
LO LEAKAGE (dBm)
24
–30
–30
–34
–40°C
–36
25°C
85°C
–40
–42
–25 –20
8
5521 G19
5521 G18
–38
2
5.4
5.3
25
IIP3
IIP3 (dBm)
85°C
25°C
–40°C
–40°C
–41
–42
850
22
6
4
18
1170
1120
10
IIP3 (dBm) AND NOISE FIGURE (dB)
–35
–39
1070
Conversion Gain and IIP3
vs LO Power
IIP3
8
–34
–40
1020
5521 G17
26
–33
25°C
970
RFOUT (MHz)
10
–32
–38
19
Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage
LO-RF Leakage vs LO Frequency
–36
20
5521 G16
5521 G15
–37
21
GC
–4
920
15
10
22
2
0
5
85°C
25°C
–40°C
4
–1.5
–2.5
0
–25 –20 –15 –10 –5
PIN (dBm)
6
4
GC (dB)
–60
–0.5
GC (dB)
IM2
GC (dB)
–40
IM3
LEAKAGE (dBm)
23
6
25°C
IIP3 (dBm)
OUTPUT POWER (dBm)
IM3
–34
–40°C
–36
25°C
–38
85°C
–40
–42
0
–15 –10 –5
LO POWER (dBm)
5
10
–44
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
VCC (V)
5521 G21
5521 G22
5521f
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LT5521
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TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output
frequency.
Low Side LO (LS) and High Side
LO (HS) Comparison: Conversion
Gain and IIP3 vs RF Frequency
4
19
LS
3
18
IIP3
HS
17
GC (dB)
16
85°C
15
25°C
14
13
14.0
24
13.5
2
23
1
22
0
21
–40°C
12
25
LS
GC
HS
–1
IIP3 (dBm)
NOISE FIGURE (dB)
fIF = 44MHz
NOISE FIGURE (dB)
Noise Figure vs LO Power
20
Low Side LO (LS) and High Side
LO (HS) Comparison: Noise Figure
vs RF Frequency
fIF = 44MHz
13.0
HS
12.5
LS
12.0
11.5
20
11
10
–20
–15
–5
–10
LO POWER (dBm)
0
–2
940
5
990
1040
RFOUT (MHz)
5521 G23
11.0
945
19
1140
1090
985
1025
1065
RFOUT (MHz)
1105
1145
5521 G24
5521 G34
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO = –5dBm, VCC = 3.3V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit
shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 3.3V.
POUT, IM3 and IM2 vs Input Power
Conversion Gain and IIP3
vs RF Frequency
Conversion Gain vs Input Power
–40°C
GC (dB)
–0.5
–40
IM2
–60
–80
85°C
25°C
–40°C
IM3
0
2
4
–1.0
85°C
5521 G25
–2.5
–20
4
2
0
–2.0
6
23
6
25°C
–1.5
IM2
–100
–14 –12 –10 –8 –6 –4 –2
PIN (dBm)
IIP3
GC (dB)
IM3
–20
25
8
0
POUT
85°C
25°C
–40°C
21
19
GC
17
15
–2
–15
–10
0
–5
PIN (dBm)
5
10
5521 G26
IIP3 (dBm)
OUTPUT POWER (dBm)
0
27
10
0.5
20
13
–4
1750 1800 1850 1900 1950 2000 2050 2100 2150
RFOUT (MHz)
5521 G27
5521f
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LT5521
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TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO
= –5dBm, VCC = 3.3V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output
frequency and VCC = 3.3V.
Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage
LO-RF Leakage vs LO Frequency
8
–34
6
20
85°C
25°C
–40°C
GC (dB)
–35
–36
–37
4
NF
16
2
12
–38
GC
0
8
–39
–40
1500 1550 1600 1650 1700 1750 1800 1850 1900
LO FREQUENCY (MHz)
6
23
4
85°C
25°C
–40°C
2
21
19
GC
0
17
15
–2
–20
–15
–10
–5
LO POWER (dBm)
5521 G29
LO Leakage vs Supply Voltage
Noise Figure vs LO Power
–30
22
–32
20
13
10
5
0
5521 G31
LO-RF Leakage vs LO Power
–20
–23
NOISE FIGURE (dB)
–34
–40°C
–38
25°C
–26
18
16
85°C
14
25°C
–42
12
–40°C
–44
–25 –20
10
–20
–40
LO LEAKAGE (dBm)
85°C
LO LEAKAGE (dBm)
IIP3
–4
–25
–2
4
3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50
VCC (V)
5521 G28
–36
25
8
IIP3 (dBm)
LEAKAGE (dBm)
24
IIP3
IIP3 (dBm) AND NOISE FIGURE (dB)
–33
27
10
85°C
25°C
–40°C
GC (dB)
–32
Conversion Gain and IIP3
vs LO Power
–29
85°C
–32
–35
25°C
–40°C
–38
–41
–44
–47
0
–15 –10 –5
LO POWER (dBm)
5
10
–50
–15
–10
–5
LO POWER (dBm)
5521 G30
0
5
5521 G32
3.0
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
5521 G33
U
U
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PI FU CTIO S
GND (Pins 1, 4, 10, 11, 13, 14, 16): Ground. These pins
are internally connected to the Exposed Pad for improved
isolation. They should be connected to RF ground on the
printed circuit board, and are not intended to replace the
primary grounding through the backside of the package.
IN+, IN– (Pins 2, 3): Differential Input Pins. Each pin
requires a resistive DC path to ground. See Applications
Information for choosing the resistor value. External matching is required.
EN (Pin 5): Enable Input Pin. The enable voltage should be
at least 2.9V to turn the chip on and less than 0.2V to turn
the chip off.
VCC (Pins 6, 7, 8): Power Supply Pins. Total current draw
for these three pins is 40mA.
OUT+, OUT– (Pins 12, 9): RF Output Pins. These pins must
have a DC connection to the supply voltage (see Applications Information). These pins draw 20mA each. External
matching is required.
LO (Pin 15): Local Oscillator Input. This input is internally
DC biased to 0.96V. Input signal must be AC coupled.
Exposed Pad (Pin 17): Circuit Ground Return for the
Entire IC. For best performance, this pin must be soldered
to the printed circuit board.
5521f
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LT5521
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BLOCK DIAGRA
17
16
EXPOSED GND
PAD
1
2
3
4
15
LO
14
GND
13
GND
GND
OUT+
IN+
GND
IN –
GND
GND
OUT –
12
11
10
9
BIAS
EN
VCC
5
VCC
6
TEST CIRCUITS
VCC
7
8
5521 BD
C1
0.017"
LOIN
50Ω
εr = 4.4
RF
GND
0.062"
DC
0.017"
Z1
OPT
C2
IFIN
50Ω
R1
Z3
T1
Z14
C13
16
GND
1
L0
14
OUT+
IN+
LT5521
3
IN–
EXPOSED
PAD (17)
R7
GND
Z7
OPT
EN
5
GND
13
T2
GND GND
GND
2
4
C6
15
GND
GND
OUT
12
11
VCC
VCC
6
7
8
C3
RFOUT
50Ω
C4
10
– 9
VCC
L1
C12
L2
VCC
R8
C11
5521 F01
EN
Figure 1. Demonstration Board Schematic
Table 1. Demonstration Board Bill of Materials1, 2
REF
fIF = 250MHz, fRF = 1.95GHz fIF = 44MHz, fRF = 1.045GHz
fLO = 1.7GHz, VCC = 5V
fLO = 1.001GHz, VCC = 5V
fIF = 250MHz, fRF = 1.95GHz
fLO = 1.7GHz, VCC = 3.3V
R1, R7
110Ω, 1%
110Ω, 1%
22.6Ω, 1%
Z14
10pF
120nH
10pF
Z3
0Ω
150pF
0Ω
L1, L2
2.7nH
10nH
2.7nH
T1
M/A-COM MABACT00103
M/A-COM MABACT00103
M/A-COM MABACT00103
T2
M/A-COM ETC1.6-4-2-3
M/A-COM ETC1.6-4-2-3
M/A-COM ETC1.6-4-2-3
C1, C13
6.8pF
27pF
6.8pF
C3
82pF
3.9pF
82pF
C12
82pF
1nF
82pF
C2, C4, C6
1nF
1nF
1nF
C11
1µF
1µF
1µF
0Ω
0Ω
100nH
Z1, Z7
THIS COMPONENT CAN BE REPLACED BY PCB TRACE ON FINAL APPLICATION
R8
10k
10k
10k
Note 1: Tabulated values are used for characterization measurements.
Note 2: Components shown on the schematic are included for consistency with the demo board.
If no value is shown for the component, the site is unpopulated.
Note 3: T1 also M/A-COM ETC1-1-13 and Sprague Goodman GLSW4M202. These alternative transformers
have been measured and have similar performance.
5521f
9
LT5521
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APPLICATIO S I FOR ATIO
The LT5521 is a high linearity double-balanced active
mixer. The chip consists of a double-balanced mixer core,
a high performance LO buffer and associated bias and
enable circuitry. The chip is designed to operate with a
supply voltage ranging from 3.15V to 5.25V.
0
IF RETURN LOSS (dB)
–5
Table 2. Port Impedance
FREQUENCY
(MHz)
DIFFERENTIAL
INPUT
DIFFERENTIAL
OUTPUT
SINGLE-ENDED
LO
50
19.8 + j0.7
282.2 – j8.4
49.9 + j0.1
100
20.1 + j2.0
282.3 – j20.8
49.8 + j0.3
300
18.2 + j5.3
262.3 – j55.1
49.2 + j0.9
600
15.2 + j16.8
231.4 – j67.0
47.7 + j2.0
1000
14.5 + j28.1
215.0 – j124.5
45.3 + j2.8
1500
20.5 + j42.3
109.5 – j158.0
43.3 + j2.8
2000
48.2 + j26.8
52.9 – j92.1
43.0 + j3.3
2300
18.2 + j29.4
61.6 – j74.2
43.4 + j4.6
3200
22.4 + j125.1
14.2 – j27.5
44.6 + j14.0
3500
27.9 – j4.4
42.4 + j17.9
4000
42.8 – j16.0
38.6 + j22.8
–10
–15
–20
–25
–30
–35
–40
100
150
200
300
250
FREQUENCY (MHz)
400
350
5521 F03
Figure 2 shows the signal inputs of the LT5521. The signal
input pins are connected to the common emitter nodes of
the mixer quad differential pairs. The real part of the
differential IN+/IN– impedance is 20Ω. The mixer core
current is set by external resistors R1 and R7. Setting their
values at 110Ω, the nominal DC voltage at the inputs is
2.2V with VCC = 5V. Figure 3 shows the input return loss
for a matched input at 250MHz.
Z1
OPT
C2
2
VCC
3
C6
1nF
IN +
C13
Z14
IN –
R7
Z7
OPT
Figure 2. Signal Input with External Matching
IF
C2
Z14
Z3
44MHz
1000pF
120nH
150pF
95MHz
820pF
33pF
27nH
120MHz
1000pF
27pF
18nH
150MHz
330pF
22pF
10nH
170MHz
330pF
18pF
6.8nH
250MHz
82pF
10pF
0Ω
300MHz
15pF
3.9pF
0Ω
435MHz
8.2pF
0.5pF
0Ω
520MHz
6.8pF
Unused
0Ω
Below 100MHz, the Mini-Circuits TCM2-1T or the Pulse
CX2045 are better choices for a wider input match. This
configuration is shown in Figure 4. The series 1nF capacitors maintain differential symmetry while providing DC
isolation between the inputs. This helps to improve LO
suppression.
LT5521
R1
Z3
T1
1:1
For input frequencies above 100MHz, a broadband impedance matching tranformer with a 1:1 impedance ratio
is recommended. Table 3 provides the component values
necessary to match various IF frequencies using the M/ACOM CT0010 transformer (T1, Figure 1).
Table 3. Component Values for Input Matching Using the
M/A-COM CT0010
Signal Input Interface
IFIN
50Ω
Figure 3. IF Input Return Loss
5521 F02
Shunt capacitor C13 (Figure 2) is an optional capacitor
across the input pins that significantly improves LO suppression. Although this capacitor is optional, it is important to regulate LO suppression, mitigating part-to-part
variation. This capacitor should be optimized depending
5521f
10
LT5521
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APPLICATIO S I FOR ATIO
IFIN
50Ω
T1
2:1
Operation at Reduced Supply Voltage
LT5521
R1
1nF
C2
2
C13
IN +
VCC
1nF
3
IN –
R7
5521 F04
Figure 4. Low Frequency Signal Input
on the IF input frequency and the LO frequency. Smaller
C13 values have reduced impact on the LO output suppression; larger values will degrade the conversion gain.
A single-ended 50Ω source can also be matched to the
differential signal inputs of the LT5521 without an input
transformer. Figure 5 shows an example topology for a
discrete balun, and Table 4 lists component values for
several frequencies. The discrete input match is intrinsically narrowband. LO suppression to the output is degraded and noise figure degrades by 4dB for input
frequencies greater than 200MHz. Noise figure degradation is worse at lower input frequencies.
C2
82pF
IFIN
50Ω
R1
110Ω
C16
L4
LT5521
2
C13
C14
3
L3
IN+
IN –
R7
110Ω
5521 F05
1nF
Figure 5. Alternative Transformerless Input Circuit
Using Low Cost Discrete Components
Table 4. Component Values for Discrete Bridge Balun Signal
Input Matching
IF (MHz)
C14, C16 (pF)
L3, L4 (nH)
220
22
22
250
18
18
640
4.7
4.7
External resistors R1 and R7 (Figure 2) set the current
through the mixer core. For best distortion performance,
these resistors should be chosen to maintain a total of
40mA through the mixer core (20mA per side). At 5V
supply, R1 and R7 should be 110Ω. Table 5 shows
recommended values for R1 and R7 at various supply
voltages. Caution: Using values below the recommended
resistance can adversely affect operation or damage the
part.
Table 5. Minimum External Resistor Values vs Supply Voltage
VCC (V)
5
4.5
4
3.5
3.3
R1, R7 (Ω)
110
82.5
54.9
38.3
23.2
Excessive mismatch between the external resistors R1
and R7 will degrade performance, particularly LO suppression. Resistors with 1% mismatch are recommended
for optimum performance.
Figure 2 shows RF chokes in series with R1 and R7. These
inductors are optional. In general, the chokes improve the
conversion gain and noise figure by 2dB at 3.3V (i.e., at the
minimum values of R1 and R7). The DC resistance variation of the RF chokes must be considered in the 1% source
resistance mismatch suggested for maintaining LO suppression performance.
Figure 6 indicates the typical performance of the LT5521
as the external source resistance (R1, R7) is varied while
keeping the supply current constant. Figure 6 data was
taken without the benefit of input chokes, and shows the
gradual gain degradation for smaller values of the input
resistors R1 and R7. Figure 7 shows the typical behavior
when the supply voltage is fixed and the core current is
varied by adjusting values of the external resistors R1 and
R7. Decreasing the core current decreases the power
consumption and improves noise figure but degrades
distortion performance. Figure␣ 8 demonstrates the impact of the RF chokes in series with the source resistance
at 3.3V. There is a 2dB improvement in conversion gain
and noise figure and a corresponding decrease in IIP3.
5521f
11
LT5521
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APPLICATIO S I FOR ATIO
3.5
30
CONVERSION GAIN (dB)
2.5
25
TA = 25°C
f = 250MHz
1.5 fIF = 1.7GHz
LO
fRF = 1.95GHz
20
0.5
15
NF
–0.5
10
GC
–1.5
5
–2.5
0
20
40
80 100
60
R1 AND R7 (Ω)
120
IIP3 (dBm) AND NOISE FIGURE (dB)
IIP3
0
140
5521 F06
Figure 6. IIP3, GC and Noise Figure vs External Resistance,
Constant Core Current (Variable Supply Voltage)
30
TA = 25°C
fIF = 250MHz
1.2 fLO = 1.7GHz
fRF = 1.95GHz
VCC = 4V
0.6
25
IIP3
20
0
15
NF
–0.6
10
–1.2
–1.8
5
GC
15
20
25
30
35
CORE CURRENT (mA)
40
45
IIP3 (dBm) AND NOISE FIGURE (dB)
CONVERSION GAIN (dB)
1.8
0
5521 F07
Figure 7. IIP3, GC and Noise Figure vs Core Current,
Constant Supply Voltage
The user can tailor the biasing of the LT5521 to meet
individual system requirements. It is recommended to
choose a source resistance as large as possible to minimize sensitivity to power supply variation.
Output Interface
A DC connection to VCC must be provided on the PCB to the
output pins. These pins will draw approximately 20mA
each from the power supply. On-chip, there is a nominal
300Ω differential resistance between the output pins.
Figure 9 shows a typical matching circuit using an external
balun to provide differential to single-ended conversion.
LO suppression and 2xLO suppression are influenced by
the symmetry of the external output matching circuitry.
PCB design must maintain the trace layout symmetry of
the output pins as much as possible to minimize these
signals.
The M/A-COM ETC1.6-4-2-3 4:1 transformer (T2, Figure␣ 9) is suitable for applications with output frequencies
between 500MHz and 2700MHz. Output matching at various frequencies is achieved by adding inductors in series
with the output (L1, L2) and DC blocking capacitor C3, as
shown in Figure 9. Table 6 specifies center frequency and
bandwidth of the output match for different matching
configurations. Figure 10 shows the typical output return
loss vs frequency for 1GHz and 2GHz applications. Capacitor C12 provides a solid AC ground at the RF output
frequency.
30
9
IIP3
CONVERSION GAIN (dB)
25
fRF = 1.95GHz
TA = 25°C
5 fIF = 250MHz VCC = 3.3V
fLO = 1.7GHz
RFC
20
NF
15
3
RFC
10
1
GC
RFC
5
–1
–3
25
30
35
40
45
CORE CURRENT (mA)
50
55
IIP3 (dBm) AND NOISE FIGURE (dB)
7
LT5521
OUT+
L1
12
T2
4:1
C3
OUT
300Ω
VCC
VCC
OUT –
L2
9
0
C12
5521 F09
5521 F08
Figure 8. Comparison of 3.3V Performance With
and Without Input RF Choke
Figure 9. Simplified Output Circuit
with External Matching Components
5521f
12
LT5521
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APPLICATIO S I FOR ATIO
Table 6. Matching Values Using M/A-COM ETC1.6-4-2-3
Output Transformer
fOUT
L1, L2
C3
C12
∆f (10dB RL)
2.4GHz
0nH
82pF
82pF
450MHz
Johanson Technology supplies the 3700BL15B100S hybrid balun for use between 3.4GHz and 4GHz. With additional matching, this transformer can be used for
applications between 3.3GHz and 3.7GHz. Example LT5521
performance is shown in Figure 11.
1nH
82pF
82pF
430MHz
2.0GHz
2.7nH
82pF
82pF
400MHz
1.7GHz
4.7nH
82pF
82pF
400MHz
10
1.3GHz
10nH
82pF
82pF
400MHz
8
10nH
3.9pF
1nF
500MHz
5
RETURN LOSS (dB)
0
1GHz
2GHz
–5
LS
20
HS
CONVERSION GAIN (dB)
1.0GHz
22
–10
6
4
IIP3
16
HS
NF
14
2
LS
12
0
GC
–2
–15
18
TA = 25°C
fIF = 300MHz
–4
3.2
LS
10
HS
3.3
–20
3.6
3.5
3.4
FREQUENCY (GHz)
IIP3 (dBm) AND NOISE FIGURE (dB)
2.2GHz
8
3.7
3.8
5521 F11
–25
–30
0.7
1.2
1.7
Figure 11. LT5521 Performance for an Application Tuned to
3.5GHz with Low Side (LS) and High Side (HS) LO Injection
2.2
FREQUENCY (GHz)
LO Interface
5521 F10
Figure 10. Output Return Loss vs Frequency
For applications with LO and output frequencies below
1GHz, the M/A-COM MABAES0054 is recommended for
the output component T2. This transformer maintains
better low frequency output symmetry. Table 7 lists components necessary for a 750MHz output match using the
M/A-COM MABAES0054.
Table 7. Matching Values Using M/A-COM MABAES0054
Output Transformer
fOUT
L1, L2
C3
C12
∆f (10dB RL)
750MHz
33nH
82pF
1nF
500MHz
Hybrid baluns provide a low cost alternative for differential to single-ended conversion. The critical performance
parameters of conversion gain, IIP3, noise figure and LO
suppression are largely unaffected by these transformers. However, their limited bandwidth and reduced symmetry outside the frequency of operation degrades the
suppression of higher order LO harmonics, particularly
2xLO. Murata LBD21 series hybrid balun transformers,
for example, can be used for output frequencies as low as
840MHz and as high as 2.4GHz.
The LO input pin is internally matched to 50Ω. It has an
internal DC bias of 960mV. External AC coupling is required. Figure 12 shows a simplified schematic of the LO
input. Overdriving the LO input will dramatically reduce
the performance of the mixer. The LO input power should
not exceed +1dBm for normal operation. Select C1 (Figure
12) only large enough to achieve the desired LO input
return loss. This reduces external low frequency signal
amplification through the LO buffer.
For applications with LO frequency in the range of 2.1GHz
to 2.4GHz, the LT5521 achieves improved distortion and
LT5521
60Ω
VCC
C1
LOIN
50Ω
8Ω
15
60Ω
5521 F12
Figure 12. Simplified LO Input Circuit
5521f
13
LT5521
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0
0Ω resistor. If the shutdown function is not required, then
the EN pin should be wired directly to the VCC power supply
on the PCB.
RETURN LOSS (dB)
–5
–10
C1 = 6.8pF
Supply Decoupling
–15
–20
The power supply decoupling shown in the schematic of
Figure 1 is recommended to minimize spurious signal
coupling into the output through the power supply.
C1 = 2.7pF
–25
–30
–35
0
500 1000 1500 2000 2500 3000 3500 4000
FREQUENCY (MHz)
5521 F13
Figure 13. LO Port Return Loss
noise performance with slightly reduced current through
the mixer core. Accordingly, in a 5V application operating
within this LO frequency range, the recommended source
resistor value (R1 and R7) is increased to 121Ω.
ACPR Performance
Because of its high linearity and low noise, the LT5521 offers
outstanding ACPR performance in a variety of applications.
For example, Figures 15 and 16 show ACPR and Alternate
Channel measurements for single channel and 4-channel
64 DPCH W-CDMA signals at 1.95GHz output frequency.
–30
–40
LT5521
ACPR
–140
–60
–145
–150
ACPR
–80
–155
–90
–160
30MHz OFFSET NOISE
–100
–40
–165
–30
–20
–10
0
OUTPUT CHANNEL POWER (dBm)
10
5521 F15
Figure 15. Single Channel W-CDMA ACPR
and 30MHz Offset Noise Performance
–50
–135
–55
–140
–60
–145
ACPR
–65
–70
–150
TA = 25°C
fRF = 1.95GHz
fIF = 70MHz
fLO = 1.88GHz
AltCPR
–155
–75
VCC
NOISE FLOOR (dBm/Hz)
It is important that the voltage at the EN pin never exceed
VCC, the power supply voltage, by more than 0.2V. If this
should occur, the supply current could be sourced through
the EN pin ESD protection diodes, potentially damaging
the IC. The resistor R8 (Figure 1) in series with the EN pin
on the demo board is populated with a 10kΩ resistor to
protect the EN pin to avoid inadvertant damage to the IC.
For timing measurements, this resistor is replaced with a
–50
–70
ACPR AND AltCPR (dB)
Figure 14 shows a simplified schematic of the EN pin
interface. The voltage necessary to turn on the LT5521 is
2.9V. To disable the chip, the enable voltage must be below
0.2V. If the EN pin is not connected, the chip is disabled.
It is not recommended, however, that any pins be left
floating for normal operation.
–135
NOISE FLOOR (dBm/Hz)
Enable Interface
–130
TA = 25°C
fRF = 1.95GHz
fIF = 70MHz
fLO = 1.88GHz
–160
30MHz OFFSET NOISE
–80
–165
–40
–15
–30
–25
–20
–35
OUTPUT CHANNEL POWER, EACH CHANNEL (dBm)
1635 G24
EN
5
5521 F14
Figure 14. Enable Input Circuit
Figure 16. 4-Channel W-CDMA ACPR,
AltCPR and 30MHz Offset Noise Floor
5521f
14
LT5521
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APPLICATIO S I FOR ATIO
Figure 17. Top View of Demo Board
U
PACKAGE DESCRIPTIO
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
BOTTOM VIEW—EXPOSED PAD
4.00 ± 0.10
(4 SIDES)
0.72 ±0.05
4.35 ± 0.05
2.15 ± 0.05
(4 SIDES)
0.75 ± 0.05
R = 0.115
TYP
PIN 1
TOP MARK
(NOTE 6)
0.55 ± 0.20
15
16
1
2.15 ± 0.10
(4-SIDES)
2
2.90 ± 0.05
PACKAGE
OUTLINE
0.30 ±0.05
0.65 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
(UF) QFN 1103
0.200 REF
0.00 – 0.05
0.30 ± 0.05
0.65 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
5521f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT5521
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Infrastructure
LT5511
High Linearity Upconverting Mixer
RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer
LT5512
DC-3GHz High Signal Level Downconverting Mixer
DC to 3GHz, 21dBm IIP3, Integrated LO Buffer
LT5514
Ultralow Distortion, Wideband Digitally Controlled
Gain Amplifier/ADC Driver
BW = 850MHz, OIP3 = 47dBm at 100MHz, 22.5dB Gain Control Range
LT5515
1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator
20dBm IIP3, Integrated LO Quadrature Generator
LT5516
0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator
21.5dBm IIP3, Integrated LO Quadrature Generator
LT5517
40MHz to 900MHz Quadrature Demodulator
21dBm IIP3, Integrated LO Quadrature Generator
LT5519
0.7GHz to 1.4GHz High Linearity Upconverting Mixer
17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω
Matching, Single-Ended LO and RF Ports Operation
LT5520
1.3GHz to 2.3GHz High Linearity Upconverting Mixer
15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω
Matching, Single-Ended LO and RF Ports Operation
LT5522
600MHz to 2.7GHz High Signal Level Downconverting Mixer
4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB,
50Ω Single-Ended RF and LO Ports
RF Power Detectors
LT5504
800MHz to 2.7GHz RF Measuring Receiver
80dB Dynamic Range, Temperature Compensated,
2.7V to 5.25V Supply
LTC®5505
RF Power Detectors with >40dB Dynamic Range
300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply
LTC5507
100kHz to 1000MHz RF Power Detector
100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply
LTC5508
300MHz to 7GHz RF Power Detector
44dB Dynamic Range, Temperature Compensated, SC70 Package
LTC5509
300MHz to 3GHz RF Power Detector
36dB Linear Dynamic Range, Low Power Consumption, SC70 Package
LTC5530
300MHz to 7GHz Precision RF Power Detector
Precision VOUT Offset Control, Shutdown, Adjustable Gain
LTC5531
300MHz to 7GHz Precision RF Power Detector
Precision VOUT Offset Control, Shutdown, Adjustable Offset
LTC5532
300MHz to 7GHz Precision RF Power Detector
Precision VOUT Offset Control, Adjustable Gain and Offset
LT5534
50MHz to 3GHz RF Power Detector
60dB Dynamic Range, Temperature Compensated, SC70 Package
Low Voltage RF Building Blocks
LT5500
1.8GHz to 2.7GHz Receiver Front End
1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer
LT5502
400MHz Quadrature IF Demodulator with RSSI
1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain,
90dB RSSI Range
LT5503
1.2GHz to 2.7GHz Direct IQ Modulator and
Upconverting Mixer
1.8V to 5.25V Supply, Four-Step RF Power Control,
120MHz Modulation Bandwidth
LT5506
500MHz Quadrature IF Demodulator with VGA
1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB
Linear Power Gain, 8.8MHz Baseband Bandwidth
LT5546
500MHz Ouadrature IF Demodulator with
VGA and 17MHz Baseband Bandwidth
17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V
Supply, –7dB to 56dB Linear Power Gain
RF Power Controllers
LTC1757A
RF Power Controller
Multiband GSM/DCS/GPRS Mobile Phones
LTC1758
RF Power Controller
Multiband GSM/DCS/GPRS Mobile Phones
LTC1957
RF Power Controller
Multiband GSM/DCS/GPRS Mobile Phones
LTC4400
SOT-23 RF PA Controller
Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range,
450kHz Loop BW
LTC4401
SOT-23 RF PA Controller
Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range,
250kHz Loop BW
LTC4403
RF Power Controller for EDGE/TDMA
Multiband GSM/GPRS/EDGE Mobile Phones
5521f
16
Linear Technology Corporation
LT/TP 0604 1K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2004