MP9184 17A, 600kHz, 20V, Wide Input Range, Synchronous Boost Converter in a Small 3mm x 4mm QFN Package The Future of Analog IC Technology DESCRIPTION The MP9184 is a 600kHz, fixed-frequency, high-efficiency, wide input range, current-mode boost converter with optional internal or external current-sensing configuration for highintegration and high-power applications. With a current limit above 17A, the MP9184 supports a wide range of applications, including POS, Thunderbolt, Bluetooth Audio, Power Banks, and Fuel Cells. The MP9184 features a 10mΩ, 24V power switch and a synchronous gate driver for high efficiency. An external compensation pin gives the user flexibility in setting loop dynamics and obtaining optimal transient performance at all conditions. The MP9184 includes under-voltage lockout (UVLO), switching-current limiting, and thermal shutdown (TSD) to prevent damage in the event of an output overload. The MP9184 is available in a low-profile 22-pin 3mm x 4mm QFN package. FEATURES 3V to 20V Wide Input Range Integrated 10mΩ Low-Side Power FET SDR Driver for Synchronous Solution >17A Switch-Current Limit Up to 97.5% Efficiency Optional Internal/External CurrentSensing Configuration External Soft Start and Compensation for Higher Flexibility Programmable UVLO and Hysteresis < 1µA Shutdown Current Thermal Shutdown at 150℃ Available in a 3mm x 4mm QFN-22 Package APPLICATIONS USB Type-C Thunderbolt Interface Notebooks and Tablets Bluetooth Audio Power Banks Fuel Cells POS Systems All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 100 95 90 85 80 75 70 65 60 55 50 45 40 0.001 MP9184 Rev. 1.0 8/27/2015 VIN=8.4V VIN=6V VIN=4.2V VIN=3V 0.01 0.1 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 1 10 1 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE ORDERING INFORMATION Part Number* MP9184GL Package QFN-22 (3mm×4mm) Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP9184GL–Z); TOP MARKING MP: MPS prefix: Y: year code; W: week code: 9184: first four digits of the part number; LLL: lot number; PACKAGE REFERENCE TOP VIEW MP9184 Rev. 1.0 8/27/2015 SW SW PGND PGND 20 19 18 17 BST 1 16 AGND SDR 2 15 SS OUT 3 14 FB EN 4 13 COMP MODE 5 12 VDD SENSE 6 11 IN SW 21 PGND 22 7 8 9 10 SW SW PGND PGND www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 2 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (5) SW .....................–0.3V to +24V (28V for <10ns) IN, SENSE, OUT .........................–0.3V to +24V MODE ....................................–0.3V to Vin+5.5V BST, SDR ............................ –0.3V to Vsw+5.5V All Other Pins ..............................–0.3V to +5.5V EN bias current………………………… 0.5mA(2) Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C (3) Continuous Power Dissipation (TA= +25oC) ................................................................... 2.6W QFN-22 (3mmx4mm) …. 48 Recommended Operating Conditions (4) Supply Voltage VIN ..............................3V to 20V Output Voltage VOUT ............................VIN to 22V EN bias current…………………0mA to 0.3mA(2) Operating Junction Temp.(TJ).. -40°C to +125°C MP9184 Rev. 1.0 8/27/2015 θJA θJC 11 °C/W Notes: 1) Exceeding these ratings may damage the device. 2) Refer to “Enable and Programmable UVLO” section 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 3 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE ELECTRICAL CHARACTERISTICS VIN = VEN = 3.3V, TJ = -40C to 125C, typical value is tested at 25C, unless otherwise noted. Parameter Operating Input Voltage Input UVLO Input UVLO Hysteresis Operating VDD Voltage Shutdown Current Quiescent Current Switching Frequency Minimum Off Time Minimum On Time (7) EN Turn-On Threshold EN High Threshold EN Low Threshold EN Turn-On Hysteresis Current EN Input Bias Current Soft-Start Charge Current FB Reference Voltage FB Input Bias Current SDR Rise Time(7) SDR Fall Time(7) Error Amp Voltage Gain(6) Error Amp Transconductance Error Amp Max Output Current Current to COMP Gain Sense to COMP Gain Comp Threshold for Switching (7) Comp High Clamp SW On Resistance SW Current Limit External Sense Average-Current Limit External Sense-Current Limit Protection Time Thermal Shutdown(7) Thermal Shutdown Hysteresis (7) Symbol Condition VIN INUVLO-R VIN Rising INUVLO-HYS VDD VIN=12V VEN = 0V, Measured on ISD IN pin, TJ=25C VFB = 1.35V, Measured IQ on IN pin TJ=25C FS TJ=-40C to 125C TMIN-OFF VFB = 0V TMIN-ON VEN-ON VEN Rising (switching) VEN-H VEN Rising (micro power) VEN Falling (micro VEN-L power) IEN-HYS 1.0V < EN < 1.4V IEN VEN = 0V, 3.3V ISS TJ=25C VFB TJ=-40C to 125C IFB VFB=1V CLoad=2.7nF, Test from TSDR_Rise 10% to 90% CLoad=2.7nF, Test from TSDR_Fall 90% to 10% AV_EA GEA VFB=1V or 1.5V Gcs VMODE=GND MODE pin float, Gxcs ΔVSENSE/ΔVCOMP VPSM Min 3 2.6 510 450 1.27 VMODE=GND, Duty Cycle TJ=25oC VCL MODE pin float TCL MODE pin float = 40%, Max 20 2.76 Units V V mV V 1 μA 600 750 μA 600 690 690 kHz 2.68 250 5 220 120 1.33 1.39 1.0 0.4 3 5 1.212 1.207 –50 ns ns V V V 4.5 0 7 1.225 1.225 6 9 1.238 1.243 μA μA μA V nA 20 ns 30 ns 300 160 22 27 V/V μA/V μA A/V 103 mV/V 0.5 1.8 10 V V mΩ 17 22 A 45 54 RON ILIMT Typ 63 mV 1.1 ms TSD 150 C TSD-HYS 25 C Notes: 6) Guaranteed by Design. 7) Guaranteed by engineering sample Characterization, not tested in production. MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 4 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE TYPICAL CHARACTERISTICS VIN = VEN = 3.3V, VOUT = 12V, L = 2.2µH, TA = 25°C, unless otherwise noted. Quiescent Current vs. Input Voltage Shutdown Current vs. Input Voltage 900 5 Vin UVLO Threshold vs. Temperature VEN=LOW 3.0 UVLO THRESHOLD (V) Rising Threshold 800 4 700 3 600 2 500 1 400 0 4 8 12 VIN(V) 16 0 20 8 12 VIN(V) 16 1.2 Low Threshold 0.8 0.4 REGULATION VOLTAGE(V) Turn-on threshold 1.6 575 550 -40 -20 0 20 40 60 80 100120140 MP9184 Rev. 1.0 8/27/2015 8.0 7.5 1.2 7.0 6.5 1.1 6.0 5.5 5.0 -40 -20 0 20 40 60 80 100120140 Current Limit vs. Temperature Current Limit vs. Duty Cycle CURRENT LIMIT (A) 600 1.8 VSS=0V 9.0 1.3 25 625 Falling Threshold 8.5 Switch Frequency vs. Temperature 650 2.1 SS Charge Current vs. Temperature 1.0 -40 -20 0 20 40 60 80 100120140 0 -40 -20 0 20 40 60 80 100120140 2.4 1.5 -40 -20 0 20 40 60 80 100120140 20 1.4 2.0 EN THRESHOLD (V) 4 Vref vs. Temperature EN Threshold vs. Temperature OPERATION FREQUENCY(kHz) 0 VMODE=GND VMODE=GND,Duty=75% 25 CURRENT LIMIT (A) 300 2.7 20 15 10 5 20 30 40 50 60 70 80 90 20 15 10 5 -40 -20 0 20 40 60 80 100120140 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 5 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE TYPICAL CHARACTERISTICS (continued) VIN = VEN = 3.3V, VOUT = 12V, L = 2.2µH, TA = 25°C, unless otherwise noted. 55 54.5 54 53.5 53 52.5 52 -40-20 0 20 40 60 80 100 120 140 MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 6 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3V, VOUT = 12V, L = 2.2µH, IOUT=2A, COUT=22µF*3, VMODE=float, RSENSE=4mΩ TA = 25°C, unless otherwise noted. Load Regulation VMODE=GND 100 95 90 85 80 75 70 65 60 55 50 45 40 0.001 100 95 90 85 80 75 70 65 60 55 50 45 40 0.001 VIN=8.4V VIN=6V VIN=4.2V VIN=3V 0.01 0.1 IOUT(A) 1 10 Line Regulation 1 0.6 VIN=3V 0.2 -0.2 -0.6 0.01 0.1 IOUT(A) 1 1 1 2 3 4 IOUT(A) 5 6 Case Temperature Rise vs. Output Current VMODE=GND, VOUT=5V, 4-layer board 50 VIN=8.4V -1 0 10 Case Temperature Rise vs. Output Current VMODE=GND VIN=4.2V VIN=4.2V VMODE=GND, VOUT=12V, 4-layer board 90 80 40 IOUT=10mA 0.2 30 -0.2 20 -0.6 -1 4 6 8 IOUT(A) 10 60 50 VIN=3V 40 30 10 IOUT=2A 2 0 12 0 180 60 48 144 48 36 108 PHASE 24 72 12 36 0 -12 0 -36 GAIN -72 PHASE MARGIN(DEG) LOOP GAIN(dB) LOOP GAIN(dB) 2 3 4 5 IOUT(A) 6 7 10 8 VIN=3V,IOUT=2A,VMODE=GND 0 1 2 3 4 IOUT(A) 5 6 7 36 144 PHASE 108 24 72 12 36 0 -12 0 -36 -24 GAIN -72 -108 -36 -108 -48 -144 -48 -144 -180 1000 10000 100000 1000000 FREQUENCY (Hz) MP9184 Rev. 1.0 8/27/2015 VIN=6V 180 -36 -60 100 0 Bode Plot VIN=3V,IOUT=0.3A,VMODE=GND -24 1 VIN=8.4V 20 VIN=4.2V Bode Plot 60 70 VIN=4.2V VIN=3V -60 100 PHASE MARGIN(DEG) 0.6 -180 1000 10000 100000 1000000 FREQUENCY (Hz) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 7 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3V, VOUT = 12V, L = 2.2µH, IOUT=2A, COUT=22µF*3, VMODE=float, RSENSE=4mΩ TA = 25°C, unless otherwise noted. VOUT AC Coupled 200mV/div. VOUT AC Coupled 200mV/div. VIN 2V/div. VSW 10V/div. VIN 2V/div. VSW 10V/div. IL 5A/div. IL 5A/div. IL 2A/div. VOUT 5V/div. VOUT 5V/div. VOUT 5V/div. VIN 5V/div. VIN 5V/div. VIN 5V/div. VSW 10V/div. VSW 10V/div. VSW 10V/div. IL 5A/div. IL 2A/div. IL 5A/div. VOUT 5V/div. VEN 5V/div. VOUT 5V/div. VEN 5V/div. VOUT 5V/div. VEN 5V/div. VSW 10V/div. VSW 10V/div. VSW 10V/div. IL 2A/div. IL 5A/div. IL 2A/div. MP9184 Rev. 1.0 8/27/2015 VOUT 5V/div. VIN 5V/div. VSW 10V/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 8 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3V, VOUT = 12V, L = 2.2µH, IOUT=2A, COUT=22µF*3, VMODE=float, RSENSE=4mΩ TA = 25°C, unless otherwise noted. EN Shutdown IOUT=2A VOUT 5V/div. VEN 5V/div. VSW 10V/div. IL 5A/div. MP9184 Rev. 1.0 8/27/2015 VOUT AC Coupled 1V/div. VOUT AC Coupled 1V/div. VIN 5V/div. VIN 5V/div. VSW 10V/div. VSW 10V/div. ILOAD 1A/div. ILOAD 2A/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 9 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE PIN FUNCTIONS Package Pin # 1 2 Name BST SDR 3 OUT 4 EN 5 MODE 6 SENSE 7,8,19,20,21 SW 9,10,17,18,22 PGND 11 IN 12 VDD 13 COMP 14 FB 15 SS 16 AGND MP9184 Rev. 1.0 8/27/2015 Description Bootstrap. BST powers the SDR driver. Synchronous Gate Driver for the Output Rectifier. Sample Output Voltage. OUT provides the sample output voltage and the charge for the BST capacitor. VDD is powered from OUT when VOUT is higher than VIN. Chip Enable Control Input. Active high. Regulator on/off control input. When not used, connect EN to the input source through a 100kΩ pull-up resistor for automatic start-up (if VIN > 5.5V). Also, EN can program Vin UVLO. Do not leave EN floating. Mode Select. Selects the internal or external current sensing mode. Connect to GND to use internal current-sensing block. If floating, use an external current-sense resistor. DO NOT pull MODE down to GND through a resistor. Voltage Sense. Voltage sensed between SENSE and IN. The voltage sensed between SENSE and IN determines the external current-sense signal. Power Switch Output. SW is the drain of the internal Power MOSFET. Connect the power inductor and output rectifier to SW. Power Ground. Input Supply. IN must be bypassed locally. Internal Bias Supply. Decouple with a 2.2μF ceramic capacitor as close to FB as possible. Compensation. Connect a capacitor and resistor in series to AGND for loop stability. Feedback Input. Reference voltage is 1.225V. Connect a resistor divider from VOUT to FB. Soft-Start Control. Connect a soft-start capacitor to SS. The soft-start capacitor is charged with a constant current. Leave SS disconnected if the soft-start is not used. Analog Ground. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 10 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE FUNCTIONAL BLOCK DIAGRAM IN VDD SENSE & + Internal Regulator Enable Circuitry EN MODE Charge Pump Regulator Oscillator & Slope Current Limit Switch Control Logic SW OUT BST SDR PWM Control Logic Boost Strap Regulator GND SR Driver SW Q FB 7uA GM 1. 225V SS COMP Figure 1. Functional Block Diagram MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 11 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE OPERATION The MP9184 is a 600kHz fixed-frequency, highefficiency, wide input range, current-mode boost converter with optional internal or external current-sensing configuration for highintegration and high-power applications (see Figure 1). Boost Function The MP9184 uses constant frequency, peakcurrent mode, boost regulation architecture to regulate the feedback voltage. At the beginning of each cycle, the N-channel MOSFET switch Q is turned on, forcing the inductor current to rise. When floating MODE, the current at the source of switch Q is measured externally; then it is converted to a voltage by the current-sense amplifier. That voltage is compared to the error voltage on COMP (which is an amplified version of the difference between the 1.225V reference voltage and the feedback voltage). When these two voltages are equal, the PWM comparator turns off switch Q. This forces the inductor current into the output capacitor through the external rectifier, causing the inductor current to decrease. The peak-inductor current is controlled by the voltage on COMP, which in turn is controlled by the output voltage. To satisfy the load, the output voltage is regulated by the inductor current. Current mode regulation improves transient response and control loop stability. VDD Power MP9184 is powered by VDD. A ceramic capacitor no less than 2.2μF is required to decouple VDD. During start-up, VDD power is regulated by IN. Once the output voltage exceeds the input voltage, VDD is powered from VOUT (instead of VIN). This allows the MP9184 to maintain low Ron and high efficiency, even with low-input voltage. Soft-Start (SS) MP9184 uses one external capacitor on SS to control SW frequency during start-up. The operation frequency is initially ¼ of the normal frequency. As the SS capacitor is charged, the frequency increases continuously. When the MP9184 Rev. 1.0 8/27/2015 voltage on SS exceeds ~0.65V, the frequency switches to a normal frequency. In addition, the voltage on COMP is clamped within VSS+0.7V. During start-up the COMP voltage reaches 0.7V quickly, and then rises at the same rate of VSS. These two mechanisms prevent highinrush current from the input power supply. SDR and BST Function The MP9184 generates a synchronous gatedriving signal that complements the gate driver of the internal MOSFET. The SDR driver is powered from BST (5V, typically) and a low QG N-channel MOSFET (a gate-source threshold voltage lower than 3V is preferred). In highpower applications, using a synchronous rectifier switch improves overall conversion efficiency. If a synchronous rectifier switch is not used, float SDR. The 5V driver power-bootstrap voltage is powered from OUT. If output voltage is low (or the duty cycle is too low), BST voltage may not be regulated to 5V, triggering a BST_UVLO. A schottky diode from an external 5V source to BST is recommended, otherwise, the SDR driver signal may be lost. Current Sensing Configuration The MP9184 offers the option of using the internal circuit or an external resistor to sample the inductor current. When using the internal current sense, MODE must be connected directly to GND before powering on. Meanwhile, SENSE should be connected to IN. In this configuration, sensed current is compared to both the COMP voltage and the limit peak current cycle-by-cycle during an overload condition. When floating MODE, the inductor current is sampled by an external sense resistor between IN and SENSE. Under this configuration, sensed current is compared with COMP for lowside switch on/off control. However, the overload is protected by the average inductor current. When the sensed current signal exceeds 54mV, COMP is pulled low to regulate the boosted current. This causes the MP9184 to enter hiccup mode (after 1.1ms). The MP9184 re-starts after about 60ms in hiccup www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 12 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE mode. If the sampled current signal rises to 100mV (within the 1.1ms blank time), immediately the MP9184 operates in hiccup mode. The MP9184 starts switching in internal currentsense mode after it detects 0V on MODE. In external current-sense mode, MP9184 detects MODE voltage and starts switching (after MODE is higher than Vin + 2V). In over-current or hiccup mode, MODE is pulled low. If the average current limit is triggered before switching, MP9184 may not start switching because MODE is regulated to low in an overload condition. If the peak-inductor current is higher than 6A, an external current-sensing resistor is recommended. Do NOT change the sensing configuration when MP9184 is in operation. Light-Load Operation To optimize efficiency at light load, MP9184 employs a pulse-skipping mechanism and foldback frequency. When the load becomes lighter, the COMP voltage decreases, causing the MP9184 to enter foldback operation (the lighter the load, the lower the frequency). However, if the load becomes exceedingly low, MP9184 enters PSM. PSM operation is optimized so that only one SW pulse is launched every burst cycle; therefore the output ripple is very low. Enable (EN) and Programmable UVLO EN enables and disables the MP9184. When applying voltage higher than the EN higher threshold (1V, typically), MP9184 starts up some of the internal circuits (micro-power mode). If EN voltage exceeds the turn-on threshold (1.33V), the MP9184 enables all functions and starts boost operation. Boost operation is disabled when EN voltage falls below its lower threshold (1.33V). To completely shut down the MP9184, <0.4V lowlevel voltage is required on EN. After shutdown, MP9184 sinks a current from input power (less than 1uA, typically). The maximum recommended voltage on EN is 5.5V. If the EN control signal comes from a voltage higher than 5.5V, a resistor should be added between EN and the control source. An internal Zener diode on EN clamps the EN voltage to prevent runaway. Ensure the Zener clamped current flowing into EN is less than 0.3mA. Meanwhile, EN can program Vin’s UVLO (see “Applications\UVLO Hysteresis” section). Thermal Shutdown (TSD) To prevent thermal damage, the device has an internal temperature monitor. If the die temperature exceeds 150°C, the converter shuts down. Once the temperature drops below 125°C, the power supply resumes operation . MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 13 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE APPLICATION INFORMATION Selecting Current Limit Resistor When an external resistor is used, MP9184 has an average current limit. The resistor RSENSE (connected from the input voltage to SENSE), sets the current limit (ICL): ICL VCL / RSENSE Where, VCL is 54mV, typically, ICL is in amperes, and RSENSE is in mΩ. UVLO Hysteresis The MP9184 features a programmable UVLO hysteresis. When powering up, EN sinks a 4.5μA current from an upper resistor, RTOP (see Figure 2). VIN voltage must increase to overcome the current sink. The VIN start-up threshold is determined by: VINON VENON (1 RTOP ) 4.5A RTOP RBOT Where, VEN-ON is the EN voltage turn-on threshold (1.33V, typically). Once the EN voltage reaches VEN-ON, the 4.5uA sink current turns off to create a reverse hysteresis for the VIN falling threshold: VINUVLO HYS 4.5A RTOP VIN RTOP MP9184 EN R BOT 4.5 A Figure 2: VIN VULO Program Selecting the Soft-Start Capacitor To prevent excessive input current, the MP9184 includes a soft-start circuit that limits the voltage on COMP during start-up This prevents premature termination of the source voltage at start-up due to input-current overshoot. When MP9184 Rev. 1.0 8/27/2015 power is applied to the device, enable is asserted and a 7μA internal-current source charges the external capacitor at SS. The SS voltage clamps COMP voltage (as well as the inductor peak current) until output is close to regulation or COMP reaches 1.8V. For most applications, a 33nF SS capacitor is sufficient. Setting the Output Voltage Output voltage is fed back through two sense resistors in series. The feedback reference voltage is 1.225V, typically. The equation for the output voltage is: VOUT VREF (1 R1 ) R2 Where, R1 is the top feedback resistor, R2 is the bottom feedback resistor, and VREF is the reference voltage (1.225V, typically). Choose feedback resistors in the 10kΩrange (or higher) for good efficiency. Selecting the Input Capacitor An input capacitor is required to supply the AC ripple current to the inductor while limiting noise at the input source. A low ESR capacitor is required to minimize noise. Ceramic capacitors are preferred, but tantalum or low ESR electrolytic capacitors suffice. Two 22uF capacitors are recommended for highpower applications. The capacitor can be electrolytic, tantalum, or ceramic. However, since the capacitor absorbs the input-switching current, it requires an adequate ripple-current rating. Use a capacitor with a RMS current rating greater than the inductor-ripple current (see “Selecting the Inductor” to determine the inductor-ripple current). To ensure stable operation, place the input capacitor as close to the IC as possible. Alternately, a smaller, high-quality ceramic 0.1μF capacitor may be placed closer to the IC with the larger capacitor placed a little farther away. When using this technique, a larger electrolytic or tantalum type capacitor is recommended. All ceramic capacitors should be placed very close to the input. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 14 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE Selecting the Output Capacitor An output capacitor is required to maintain the DC output voltage. Low ESR capacitors are preferred to minimize the output-voltage ripple. The characteristics of the output capacitor affect the stability of the regulation control system. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. If using ceramic capacitors, the impedance of the capacitor at the switching frequency is dominated by the capacitance, and the output-voltage ripple is independent primarily of the ESR. The outputvoltage ripple is estimated by: VIN ) ILOAD VOUT COUT FSW (1 VRIPPLE Where VRIPPLE is the output-ripple voltage, VIN and VOUT are the DC input and output voltages respectively, ILOAD is the load current, Fsw is the 600kHz fixed-switching frequency, and COUT is the capacitance of the output capacitor. If using tantalum or low ESR electrolytic capacitors, the ESR dominates the impedance at the switching frequency, so the output ripple is estimated as: VIN ) ILOAD VOUT I RESR VOUT LOAD COUT FSW VIN (1 VRIPPLE Where, RESR is the equivalent series resistance of the output capacitors. Choose an output capacitor that satisfies output ripple and load transient design requirements. Take capacitance de-rating into consideration when designing high output-voltage applications. For most applications, three 22μF ceramic capacitors are suitable. Selecting the Inductor The inductor forces a higher output voltage while being driven by the input voltage. A higher value inductor has less ripple current, resulting in a lower peak-inductor current. This reduces stress on the internal N-channel switch and enhances efficiency. However, a higher value MP9184 Rev. 1.0 8/27/2015 inductor is physically larger, has a higher series resistance, and a lower saturation current. A good rule of thumb is to have a peak-to-peak ripple current that is approximately 30%-40% of the maximum input current. To prevent loss of regulation due to the current limit, ensure the peak-inductor current is below 75% of the current limit at the operating duty cycle. Also, ensure that the inductor does not saturate under the worstcase load transient and start-up conditions. Calculate the required inductance value using the equation below: V (VOUT VIN ) L IN VOUT FSW I VOUT ILOAD(MAX) IIN(max) VIN Where , ILOAD(MAX) is the maximum load current, ΔI is the peak-to-peak inductor-ripple current, ΔI = (30% - 40%) x IIN (MAX) , and ŋ is efficiency. Selecting the Output Rectifier MP9184 features a SDR gate driver. Instead of a schottky diode, an N-channel MOSFET can be used to free-wheel the inductor current when the internal MOSFET is off. The SDR gate-driver has a high voltage level (5V), so choose an Nchannel MOSFET that is compatible with a 5V gate-voltage rating. The minimum high level is 3V, typically. It is recommended that the MOSFET’s turn-on threshold is lower than 3V. In applications with low outputs (such as 5V), the voltage across the BST cap may be insufficient. If this is the case, a schottky diode should be connected from the output port to BST, conducting the current into the BST capacitor when SW is low (see Figure 3). Figure 3. BST Charger for Low-Output Applications www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 15 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE The MOSFET voltage rating should be equal to or greater than the output voltage. The average current rating must be greater than the maximum load current. The peak-current rating must be greater than the peak-inductor current. If a Schottky diode is used as the output rectifier, the same specifications should be considered. PCB Layout Guide High-frequency switching regulators require very careful PCB layout for stable operation and low noise. All components must be placed as close to the IC as possible. Route on bottom layer C6 2 7 SDR SW PGND 1 R2 C2 2 1 2 R3 1 1 1 2 1 2 C5 R1 1 2 C1 C3 2 2 1 SS R4 5 PGND AGND 2 6 BST SW PGND IN The right-half-plane zero increases the gain and reduces the phase simultaneously, resulting in a smaller phase and gain margin. The worst case happens during conditions of minimum input voltage and maximum output power. SW PGND FB FRHP R V LOAD ( IN )2 (Hz) 2 L VOUT 8 2 Q1 PGND VDD Also, there is a right-half-plane zero (FRHPZ) that exists in continuous conduction mode (CCM). The inductor current does not drop to zero each cycle. The frequency of the right-half plane zero is: 1 4 SW SW COMP Where GCS is the compensation voltage to the inductor-current gain, AVEA is the error amplifier voltage gain, and the VFB is the feedback regulation threshold. 1 3 EN A VEA VIN RLOAD VFB GCS RCOMP (V / V) 2 V 2OUT U1 OUT A VDC 2 MODE Where, RLOAD is the load resistance. The DC loop gain is calculated as follows: 1 SENSE Compensation The output of the transconductance error amplifier (COMP) is used to compensate the regulation control system. The system uses two poles and one zero to stabilize the control loop. The poles are FP1, set by the output capacitor (COUT) and the load resistance, and FP2, which starts from the origin. The zero FZ1 is set by the compensation capacitor (CCOMP) and the compensation resistor (RCOMP). These are determined by the equations: 1 FP1 (Hz) 2 RLOAD COUT 1 FZ1 (Hz) 2 RCOMP CCOMP L1 2 VIN C4 1 GND VOUT Figure 4. PCB Layout Reference Refer to Figure 4 and the guidelines below to optimize performance: 1. Keep the output loop (SW, PGND, Q1, and C2) as small as possible. 2. Place FB divider R1 and R2 as close as possible to FB. 3. Route the sensing traces (SENSE and IN) in parallel closely with a small closed area. The 0805 package is recommended for the sensing resistor (R4) to reduce parasitic inductance. 4. Connect FB and OUT feedback from the output capacitor (C2). 5. Connect the compensation components and SS capacitor to AGND with a short loop. 6. Connect the VDD capacitor to AGND with a short loop. Do not connect to PGND net before connecting to IC-AGND. 7. Connect the compensation components and SS capacitor to AGND with a short loop. Compensation recommendations are listed in the “Typical Application Circuits” section. MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 16 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE 8. The input path consisting of C1, L1, SW, PGND, BST path, and SDR path should be as short as possible. Design Example Below is a design example following the application guidelines for the specifications: 9. Place sufficient GND vias close to the IC for good thermal dissipation. Table 1. Design Example 10. Do NOT place vias into the SW net. 11. Use a 4-layer applications. MP9184 Rev. 1.0 8/27/2015 PCB for high-power VIN VOUT IOUT 3-10V 12V 0-2A The detailed application schematic is shown in Figure 5. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 17 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE AGND PGND SW BST 4 TYPICAL APPLICATION CIRCUITS Figure 5. 12V Output Synchronous Solution Using External Current-Sensing Resistor L1 C1A C1B 22uF 22uF 2.2uH C6 0.1uF MODE SENSE IN C3 R7 0 Q1 FDMC7678 C2A SDR U1 MP9184 22uF OUT 22uF C2C 22uF R1 300k VDD R5 100k C2B 2.2uF EN SS R6 NS C4 33nF FB R2 34k C5 COMP 6.8nF R3 9.1k Figure 6. 12V Output Synchronous Solution Using internal Current-Sensing Circuit MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 18 AGND PGND SW BST MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE Figure 7. 12V Output Non-Synchronous Solution Using Internal Current-Sensing Circuit Figure 8: 5V Output Synchronous Solution Using Internal Current Sensing Circuit MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 19 MP9184 – 17A, 600KHZ, 20V WIDE INPUT RANGE ,SYNCHRONOUS BOOST CONVERTER IN ASMALL 3X4MM QFN PACKAGE PACKAGE INFORMATION QFN-22 (3mmx4mm) PIN 1 ID MARKING PIN 1 ID 0.125 X 45° TYP PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW 0.125 X 45° NOTE: RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP9184 Rev. 1.0 8/27/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 20