Cypress CY25819 Spread spectrum clock generator 8- to 32-mhz input frequency range Datasheet

CY25819
Spread Spectrum Clock Generator
Spread Spectrum Clock Generator
Features
Applications
■
8- to 32-MHz input frequency range
■
Printers and MFPs
■
CY25819: 16 MHz to 32 MHz
■
LCD panels and notebook PCs
■
Separate modulated and unmodulated clocks
■
Digital copiers
■
Accepts clock, crystal, and resonator inputs
■
PDAs
■
Down spread modulation
■
Automotive
■
Power-down function
■
CD-ROM, VCD, and DVD
■
Low-power dissipation
❐ CY25819 = 36 mW typ at 16 MHz
❐ CY25819 = 63 mW typ at 32 MHz
■
Networking and LAN/WAN
■
Scanners
■
Modems
■
Embedded digital systems
■
■
Low cycle-to-cycle jitter
❐ SSCLK = 250 ps typ
❐ REFOUT = 275 ps typ
Benefits
Available in 8-pin (150 mil) SOIC package
■
Peak electromagnetic interference (EMI) reduction by 8 dB to
16 dB
■
Fast time to market
■
Cost reduction
Block Diagram
300K
XIN/CLKIN 1
REFERENCE
DIVIDER
PD and
CP
LF
MODULATION
CONTROL
VCO
COUNTER
VCO
XOUT 8
VDD
7
DIVIDER
and
MUX
INPUT
DECODER
VSS 2
3
4
SSCLK
5
REFCLK
6
S0 PD#
Cypress Semiconductor Corporation
Document #: 38-07362 Rev. *D
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised May 10, 2011
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CY25819
Contents
Pin Configuration ............................................................. 3
Pin Description ................................................................. 3
Overview ............................................................................ 4
Input Frequency Range and Selection ........................... 4
Spread% Selection ........................................................... 4
3-Level Digital Inputs ....................................................... 5
Modulation Rate ................................................................ 5
Maximum Ratings ............................................................. 6
DC Electrical Characteristics .......................................... 6
Timing Electrical Characteristics .................................... 6
Characteristics Curves .................................................... 7
SSCG Profiles ................................................................... 8
Application Schematic ..................................................... 9
Document #: 38-07362 Rev. *D
Ordering Information ........................................................ 9
Ordering Code Definitions ........................................... 9
Package Drawing and Dimensions ............................... 10
Acronyms ........................................................................ 11
Document Conventions ................................................. 11
Units of Measure ....................................................... 11
Document History Page ................................................. 12
Sales, Solutions, and Legal Information ...................... 13
Worldwide Sales and Design Support ....................... 13
Products .................................................................... 13
PSoC Solutions ......................................................... 13
Page 2 of 13
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CY25819
Pin Configuration
8-pin SOIC
XIN/CLKIN 1
Vss 2
8 XOUT
CY25818
CY25819
S0 3
SSCLK 4
7 Vdd
6 PD#
5 REFCLK
Pin Description
Pin
Name
Description
1
XIN/CLK
2
Vss
Power Supply Ground.
3
S0
Digital Spread% Control Pin. 3-Level input (H-M-L). Default = M.
4
SSCLK
Modulated Spread Spectrum Output Clock. The output frequency is referenced to input frequency. Refer to
Table 2 on page 4 for the amount of modulation (Spread%).
5
REFCLK
Unmodulated Reference Clock Output. The unmodulated output frequency is the same as the input
frequency.
6
PD#
Power Down Control Pin. Default = H (Vdd).
7
Vdd
Positive Power Supply.
8
XOUT
Clock, Crystal, or Ceramic Resonator Input Pin.
Clock, Crystal, or Ceramic Resonator Output Pin. Leave this pin unconnected if an external clock is used
at XIN pin.
Document #: 38-07362 Rev. *D
Page 3 of 13
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CY25819
Overview
The Cypress CY25819 products are Spread Spectrum Clock
Generator (SSCG) ICs used for the purpose of reducing EMI
found in today’s high-speed digital electronic systems. The
devices use a Cypress proprietary phase-locked loop (PLL) and
Spread Spectrum Clock (SSC) technology to synthesize and
modulate the frequency of the input clock. By frequency
modulating the clock, the measured EMI at the fundamental and
harmonic frequencies is greatly reduced. This reduction in
radiated energy can significantly reduce the cost of complying
with regulatory agency requirements and improve time to market
without degrading system performance.
The input frequency range is 8–16 MHz for the CY25818 and
16–32 MHz for the CY25819. Both products accept external
clock, crystal, or ceramic resonator inputs.
The CY25819 provide separate modulated (SSCLK) and
unmodulated reference (REFCLK) clock outputs which are the
same frequency as the input clock frequency. Down spread
frequency modulation can be selected by the user, based on
three discrete values of Spread%. A separate power down
function is also provided.
The CY25819 products are available in an 8-pin SOIC (150-mil)
package with a commercial operating temperature range of
0–70 C. Contact Cypress for availability of –40 to +85 C
industrial temperature range operation or TSSOP package
versions.
Input Frequency Range and Selection
CY25819 input frequency range is 8–32 MHz. This range is
divided into two segments, as given in Table 1.
Table 1. Input and Output Frequency Selection
Product
CY25819
Input/Output Frequency Range
16–32 MHz
Spread% Selection
CY25818/19 SSCG products provide Down-Spread frequency
modulation. The amount of Spread% is selected by using 3-Level
S0 digital input. Spread% values are given in Table 2.
Table 2. Spread% Selection
XIN (MHz)
Product
16–20
20–24
24–28
28–32
CY25819
CY25819
CY25819
CY25819
Document #: 38-07362 Rev. *D
S0 = 1
Down (%)
–3.0
–2.7
–2.5
–2.3
S0 = 0
Down (%)
–2.2
–1.9
–1.8
–1.7
S0 = M
Down (%)
–0.7
–0.6
–0.6
–0.5
Page 4 of 13
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CY25819
3-Level Digital Inputs
Modulation Rate
S0 digital input is designed to sense three logic levels designated
as HIGH “1”, LOW “0”, and MIDDLE “M”. With this 3-Level digital
input logic, the 3-Level logic is able to detect three different logic
levels.
Spread Spectrum Clock Generators utilize frequency modulation
(FM) to distribute energy over a specific band of frequencies. The
maximum frequency of the clock (fmax) and minimum frequency
of the clock (fmin) determine this band of frequencies. The time
required to transition from fmin to fmax and back to fmin is the
period of the Modulation Rate, Tmod. The Modulation Rates of
SSCG clocks are generally referred to in terms of frequency, and
fmod = 1/Tmod.
The S0 pin includes an on-chip 20K (10K/10K) resistor divider.
No external application resistors are needed to implement
3-Level logic, as follows.
Logic Level “0”: 3-Level logic pin connected to GND.
Logic Level “M”: 3-Level logic pin left floating (no connection).
Logic Level “1”: 3-Level logic pin connected to Vdd.
In the case of CY25819 devices, the (Spread Spectrum)
Modulation Rate, fmod, is given by the following formula:
Figure 1 illustrates how to implement 3-Level Logic.
fmod = fIN/DR
Figure 1. 3-Level Logic
L O G IC
L O W (0 )
The input clock frequency, fin, and the internal divider determine
the Modulation Rate.
L O G IC
H IG H (H )
L O G IC
M ID D L E (M )
where fmod is the Modulation Rate, fIN is the Input Frequency,
and DR is the Divider Ratio, as given in Table 3.
VDD
S0
S0
S0
to V S S
UNCO NNECTED
to V D D
VSS
Table 3. Modulation Rate Divider Ratios
Product
Input Frequency Range
Divider Ratio (DR)
CY25818
8–16 MHz
256
CY25819
16–32 MHz
512
Document #: 38-07362 Rev. *D
Page 5 of 13
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CY25819
Maximum Ratings[1, 2]
Supply Voltage (Vdd): .................................................. +5.5 V
Input Voltage Relative to Vdd: .............................Vdd + 0.3 V
Input Voltage Relative to Vss:.............................. Vss + 0.3 V
Operating Temperature:.................................. 0 C to +70 C
Storage Temperature: ............................... –65 C to +150 C
DC Electrical Characteristics
Vdd = 3.3 V ± 10%, TA = 0 C to +70 C and CL = 15 pF (unless otherwise noted)
Parameter
Description
Conditions
Min
Typ
Max
Unit
Vdd
Power Supply Range
2.97
3.3
3.63
V
VINH
Input HIGH Voltage
S0 Input
0.85 Vdd
Vdd
Vdd
V
VINM
Input MIDDLE Voltage
S0 Input
0.40 Vdd
0.50 Vdd
0.60 Vdd
V
VINL
Input LOW Voltage
S0 Input
0.0
0.0
0.15 Vdd
V
VOH1
Output HIGH Voltage
IOH = 4 mA, SSCLK and REFCLK
2.4
–
–
V
VOH2
Output HIGH Voltage
IOH = 6 mA, SSCLK and REFCLK
2.0
–
–
V
VOL1
Output LOW Voltage
IOL = 4 mA, SSCLK Output
–
–
0.4
V
VOL2
Output LOW Voltage
IOL = 10 mA, SSCLK Output
–
–
1.2
V
CIN1
Input Capacitance
XIN (Pin 1) and XOUT (Pin 8)
6.0
7.5
9.0
pF
CIN2
Input Capacitance
All Digital Inputs
3.5
4.5
6.0
pF
IDD1
Power Supply Current
FIN = 8 MHz, no load
–
10.0
12.5
mA
IDD3
Power Supply Current
FIN = 32 MHz, no load
–
19.0
23.0
mA
IDD4
Power Supply Current
PD# = Vss
–
150
250
mA
Min
Typ
Max
Unit
Timing Electrical Characteristics
Vdd = 3.3 V ± 10%, TA = 0 C to +70 C and CL = 15 pF (unless otherwise noted)
Parameter
Description
Conditions
ICLKFR1
Input Frequency Range CY25818
8
–
16
MHz
ICLKFR2
Input Frequency Range CY25819
16
–
32
MHz
trise1
Clock Rise Time
SSCLK and REFCLK, 0.4V to 2.4V
2.0
3.0
4.0
ns
tfall1
Clock Fall Time
SSCLK and REFCLK, 0.4V to 2.4V
2.0
3.0
4.0
ns
CDCin
Input Clock Duty Cycle
XIN
20
50
80
%
CDCout
Output Clock Duty Cycle SSCLK and REFCLK @ 1.5V
45
50
55
%
CCJss
Cycle-to-Cycle Jitter
SSCLK; FIN = FOUT = 8–32 MHz
–
250
350
ps
CCJref
Cycle-to-Cycle Jitter
REFCLK; FIN = FOUT = 8–32 MHz
–
275
375
ps
Notes
1. Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. Operation at any Absolute Maximum Rating is not implied.
Document #: 38-07362 Rev. *D
Page 6 of 13
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CY25819
Characteristics Curves
Figure 4. IDD (mA) vs. Frequency (MHz)
The following curves demonstrate the characteristic behavior of
the CY25819 when tested over a number of environmental and
application specific parameters. These are typical performance
curves and are not meant to replace any parameter specified in
DC Electrical Characteristics on page 6 and Timing Electrical
Characteristics on page 6.
20
19
C Y 2 5 8 18
8 - 16 M H z
18
IDD(mA)
17
Figure 2. CCJ (ps) vs. Frequency (MHz)
300
16
15
14
290
REFCLK CY25819
13
REFCLK CY25818
280
12
270
CCJ (ps)
C Y 2 5 8 19
16 - 3 2 M H z
11
260
10
250
8
12
16
20
SSCLK CY25819
240
24
28
32
F r e q ue nc y ( M H z )
230
SSCLK CY25818
220
Figure 5. Bandwidth% vs. Vdd
210
200
8
12
16
20
24
28
32
B.W
BW %
(%)
Frequency (MHz)
Figure 3. Bandwidth% vs. Temperature
2.75
2.5
B.WBW
%%
12 MHz
3.1
3
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
1.9
1.8
[email protected] MHz
CY25819@32 MHz
2.8
2.25
2.9
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
VDD (volts)
32.0 MHz
2
1.75
-40
-25
-10
5
20
35
50
65
80
95
110
125
Temp (C)
Document #: 38-07362 Rev. *D
Page 7 of 13
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CY25819
SSCG Profiles
CY25819 SSCG products use a non-linear “optimized” frequency profile as shown in Figure 6. The use of Cypress proprietary
“optimized” frequency profile maintains flat energy distribution over the fundamental and higher order harmonics. This results in
additional EMI reduction in electronic systems.
Figure 6. CY25819 Spread Spectrum Profile (Frequency vs. Time)[3]
Note
3. Xin = 32.0 MHz; S0 = 1; SSCLK = 32.0 MHz; BW = –2.15%.
Document #: 38-07362 Rev. *D
Page 8 of 13
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CY25819
Application Schematic
Figure 7. Typical Application Schematic
Vdd
C3
0.1 uF
7
C2
1
27 pF
C3
Vdd
XIN
SSCLK
14.3 MHz
or
27.0 MHz
8
REFCLK
XOUT
27 pF
4
5
14.3 MHz (CY25818)
27.0 MHz (CY25819)
CY25818
CY25819
6
PD#
Vss
S0
3
2
Ordering Information
Part Number
Package Type
Product Flow
Pb-Free
CY25819SXC
8-pin SOIC
Commercial, 0C to 70C
CY25819SXCT
8-pin SOIC–Tape and Reel
Commercial, 0C to 70C
Ordering Code Definitions
CY 25819 S
X
C
T
T = Tape and Reel; blank = Tube
Temperature Range: C = Commercial
Pb-free
Package: S = 8-pin SOIC
Base part number
Company ID: CY = Cypress
Document #: 38-07362 Rev. *D
Page 9 of 13
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CY25819
Package Drawing and Dimensions
Figure 8. 8-pin SOIC 150 Mils S08.15/SZ08.15
51-85066 *D
Document #: 38-07362 Rev. *D
Page 10 of 13
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CY25819
Acronyms
Acronym
Document Conventions
Description
DVD
digital versatile/video disc
EMI
electromagnetic interference
I/O
input/output
LAN
local area network
LCD
liquid crystal display
PLL
phase locked loop
SOIC
small-outline integrated circuit
SSC
spread spectrum clock
SSCG
spread spectrum clock generator
VCD
video compact disc
WAN
wide area network
Document #: 38-07362 Rev. *D
Units of Measure
Symbol
dB
Unit of Measure
decibel
°C
degree Celsius
MHz
Mega Hertz
mA
milli Amperes
mm
milli meter
ms
milli seconds
mW
milli Watts
ns
nano seconds

ohms
%
percent
pF
pico Farad
ps
pico seconds
V
Volts
W
Watts
Page 11 of 13
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CY25819
Document History Page
Document Title: CY25819, Spread Spectrum Clock Generator
Document Number: 38-07362
Rev.
ECN No.
Issue Date
Orig. of
Change
**
112462
03/21/02
OXC
New Data Sheet
*A
122701
12/28/02
RBI
Added power up requirements to maximum rating information.
*B
448097
See ECN
RGL
Add Lead-free devices
*C
2901658
03/30/10
BASH
Removed inactive parts from the ordering information table. Updated
package diagram and contents.
*D
3253540
05/10/2011
CXQ
Added Ordering Code Definitions.
Added Acronyms and Units of Measure.
Updated in new template.
Document #: 38-07362 Rev. *D
Description of Change
Page 12 of 13
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CY25819
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
Products
Automotive
Clocks & Buffers
Interface
Lighting & Power Control
PSoC Solutions
cypress.com/go/automotive
cypress.com/go/clocks
psoc.cypress.com/solutions
cypress.com/go/interface
PSoC 1 | PSoC 3 | PSoC 5
cypress.com/go/powerpsoc
cypress.com/go/plc
Memory
Optical & Image Sensing
PSoC
Touch Sensing
USB Controllers
Wireless/RF
cypress.com/go/memory
cypress.com/go/image
cypress.com/go/psoc
cypress.com/go/touch
cypress.com/go/USB
cypress.com/go/wireless
© Cypress Semiconductor Corporation, 2002-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 38-07362 Rev. *D
Revised May 10, 2011
Page 13 of 13
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