Precision Dual-Channel, Difference Amplifier AD8270 Instrumentation amplifier building blocks Level translators Automatic test equipment High performance audio Sine/Cosine encoders 13 –VS 14 OUTB _ _ + + 10kΩ 20kΩ 20kΩ 10kΩ 10kΩ 10kΩ AD8270 20kΩ APPLICATIONS 10kΩ 12 –IN1B 11 –IN2B 10 +IN2B 9 +IN1B 20kΩ 06979-001 +IN1A 4 10kΩ 10kΩ REF1B 8 +IN2A 3 10kΩ 10kΩ REF2B 7 –IN2A 2 10kΩ REF2A 6 –IN1A 1 15 OUTA FUNCTIONAL BLOCK DIAGRAM REF1A 5 With no external resistors Difference amplifier: gains of 0.5, 1, or 2 Single ended amplifiers: over 40 different gains Set reference voltage at midsupply Excellent ac specifications 15 MHz bandwidth 30 V/μs slew rate High accuracy dc performance 0.08% maximum gain error 10 ppm/°C maximum gain drift 80 dB minimum CMRR (G = 2) Two channels in small 4 mm × 4 mm LFCSP Supply current: 2.5 mA per channel Supply range: ±2.5 V to ±18 V 16 +VS FEATURES Figure 1. GENERAL DESCRIPTION The AD8270 is a low distortion, dual-channel amplifier with internal gain setting resistors. With no external components, it can be configured as a high performance difference amplifier with gains of 0.5, 1, or 2. It can also be configured in over 40 singleended configurations, with gains ranging from −2 to +3. The AD8270 is the first dual-difference amplifier in the small 4 mm × 4 mm LFCSP. It requires the same board area as a typical single-difference amplifier. The smaller package allows a 2× increase in channel density and a lower cost per channel, all with no compromise in performance. Table 1. Difference Amplifiers by Category High Speed AD8270 AD8273 AMP03 High Voltage AD628 AD629 Single-Supply Unidirectional AD8202 AD8203 Single-Supply Bidirectional AD8205 AD8206 AD8216 The AD8270 operates on both single and dual supplies and requires only 2.5 mA maximum supply current for each amplifier. It is specified over the industrial temperature range of −40°C to +85°C and is fully RoHS compliant. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. AD8270 TABLE OF CONTENTS Features .............................................................................................. 1 Circuit Information.................................................................... 13 Applications....................................................................................... 1 Driving the AD8270................................................................... 13 General Description ......................................................................... 1 Package Considerations............................................................. 13 Functional Block Diagram .............................................................. 1 Power Supplies............................................................................ 13 Revision History ............................................................................... 2 Input Voltage Range................................................................... 14 Specifications..................................................................................... 3 Applications Information .............................................................. 15 Difference Amplifier Configurations ........................................ 3 Difference Amplifier Configurations ...................................... 15 Absolute Maximum Ratings............................................................ 5 Single-Ended Configurations ................................................... 15 Thermal Resistance ...................................................................... 5 Differential Output .................................................................... 17 Maximum Power Dissipation ..................................................... 5 Driving an ADC ......................................................................... 18 ESD Caution.................................................................................. 5 Driving Cabling .......................................................................... 18 Pin Configuration and Function Descriptions............................. 6 Outline Dimensions ....................................................................... 19 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 19 Theory of Operation ...................................................................... 13 REVISION HISTORY 1/08—Revision 0: Initial Version Rev. 0 | Page 2 of 20 AD8270 SPECIFICATIONS DIFFERENCE AMPLIFIER CONFIGURATIONS VS = ±15 V, VREF = 0 V, TA = 25°C, RLOAD = 2 kΩ, specifications referred to input, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% NOISE/DISTORTION Harmonic Distortion Voltage Noise 1 GAIN Gain Error Gain Drift INPUT CHARACTERISTICS Offset 2 Average Temperature Drift Common-Mode Rejection Ratio Power Supply Rejection Ratio Input Voltage Range 3 Common-Mode Resistance 4 Bias Current OUTPUT CHARACTERISTICS Output Swing Short-Circuit Current Limit Conditions Min G = 0.5 Typ Max 20 30 700 750 10 V step on output 10 V step on output Min G=1 Typ Max 15 30 700 750 800 900 Min G=2 Typ Max 10 30 700 750 800 900 800 900 Unit MHz V/μs ns ns f = 1 kHz, VOUT = 10 V p-p, RLOAD = 600 Ω f = 0.1 Hz to 10 Hz f = 1 kHz 84 145 95 dB 2 52 1.5 38 1 26 μV p-p nV/√Hz TA = −40°C to +85°C 1 450 3 86 1500 TA = −40°C to +85°C DC to 1 kHz 2 10 +15.4 70 −15.4 0.08 10 1 76 300 2 92 1000 2 10 +15.4 −15.4 7.5 POWER SUPPLY Supply Current (per Amplifier) −13.8 −13.7 +13.8 +13.7 100 60 2.3 TA = −40°C to +85°C 80 3 1 % ppm/°C 225 1.5 98 750 μV μV/°C dB 2 10 +15.4 μV/V V kΩ nA −15.4 7.5 500 −13.8 −13.7 +13.8 +13.7 100 60 2.5 0.08 10 1 10 500 TA = −40°C to +85°C Sourcing Sinking 0.08 10 2.3 500 −13.8 −13.7 +13.8 +13.7 V V mA mA 2.5 mA 3 mA 100 60 2.5 3 2.3 Includes amplifier voltage and current noise, as well as noise of internal resistors. Includes input bias and offset errors. At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Commonmode impedance at only one input is 2× the resistance listed. 2 3 Rev. 0 | Page 3 of 20 AD8270 VS = ±5 V, VREF = 0 V, TA = 25°C, RLOAD = 2 kΩ, specifications referred to input, unless otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% NOISE/DISTORTION Harmonic Distortion Voltage Noise 1 GAIN Gain Error Gain Drift INPUT CHARACTERISTICS Offset 2 Average Temperature Drift Common-Mode Rejection Ratio Conditions G = 0.5 Typ Max 20 30 550 600 5 V step on output 5 V step on output Min G=1 Typ Max 15 30 550 600 650 750 Min 650 750 G=2 Typ Max Unit 10 30 550 600 MHz V/μs ns ns 650 750 f = 1 kHz, VOUT = 5 V p-p, RLOAD = 600 Ω f = 0.1 Hz to 10 Hz f = 1 kHz 101 141 112 dB 2 52 1.5 38 1 26 μV p-p nV/√Hz TA = −40°C to +85°C 1 450 3 86 1500 TA = −40°C to +85°C DC to 1 kHz 2 10 +5.4 Power Supply Rejection Ratio Input Voltage Range 3 Common-Mode Resistance 4 Bias Current OUTPUT CHARACTERISTICS Output Swing Short-Circuit Current Limit Min 70 −5.4 0.08 10 1 76 300 2 92 1000 2 10 +5.4 −5.4 7.5 POWER SUPPLY Supply Current (per Amplifier) −4 −3.9 +4 +3.9 100 60 2.3 TA = −40°C to +85°C 1 80 % ppm/°C 225 1.5 98 750 μV μV/°C dB 2 10 +5.4 dB V kΩ nA −5.4 7.5 500 −4 −3.9 +4 +3.9 100 60 2.5 3 0.08 10 1 10 500 TA = −40°C to +85°C Sourcing Sinking 0.08 10 2.3 500 −4 −3.9 +4 +3.9 V V mA mA 2.5 3 mA mA 100 60 2.5 3 2.3 Includes amplifier voltage and current noise, as well as noise of internal resistors. Includes input bias and offset errors. At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Commonmode impedance at only one input is 2× the resistance listed. 2 3 Rev. 0 | Page 4 of 20 AD8270 ABSOLUTE MAXIMUM RATINGS Table 4. MAXIMUM POWER DISSIPATION Input Voltage Range Storage Temperature Range Specified Temperature Range Package Glass Transition Temperature (TG) ESD (Human Body Model) ESD (Charge Device Model) ESD (Machine Model) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The maximum safe power dissipation for the AD8270 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 130°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 130°C for an extended period of time can result in a loss of functionality. The AD8270 has built-in, short-circuit protection that limits the output current to approximately 100 mA (see Figure 19 for more information). While the short-circuit condition itself does not damage the part, the heat generated by the condition can cause the part to exceed its maximum junction temperature, with corresponding negative effects on reliability. 3.2 TJ MAXIMUM = 130°C THERMAL RESISTANCE Table 5. Thermal Resistance Thermal Pad 16-Lead LFCSP with Thermal Pad Soldered to Board 16-Lead LFCSP with Thermal Pad Not Soldered to Board θJA 57 Unit °C/W 96 °C/W The θJA values in Table 5 assume a 4-layer JEDEC standard board with zero airflow. If the thermal pad is soldered to the board, it is also assumed it is connected to a plane. θJC at the exposed pad is 9.7°C/W. 2.8 2.4 PAD SOLDERED θJA = 57°C/W 2.0 1.6 1.2 0.8 PAD NOT SOLDERED θJA = 96°C/W 0.4 0 –50 –25 0 25 50 75 AMBIENT TEMPERATURE (°C) 100 125 Figure 2. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION Rev. 0 | Page 5 of 20 06979-003 Rating ±18 V See derating curve in Figure 2 ±VS −65°C to +130°C −40°C to +85°C 130°C 1 kV 1 kV 0.1 kV MAXIMUM POWER DISSIPATION (W) Parameter Supply Voltage Output Short-Circuit Current AD8270 11 –IN2B 10 +IN2B 9 +IN1B 06979-002 REF2B 7 12 –IN1B REF1B 8 TOP VIEW (Not to Scale) REF1A 5 +IN1A 4 AD8270 REF2A 6 +IN2A 3 13 –VS PIN 1 INDICATOR –IN1A 1 –IN2A 2 14 OUTB 16 +VS 15 OUTA PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. 1 2 3 4 5 Mnemonic −IN1A −IN2A +IN2A +IN1A REF1A 6 REF2A 7 REF2B 8 REF1B 9 10 11 12 13 14 15 16 +IN1B +IN2B −IN2B −IN1B −VS OUTB OUTA +VS Description 10 kΩ Resistor Connected to Negative Terminal of Op Amp A. 10 kΩ Resistor Connected to Negative Terminal of Op Amp A. 10 kΩ Resistor Connected to Positive Terminal of Op Amp A. 10 kΩ Resistor Connected to Positive Terminal of Op Amp A. 20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference voltage input. 20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference voltage input. 20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference voltage input. 20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference voltage input. 10 kΩ Resistor Connected to Positive Terminal of Op Amp B. 10 kΩ Resistor Connected to Positive Terminal of Op Amp B. 10 kΩ Resistor Connected to Negative Terminal of Op Amp B. 10 kΩ Resistor Connected to Negative Terminal of Op Amp B. Negative Supply. Op Amp B Output. Op Amp A Output. Positive Supply. Rev. 0 | Page 6 of 20 AD8270 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted. 160 20 N: 1043 MEAN: –0.003 SD: 0.28 (0, +15) COMMON-MODE INPUT VOLTAGE (V) 140 NUMBER OF UNITS 120 100 80 60 40 20 15 10 (–7.5, +7.5) (+7.5, +7.5) (–7.5, –7.5) (+7.5, –7.5) 5 0 –5 –10 –15 –0.3 0 0.3 0.6 SYSTEM OFFSET VOLTAGE (mV) 0.9 Figure 4. Typical Distribution of System Offset Voltage, G = 1 6 COMMON-MODE INPUT VOLTAGE (V) 120 90 60 30 –50 0 CMRR (µV/V) 50 100 150 2 (+2.5, +2.5) (0, +2.5) (–1.25, –1.25) (+1.25, +1.25) VS = ±2.5 VS = ±5 0 (–1.25, –1.25) –2 –4 (+1.25, –1.25) (0, –2.5) (–2.5, –2.5) (+2.5, –2.5) (0, –5) –2 –1 0 1 OUTPUT VOLTAGE (V) 2 3 COMMON-MODE INPUT VOLTAGE (V) (0, +15) 300 250 200 150 100 50 15 10 (–14.3, +7.85) (+14.3, +7.85) (–14.3, –7.85) (+14.3, –7.85) 5 0 –5 –10 –15 (0, –15) 0 –0.04 –0.02 0 GAIN ERROR (%) 0.02 0.04 –20 –20 06979-006 NUMBER OF UNITS (–2.5, +2.5) 20 N: 1043 MEAN: –0.015 SD: 0.0068 350 4 Figure 8. Common-Mode Input Voltage vs. Output Voltage, Gain = 0.5, ±5 V and ±2.5 V Supplies Figure 5. Typical Distribution of CMRR, G = 1 400 10 (0, +5) –6 –3 06979-005 –100 5 –15 –10 –5 0 5 OUTPUT VOLTAGE (V) 10 15 20 Figure 9. Common-Mode Input Voltage vs. Output Voltage, Gain = 1, ±15 V Supplies Figure 6. Typical Distribution of Gain Error, G = 1 Rev. 0 | Page 7 of 20 06979-009 NUMBER OF UNITS 150 0 –150 0 OUTPUT VOLTAGE (V) Figure 7. Common-Mode Input Voltage vs. Output Voltage, Gain = 0.5, ±15 V Supplies N: 984 MEAN: –1.01 SD: 27 180 –5 06979-008 –0.6 06979-004 –0.9 –20 –10 06979-007 (0, –15) 0 AD8270 140 (0, +5) GAIN = 2, 0.5 4 (–4.3, +2.85) 120 (+4.3, +2.85) (–1.6, +1.7) (+1.6, +1.7) VS = ±2.5 VS = ±5 0 (–1.6, –1.7) –2 (+1.6, –1.7) (0, –2.5) –2.85) –4 (–4.3, +2.85) (+4.3, –2.85) –4 –3 –2 –1 0 1 2 OUTPUT VOLTAGE (V) 3 4 5 GAIN = 1 80 60 40 20 (0, –5) –6 –5 100 0 10 Figure 10. Common-Mode Input Voltage vs. Output Voltage, Gain = 1, ±5 V and ±2.5 V Supplies 100k 1M 140 (0, +15) GAIN = 2, 0.5 15 120 (–14.3, +11.4) (+14.3, +11.4) 10 NEGATIVE PSRR (dB) COMMON-MODE INPUT VOLTAGE (V) 1k 10k FREQUENCY (Hz) Figure 13. Positive PSRR vs. Frequency 20 5 0 –5 –10 100 06979-015 2 POSITIVE PSRR (dB) (0, +2.5) 06979-010 COMMON-MODE INPUT VOLTAGE (V) 6 (–14.3, –11.4) 100 GAIN = 1 80 60 40 (+14.3, –11.4) 20 –15 –15 –10 –5 0 5 OUTPUT VOLTAGE (V) 10 15 20 0 10 06979-011 100k 1M 32 6 (0, +5) (–4, +4) VS = ±15V (+4, +4) 28 (–1.6, +2.1) (0, +2.5) OUTPUT VOLTAGE SWING (V p-p) 4 (+1.6, +2.1) 2 VS = ±2.5 VS = ±5 0 –2 (–1.6, –2.1) (0, –2.5) (+1.6, –2.1) –4 (–4, –4) (0, –5) –4 –3 –2 –1 0 1 2 OUTPUT VOLTAGE (V) 3 4 24 20 16 12 8 VS = ±5V 4 (+4, –4) 5 Figure 12. Common-Mode Input Voltage vs. Output Voltage, Gain = 2, ±5 V and ±2.5 V Supplies 0 100 06979-012 COMMON-MODE INPUT VOLTAGE (V) 1k 10k FREQUENCY (Hz) Figure 14. Negative PSRR vs. Frequency Figure 11. Common-Mode Input Voltage vs. Output Voltage, Gain = 2, ±15 V Supplies –6 –5 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 06979-017 –20 –20 06979-016 (0, –15) Figure 15. Output Voltage Swing vs. Large Signal Frequency Response Rev. 0 | Page 8 of 20 AD8270 10 120 GAIN (dB) SHORT-CIRCUIT CURRENT (mA) 5 GAIN = 1 0 GAIN = 0.5 –5 ISHORT+ 100 GAIN = 2 –10 –15 80 60 40 20 0 –20 –40 ISHORT– –60 –80 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M –120 –40 06979-018 GAIN = 1 OUTPUT VOLTAGE SWING (V) +VS 80 40 60 80 100 60 50 40 30 20 +125°C +VS – 2 –40°C +25°C +85°C +VS – 4 0 +125°C +85°C –VS + 2 +25°C –VS + 4 10 –40°C 1k 10k 100k FREQUENCY (Hz) 1M 10M 06979-019 100 –VS 200 1k RLOAD (Ω) 10k Figure 20. Output Voltage Swing vs. RLOAD Figure 17. CMRR vs. Frequency +VS 0 –40°C +25°C CROSSTALK (G = 1) OUTPUT VOLTAGE SWING (V) –40 –60 –80 –100 +VS – 3 +VS – 6 +125°C +85°C 0 +125°C –VS + 6 +85°C +25°C –VS + 3 –120 100 1k FREQUENCY (Hz) 10k 100k –VS 06979-013 CHANNEL SEPARATION (dB) –20 –140 10 120 06979-022 CMRR (dB) 70 0 10 20 Figure 19. Short-Circuit Current vs. Temperature 100 GAIN = 2, 0.5 0 TEMPERATURE (°C) Figure 16. Gain vs. Frequency 90 –20 –40°C 0 20 40 60 80 CURRENT (mA) Figure 21. Output Voltage Swing vs. Current (IOUT) Figure 18. Channel Separation vs. Frequency Rev. 0 | Page 9 of 20 100 06979-023 –20 100 06979-021 –100 AD8270 160 VS = ±15V 140 100pF 120 VS = ±5V VS = ±2.5V 100 80 60 VS = ±18V 40 VS = ±15V 06979-024 20 1µs/DIV 0 Figure 22. Small Signal Step Response, Gain = 0.5 0 10 20 30 40 50 60 70 CAPACITIVE LOAD (pF) 80 90 100 Figure 25. Small Signal Overshoot with Capacitive Load, Gain = 0.5 80 VS = ±15V 33pF 70 220pF 60 50mV/DIV OVERSHOOT (%) 0pF VS = ±10V 06979-030 50mV/DIV OVERSHOOT (%) 0pF 18pF VS = ±10V VS = ±5V 50 VS = ±2.5V 40 30 VS = ±18V 20 VS = ±15V 0 0 50 100 150 CAPACITIVE LOAD (pF) 200 06979-031 1µs/DIV 06979-025 10 Figure 26. Small Signal Overshoot with Capacitive Load, Gain = 1 Figure 23. Small Signal Step Response, Gain = 1 80 VS = ±15V 70 470pF 0pF 100pF 50ms/DIV OVERSHOOT (%) 60 50 VS = ±10V 40 VS = ±5V 30 VS = ±2.5V 20 VS = ±18V 10 0 Figure 24. Small Signal Step Response, Gain = 2 0 50 100 150 200 250 300 350 CAPACITIVE LOAD (pF) 400 450 06979-032 06979-026 1µs/DIV VS = ±15V Figure 27. Small Signal Overshoot with Capacitive Load, Gain = 2 Rev. 0 | Page 10 of 20 AD8270 45 VS = ±15V VIN = ±5V 1V/DIV OUTPUT SLEW RATE (V/µs) 40 35 +SR 30 –SR 25 20 15 10 0 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125 TEMPERATURE (°C) 06979-036 1µs/DIV 06979-033 5 Figure 31. Output Slew Rate vs. Temperature Figure 28. Large Signal Pulse Response Gain = 0.5 1k Figure 29. Large Signal Pulse Response Gain = 1 100 GAIN = 1 10 1 10 100 1k FREQUENCY (Hz) 10k 100k Figure 32. Voltage Noise Spectral Density vs. Frequency, Referred to Output VS = ±15V VIN = ±5V GAIN = 2 5V/DIV GAIN = 1 06979-035 1µV/DIV Figure 30. Large Signal Pulse Response, Gain = 2 1s/DIV 06979-042 GAIN = 1/2 1µs/DIV 06979-041 1µs/DIV GAIN = 2 GAIN = 0.5 06979-034 2V/DIV VOLTAGE NOISE (nV/√Hz) VS = ±15V VIN = ±5V Figure 33. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output Rev. 0 | Page 11 of 20 AD8270 N: 1043 MEAN: 4.6 SD: 134.5 210 OFFSET (10µV/DIV) NUMBER OF UNITS 180 150 120 90 60 –600 –400 –200 0 VOSI (µV) 200 400 600 0 Figure 34. Typical Distribution of Op Amp Voltage Offset 100 1 2 3 4 5 6 TIME (s) 7 8 9 10 06979-044 0 06979-014 30 Figure 37. Change in Op Amp Offset Voltage vs. Warm-Up Time N: 1043 MEAN: 321.6 SD: 6.9 NUMBER OF UNITS 80 60 40 310 315 320 325 330 335 1s/DIV 06979-020 50pA/DIV 0 340 IBIAS (nA) 06979-028 20 Figure 38. 0.1 Hz to 10 Hz Current Noise of Internal Op Amp Figure 35. Typical Distribution of Op Amp Bias Current 10 N: 1043 MEAN: 0.31 SD: 2.59 160 CURRENT NOISE (pA/√Hz) 120 100 80 60 40 1 0 –9 –6 –3 0 3 IOFFSET (nA) 6 9 12 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k Figure 39. Current Noise Spectral Density of Internal Op Amp Figure 36. Typical Distribution of Op Amp Offset Current Rev. 0 | Page 12 of 20 06979-029 20 06979-027 NUMBER OF UNITS 140 AD8270 Size 13 –VS 14 OUTB 15 OUTA 16 +VS THEORY OF OPERATION The AD8270 fits two op amps and 14 resistors in a 4 mm × 4 mm package. DRIVING THE AD8270 _ _ + + 10kΩ REF1A 5 20kΩ 20kΩ 10kΩ 10kΩ AD8270 20kΩ 10kΩ The AD8270 is easy to drive, with all configurations presenting at least several kilohms (kΩ) of input resistance. The AD8270 should be driven with a low impedance source: for example, another amplifier. The gain accuracy and common-mode rejection of the AD8270 depend on the matching of its resistors. Even source resistance of a few ohms can have a substantial effect on these specifications. 12 –IN1B 11 –IN2B 10 +IN2B 9 +IN1B PACKAGE CONSIDERATIONS 20kΩ The AD8270 is packaged in a 4 mm × 4 mm LFCSP. Beware of blindly copying the footprint from another 4 mm × 4 mm LFCSP part; it may not have the same thermal pad size and leads. Refer to the Outline Dimensions section to verify that the PCB symbol has the correct dimensions. 06979-059 +IN1A 4 10kΩ 10kΩ REF1B 8 +IN2A 3 10kΩ 10kΩ REF2B 7 –IN2A 2 10kΩ REF2A 6 –IN1A 1 10kΩ Figure 40. Functional Block Diagram CIRCUIT INFORMATION The AD8270 has two channels, each consisting of a high precision, low distortion op amp and seven trimmed resistors. These resistors can be connected to make a wide variety of amplifier configurations: difference, noninverting, inverting, and more. The resistors on the chip can be connected in parallel for a wider range of options. Using the on-chip resistors of the AD8270 provides the designer several advantages over a discrete design. DC Performance Much of the dc performance of op amp circuits depends on the accuracy of the surrounding resistors. The resistors on the AD8270 are laid out to be tightly matched. The resistors of each part are laser trimmed and tested for their matching accuracy. Because of this trimming and testing, the AD8270 can guarantee high accuracy for specifications such as gain drift, common-mode rejection, and gain error. AC Performance The 4 mm × 4 mm LFCSP of the AD8270 comes with a thermal pad. This pad is connected internally to −VS. Connecting to this pad is not necessary for electrical performance; the pad can be left unconnected or can be connected to the negative supply rail. Connecting the pad to the negative supply rail is recommended in high vibration applications or when good heat dissipation is required (for example, with high ambient temperatures or when driving heavy loads). For best heat dissipation performance, the negative supply rail should be a plane in the board. See the Absolute Maximum Ratings section for thermal coefficients with and without the pad soldered. Space between the leads and thermal pad should be as wide as possible to minimize the risk of contaminants affecting performance. A thorough washing of the board is recommended after the soldering process, especially if high accuracy performance is required at high temperatures. Because feature size is much smaller in an integrated circuit than on a PCB board, the corresponding parasitics are smaller, as well. The smaller feature size helps the ac performance of the AD8270. For example, the positive and negative input terminals of the AD8270 op amp are not pinned out intentionally. By not connecting these nodes to the traces on the PCB board, the capacitance remains low, resulting in both improved loop stability and common-mode rejection over frequency. POWER SUPPLIES Production Costs The AD8270 is specified at ±15 V and ±5 V, but it can be used with unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V. The difference between the two supplies must be kept below 36 V. Because one part, rather than several, is placed on the PCB board, the board can be built more quickly. A stable dc voltage should be used to power the AD8270. Noise on the supply pins can adversely affect performance. A bypass capacitor of 0.1 μF should be placed between each supply pin and ground, as close as possible to each supply pin. A tantalum capacitor of 10 μF should also be used between each supply and ground. It can be farther away from the supply pins and, typically, it can be shared by other precision integrated circuits. Rev. 0 | Page 13 of 20 AD8270 INPUT VOLTAGE RANGE The AD8270 has a true rail-to-rail input range for the majority of applications. Because most AD8270 configurations divide down the voltage before they reach the internal op amp, the op amp sees only a fraction of the input voltage. Figure 41 shows an example of how the voltage division works in the difference amplifier configuration. The internal op amp voltage range may be relevant in the following applications, and calculating the voltage at the internal op amp is advised. • • • R2 (V ) R1 + R2 +IN R4 For correct operation, the input voltages at the internal op amp must stay within 1.5 V of either supply rail. R3 R1 06979-061 R2 R2 (V ) R1 + R2 +IN Difference amplifier configurations using supply voltages of less than ±4.5 V Difference amplifier configurations with a reference voltage near the rail Single-ended amplifier configurations Figure 41. Voltage Division in the Difference Amplifier Configuration Voltages beyond the supply rails should not be applied to the part. The part contains ESD diodes at the input pins, which conduct if voltages beyond the rails are applied. Currents greater than 5 mA can damage these diodes and the part. For a similar part that can operate with voltages beyond the rails, see the AD8273 data sheet. Rev. 0 | Page 14 of 20 AD8270 APPLICATIONS INFORMATION DIFFERENCE AMPLIFIER CONFIGURATIONS SINGLE-ENDED CONFIGURATIONS The AD8270 can be placed in difference amplifier configurations with gains of 0.5, 1, and 2. Figure 42 through Figure 44 show the difference amplifier configurations, referenced to ground. The AD8270 can also be referred to a combination of reference voltages. For example, the reference could be set at 2.5 V, using just 5 V and GND. Some of the possible configurations are shown in Figure 45 through Figure 47. The AD8270 can be configured for a wide variety of singleended configurations with gains ranging from −2 to +3. Table 8 shows a subset of the possible configurations. +IN 3 4 –IN 10kΩ = 10kΩ +IN 10kΩ 10kΩ 1 10kΩ 6 1 NC 2 NC 3 GND +IN 4 15 –IN 10kΩ = +IN 10kΩ 5 10kΩ 2 3 +IN 4 15 –IN = 10kΩ +IN 10kΩ 20kΩ 20kΩ 5 2 NC 3 6 +VS + –VS 2 4 15 10kΩ 10kΩ –IN 10kΩ = 10kΩ +IN 10kΩ 10kΩ 10kΩ 10kΩ 20kΩ 20kΩ 6 +VS + –VS 2 –VS +VS NC = NO CONNECT Figure 46. Gain = 1 Difference Amplifier, Referenced to Midsupply 10kΩ 10kΩ 5kΩ 6 5 16 5kΩ –IN 5kΩ 1 2 3 +IN 10kΩ 4 10kΩ 15 10kΩ 10kΩ –IN 10kΩ = 10kΩ +IN 10kΩ 5kΩ 5kΩ 10kΩ 20kΩ 20kΩ 5 06979-055 –IN 1 1 10kΩ GND 10kΩ 10kΩ +VS NC +IN Figure 43. Gain = 1 Difference Amplifier, Referenced to Ground 16 +IN 10kΩ 16 –IN GND NC = NO CONNECT 10kΩ 10kΩ 10kΩ Figure 45. Gain = 0.5 Difference Amplifier, Referenced to Midsupply 10kΩ 6 –IN = –VS 10kΩ 20kΩ 20kΩ 5kΩ 10kΩ 10kΩ 10kΩ 10kΩ 3 15 10kΩ 5 06979-054 –IN +IN 10kΩ 20kΩ 20kΩ Figure 42. Gain = 0.5 Difference Amplifier, Referenced to Ground 16 2 4 GND 10kΩ –IN 5kΩ 20kΩ 20kΩ 5 16 5kΩ GND GND 06979-057 2 15 10kΩ 6 +VS + –VS –VS +VS 2 06979-058 –IN 10kΩ 06979-053 16 1 06979-056 The layout for Channel A is shown in Figure 42 through Figure 47. The layout for Channel B is symmetrical. Table 7 shows the pin connections for Channel A and Channel B. Many signal gains have more than one configuration choice, which allows freedom in choosing the op amp closed-loop gain. In general, for designs that need to be stable with a large capacitive load on the output, choose a configuration with high loop gain. Otherwise, choose a configuration with low loop gain, because these configurations typically have lower noise, lower offset, and higher bandwidth. Figure 47. Gain = 2 Difference Amplifier, Referenced to Midsupply Figure 44. Gain = 2 Difference Amplifier, Referenced to Ground Table 7. Pin Connections for Difference Amplifier Configurations Gain and Reference Gain of 0.5, Referenced to Ground Gain of 0.5, Referenced to Midsupply Gain of 1, Referenced to Ground Gain of 1, Referenced to Midsupply Gain of 2, Referenced to Ground Gain of 2, Referenced to Midsupply Pin 1 OUT OUT −IN −IN −IN −IN Pin 2 −IN −IN NC NC −IN −IN Channel A Pin 3 Pin 4 +IN GND +IN −VS NC +IN NC +IN +IN +IN +IN +IN Pin 5 GND +VS GND −VS GND −VS Rev. 0 | Page 15 of 20 Pin 6 GND +VS GND +VS GND +VS Pin 12 OUT OUT −IN −IN −IN −IN Pin 11 −IN −IN NC NC −IN −IN Channel B Pin 10 Pin 9 +IN GND +IN −VS NC +IN NC +IN +IN +IN +IN +IN Pin 8 GND +VS GND −VS GND −VS Pin 7 GND +VS GND +VS GND +VS AD8270 Table 8. Selected Single-Ended Configurations Electrical Performance Signal Gain −2 −1.5 −1.4 −1.25 −1 −0.8 −0.667 −0.6 −0.5 −0.333 −0.25 −0.2 −0.125 +0.1 +0.2 +0.25 +0.3 +0.333 +0.375 +0.4 +0.5 +0.5 +0.6 +0.6 +0.625 +0.667 +0.7 +0.75 +0.75 +0.8 +0.9 +1 +1 +1 +1.125 +1.2 +1.2 +1.25 +1.333 +1.5 +1.5 +1.6 +1.667 +1.8 +2 +2.25 +2.4 +2.5 +3 Op Amp Closed-Loop Gain 3 3 3 3 3 3 2 2 2 2 1.5 1.5 1.5 1.5 2 1.5 1.5 2 1.5 2 3 1.5 3 1.5 1.5 2 1.5 3 1.5 2 1.5 1.5 1.5 3 1.5 3 1.5 1.5 2 3 1.5 2 2 3 2 3 3 3 3 Pin Connections Input Resistance 5 kΩ 4.8 kΩ 5 kΩ 5.333 kΩ 5 kΩ 5.556 kΩ 8 kΩ 8.333 kΩ 8.889 kΩ 7.5 kΩ 8 kΩ 8.333 kΩ 8.889 kΩ 8.333 kΩ 10 kΩ 24 kΩ 25 kΩ 24 kΩ 26.67 kΩ 25 kΩ 24 kΩ 15 kΩ 25 kΩ 16.67 kΩ 16 kΩ 15 kΩ 16.67 kΩ 26.67 kΩ 13.33 kΩ 16.67 kΩ 16.67 kΩ 15 kΩ >1 GΩ >1 GΩ 26.67 kΩ 16.67 kΩ 25 kΩ 24 kΩ 15 kΩ 13.33 kΩ >1 GΩ 25 kΩ 24 kΩ 16.67 kΩ >1 GΩ 26.67 kΩ 25 kΩ 24 kΩ >1 GΩ 10 kΩ − Pin 1 IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT IN OUT OUT GND OUT GND GND OUT GND OUT OUT GND OUT GND OUT GND OUT OUT OUT IN OUT GND OUT OUT GND GND OUT GND GND GND GND GND GND GND GND Rev. 0 | Page 16 of 20 10 kΩ − Pin 2 IN IN IN IN IN IN NC NC NC NC IN IN IN IN NC GND GND NC GND NC GND GND GND GND IN NC IN GND GND NC GND GND IN IN GND GND GND GND NC GND GND NC NC GND NC GND GND GND GND 10 kΩ + Pin 3 GND GND GND GND GND IN GND GND GND GND GND GND GND IN GND GND GND GND GND GND GND GND GND IN NC GND IN GND GND IN GND IN IN IN NC IN IN IN IN GND IN IN IN GND IN NC IN IN IN 10 kΩ + Pin 4 GND GND GND NC GND GND GND GND NC GND GND GND NC GND IN GND GND GND NC GND GND GND GND GND IN GND IN NC IN GND IN IN IN IN IN GND IN IN IN IN IN IN IN IN IN IN IN IN IN 20 kΩ + Pin 5 GND GND NC GND IN NC GND NC GND IN GND NC GND NC NC GND NC GND GND NC GND IN NC NC IN IN NC GND GND NC NC GND IN IN IN NC NC IN GND GND IN NC IN NC IN IN NC IN IN 20 kΩ + Pin 6 GND IN IN IN IN GND IN IN IN IN IN IN IN GND IN IN IN IN IN IN IN IN IN GND GND IN GND IN IN GND IN GND IN IN GND GND GND GND GND IN IN GND GND IN IN GND GND GND IN AD8270 +OUT 16 14 13 V+IN – V–IN = V+OUT – V–OUT VOCM = V+OUT + V–OUT 1 –IN 2 +IN 3 4 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ _ 10kΩ + + 5 10kΩ 10kΩ AD8270 20kΩ 20kΩ Closed-Loop Gain 1.5 2 3 10kΩ _ 10kΩ Table 9. Closed-Loop Gain of the Difference Amplifiers 12 11 +IN 10 –IN +IN +OUT = VOCM –OUT –IN 9 20kΩ 20kΩ 8 7 6 OCM OCM Figure 48. Differential Output, G = 1, Common-Mode Output Voltage Set with Reference Voltage Gain of 1 Configuration +OUT The AD8270 is designed to be stable for loop gains of 1.5 and greater. Because a typical voltage follower configuration has a loop gain of 1, it may be unstable. Several stable G = 1 configurations are listed in Table 8. DIFFERENTIAL OUTPUT The AD8270 can easily be configured for differential output. Figure 48 shows the configuration for a G = 1 differential output amplifier. The OCM node in the figure sets the common-mode output voltage. Figure 49 shows the configuration for a G = 1 differential output amplifier, where the average of two voltages sets the common-mode output voltage. For example, this configuration can be used to set the common mode at 2.5 V, using just a 5 V reference and GND. 16 1 –IN 2 +IN 3 A 4 10kΩ 10kΩ 10kΩ –OUT 14 15 10kΩ 13 10kΩ 10kΩ _ _ 10kΩ + + 10kΩ 10kΩ AD8270 20kΩ 20kΩ 5 10kΩ V+IN – V–IN = V+OUT – V–OUT V + VB V+OUT + V–OUT = A 2 12 11 +IN 10 –IN 9 A +IN +OUT = VOCM –OUT –IN 20kΩ 20kΩ 7 6 8 VA + VB 2 B 06979-063 Difference Amplifier Gain 0.5 1 2 –OUT 15 06979-062 The AD8270 Specifications section and Typical Performance Characteristics section show the performance of the part primarily when it is in the difference amplifier configuration. To get a good estimate of the performance of the part in a single-ended configuration, refer to the difference amplifier configuration with the corresponding closed-loop gain (see Table 9). Figure 49. Differential Output, G = 1, Common-Mode Output Voltage Set as the Average of Two Voltages Note that these two configurations are based on the G = 0.5 difference amplifier configurations shown in Figure 42 and Figure 45. A similar technique can be used to create differential output with a gain of 2 or 4, using the G = 1 and G = 2 difference amplifier configurations, respectively. Rev. 0 | Page 17 of 20 AD8270 To reduce the peaking, use a resistor between the AD8270 and the cable. Because cable capacitance and desired output response vary widely, this resistor is best determined empirically. A good starting point is 20 Ω. DRIVING AN ADC The AD270 high slew rate and drive capability, combined with its dc accuracy, make it a good ADC driver. The AD8270 can drive both single-ended and differential input ADCs. Many converters require the output to be buffered with a small value resistor combined with a high quality ceramic capacitor. See the converter data sheet for more details. Figure 51 shows the AD8270 in differential configuration, driving the AD7688 ADC. The AD8270 divides down the 5 V reference voltage from the ADR435, so that the common-mode output voltage is 2.5 V, which is precisely where the AD7688 needs it. AD8270 (DIFF OUT) DRIVING CABLING AD8270 (SINGLE OUT) +12V –12V 16 13 10kΩ 06979-060 All cables have a certain capacitance per unit length, which varies widely with cable type. The capacitive load from the cable may cause peaking or instability in output response, especially when the AD8270 is operating in a gain of 0.5. Figure 50. Driving Cabling NOTE: POWER SUPPLY DECOUPLING NOT SHOWN. 1 10kΩ 2 +IN 3 4 5 6 5V_REF 0.1µF 7 8 9 –IN 10 +IN 11 15 10kΩ 33Ω 10kΩ 4 2.7nF COG 20kΩ +IN AD7688 33Ω 20kΩ 20kΩ 3 2.7nF COG –IN REF 1 AD8270 0.1µF +12V 20kΩ 2 10kΩ VIN 10kΩ 14 10kΩ VOUT 5 ADR435 5V_REF 10µF GND 10kΩ 4 10kΩ 12 Figure 51. Driving an ADC Rev. 0 | Page 18 of 20 06979-037 –IN 10kΩ AD8270 OUTLINE DIMENSIONS 4.00 BSC SQ 0.60 MAX 0.60 MAX 13 PIN 1 INDICATOR 12° MAX 12 PIN 1 INDICATOR 1 2.50 2.35 SQ 2.20 EXPOSED PAD 3.75 BSC SQ 0.50 0.40 0.30 (BOTTOM VIEW) 9 8 5 4 0.25 MIN 1.95 BSC 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM SEATING PLANE 0.35 0.30 0.25 0.20 REF COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VGGC 010606-0 1.00 0.85 0.80 0.65 BSC TOP VIEW 16 Figure 52. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-10) Dimensions are shown in millimeters ORDERING GUIDE Model AD8270ACPZ-R7 1 AD8270ACPZ-RL1 AD8270ACPZ-WP1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ Z = RoHS Compliant Part. Rev. 0 | Page 19 of 20 Package Option CP-16-10 CP-16-10 CP-16-10 AD8270 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06979-0-1/08(0) Rev. 0 | Page 20 of 20