E2E0038-27-Y3 ¡ Semiconductor MSM64481 ¡ Semiconductor This version: MSM64481 Jan. 1998 Previous version: Mar. 1996 Built-in 512-Bit EEPROM and LCD Driver 4-Bit Microcontroller GENERAL DESCRIPTION The MSM64481 is a 4-bit microcontroller with built-in EEPROM that incorporates OKI's nX-4s CPU core. The device contains a 2K-byte ROM, 128-nibble RAM, 128-nibble EEPROM, 1/2 duty LCD driver, time base counter, watchdog timer, low voltage detection circuit, seven interrupt sources, one 3-bit input port, two 4-bit input/output ports, and 500 kHz RC oscillator circuit (with an external capacitor C). FEATURES • Operating range Operating frequency : 200 kHz to 1 MHz Operating voltage : 3 to 6 V Operating temperature : –40 to +85°C • Internal program memory : 2048 bytes • Internal data memory : 128 nibbles • Built-in EEPROM : 128 nibbles • Interrupt sources : 6 (3 internal, 3 external) • Minimum instruction execution time : 6 ms (@ 500 kHz) • I/O Port Input-output port : 2 ports ¥ 4 bits Input port : 1 port ¥ 3 bits • 1/2 duty LCD driver Segment drivers : 40 Common drivers : 2 • Built-in watchdog timer • CPU operating voltage : 3.0 to 5.5 V • EEPROM writable operating voltage : 4.5 to 5.5 V • LCD display operating voltage : 3.0 to 6.0 V • Package options 60-pin plastic QFP (QFP60-P-1519-1.00-K) : (Product name: MSM64481-014GS-K) 56-pin plastic QFP (QFP56-P-910-0.65-2K) : (Product name: MSM64481-014GS-2K-H) 1/12 DB7-0 P0 ROM TR2 TR0 TR1 PCM PCL (2048 bytes) PCH P1 ALU C A8, A9 A7-0 H (4) H (4) B L X Y STBY TIMING CONTROL ROMR TEST EEPROM LCD (128 nibbles) IR RESET TBC P2 P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 SEG1 SP INST. DECODER OSC SFR RAM (128 nibbles) (8) DB7-0 OSC1 P0.0/INT P0.1/INT P0.2 ¡ Semiconductor (8) BLOCK DIAGRAM INT WDT LOW VOLTAGE DETECT INTERRUPT CONTROL INT SEG40 COM1 COM2 INT 2/12 VDD1 GND VDD2 MSM64481 INT DRIVER INT ¡ Semiconductor MSM64481 56 55 54 53 52 51 50 49 48 47 46 45 44 43 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 NC SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 PIN CONFIGURATION (TOP VIEW) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 COM2 COM1 VDD2 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P0.2 P1.0 P1.1 P1.2 P1.3 P2.0 GND P2.1 P2.2 P2.3 VDD1 OSC1 RESET TEST SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 P0.0 P0.1 56-Pin Plastic QFP NC: No-connection pin 3/12 ¡ Semiconductor MSM64481 48 SEG15 47 SEG14 50 SEG17 49 SEG16 52 SEG19 51 SEG18 54 SEG21 53 SEG20 56 SEG23 55 SEG22 58 SEG25 57 SEG24 60 SEG27 59 SEG26 PIN CONFIGURATION (TOP VIEW) (Continued) SEG28 1 46 SEG13 SEG29 2 45 SEG12 SEG30 3 44 SEG11 SEG31 4 43 SEG10 SEG32 5 42 SEG9 SEG33 6 41 SEG8 SEG34 7 40 SEG7 SEG35 8 39 SEG6 SEG36 9 38 SEG5 SEG37 10 SEG38 11 37 SEG4 36 SEG3 35 SEG2 SEG39 12 SEG40 13 34 SEG1 33 COM2 P0.0 14 P0.1 15 32 COM1 31 VDD2 RESET 29 TEST 30 VDD1 27 OSC1 28 P2.2 25 P2.3 26 GND 23 P2.1 24 P1.3 21 P2.0 22 P1.1 19 P1.2 20 P0.2 17 P1.0 18 NC 16 60-Pin Plastic QFP NC: No-connection pin 4/12 ¡ Semiconductor MSM64481 PIN DESCRIPTIONS Function Symbol Type Power supply VDD1 VDD2 — — Power supply for driving the LCD drivers Ground GND — Ground RESET I TEST I I Input port. Also used for external interrupt. P0.1 I Input port. Also used for external interrupt. P0.2 I Input port for detecting external voltage Control P0.0 Description — System reset input pin. When this pin is set "L", the internal state is initialized. This pin contains a built-in pull-up resistor. Pin for IC testing P1.0 P1.1 Ports P1.2 I/O I/O port I/O I/O port P1.3 P2.0 P2.1 P2.2 P2.3 Display drivers COM1 O COM2 SEG1 O to O LCD segment driving outputs I RC oscillator pin (for an external capacitor C) LCD common driving outputs SEG40 Oscillation OSC1 5/12 ¡ Semiconductor MSM64481 MEMORY MAPS Program Memory (ROM) The program memory is a memory area for program data, the interrupt area, the CZP area, and the start addresss area. The data length is 8 bits. Address 0 to address 2047 is assigned to program memory. The following figure shows the address space of program memory. 7FFh Program area 040h 2048 bytes Interrupt area 020h CZP area 010h Start address area 000h 8 bits Program Memory Address Space The CZP area is the start address range of a CZP subroutine of one-byte call instruction. 6/12 ¡ Semiconductor MSM64481 Data Memory (RAM) The data memory space is assigned to RAM and special function registers (SFRs). Data Memory is located in a different address space from program memory. The data length is 4 bits (1nibble), and a bank unit is 256 nibbles. The data memory uses two bank areas: one for the EEPROM and SFR areas, in Bank 0; the other for RAM, including the stack, in Bank 7. The following figure shows the address space of data memory. 7FFh 7FFh RAM area 780h BANK7 Unused area 780h Data/stack 128 nibbles area 128 nibbles 700h Inaccessible area 07Fh 07Eh Stack pointer HALT 07Dh MIEF 07Ch 0FFh Other SFR area EEPROM area 07Fh 128 nibbles BANK0 SFR area 000h 000h 4 bits Data Memory Address Space 7/12 ¡ Semiconductor MSM64481 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Power Supply Voltage for LCD Displays Input Voltage Symbol Condition Rating Unit VDD1 Ta=25°C –0.3 to +7 V VDD2 Ta=25°C –0.3 to +7 V VIN Ta=25°C –0.3 to VDD1+0.3 V V V Output Voltage 1 VOUT1 VDD1 output, Ta=25°C –0.3 to VDD1+0.3 Output Voltage 2 VOUT2 VDD2 output, Ta=25°C –0.3 to VDD2+0.3 Storage Temperature TSTG — –55 to +150 °C RECOMMENDED OPERATING CONDITIONS Parameter Operating Voltage 1 (CPU operable range) Operating Voltage 2 (EEPROM writable range) Operating Voltage Symbol Condition Range Unit VDD1 — 3.0 to 5.5 V VDD1 — 4.5 to 5.5 V VDD2 — 3.0 to 6.0 V (LCD display enable range) Operating Frequency fOP — 200 to 1000 kHz EEPROM Rewritable Cycle — — 10,000 cycles EEPROM Data Retaining Years — — 10 years Operating Temperature Top — –40 to +85 °C 8/12 ¡ Semiconductor MSM64481 ELECTRICAL CHARACTERISTICS DC Characteristics (VDD1=5 V, VDD2=6 V, Ta=–40 to +85°C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. VIH1 — VDD1¥0.7 — — (P2.0 to P2.3) VIL1 — — — VDD1¥0.2 Input Voltage 2 VIH2 — VDD1¥0.7 — — (TEST, RESETB) VIL2 — — — VDD1¥0.2 Input Current 1 IIH1 VIH1=VDD1 — — 1 (P2.0 to P2.3) IIL1 VIL1=GND –1 — — Input Current 2 IIH2 VIH2=VDD1 — — 1 IIL2 VIL2=GND –1 — — 5 — 40 — — –2 Input Voltage 1 Unit (P1.0 to P1.3) V (P0.0 to P0.2) (P1.0 to P1.3) µA (P0.0 to P0.2) (TEST, RESETB) Pull-up Resistance (P1.0 to P1.3) RON (P2.0 to P2.3) Output Current 1 IOH1 (P1.0 to P1.3) (P2.0 to P2.3) Output Voltage 2 (SEG1 to SEG40) Output Voltage 3 (COM1 to COM2) Intermediate Level Output Voltage (COM1 to COM2) VOL1 VOH2 VOL2 VOH3 VOL3 VOM RC Oscillation Frequency fOSC Static Current Consumption IDDS *1 Dynamic Current Consumption IDD1 *2 IDD2 *3 VDD1=5 V VI=0 V VDD1=4.5 V VO=4.1 V VDD1=4.5 V VO=0.4 V VDD2=5 V IO=–50 µA VDD2=5 V IO=50 µA VDD2=5 V IO=–50 µA VDD2=5 V IO=50 µA VDD2=5 V IO=±20 µA mA 2 — — — — VDD2–0.20 0.20 — — — — VDD2–0.20 0.20 — — 2.25 2.50 2.75 V VDD1=4.5 to 5.5 V 500±35% C=47 pF CPU in halt state CPU in operation IDDE *2 During write to EEPROM kW V kHz — — 20 — — 3 — — 1 — — 5 µA mA *1 VDD1=5.5 V, operating frequency f=0 Hz *2 VDD1=5.5 V, VDD2=6 V, operating frequency f=500 kHz *3 VDD1=5.5 V, VDD2=6 V, operating frequency f=500 kHz, LCD in display state 9/12 ¡ Semiconductor MSM64481 AC Characteristics (VDD1=3 to 5.5 V, Ta=–40 to +85°C unless otherwise specified) Parameter Symbol Condition Min. tOSCW — OSC Clock Cycle tOSC — Input Data Setup Time tSU Input Data Hold Time OSC Clock Pulse Width Max. Unit 500 — ns 1 — µs VDD1=4.5 to 5.5 V 200 — ns tHL VDD1=4.5 to 5.5 V 300 — ns tD VDD1=4.5 to 5.5 V, Cl=30 pF — 400 ns P0.1 External Interrupt Pulse Width tWP01 — 15 tOSC — ns Reset Pulse Width tWRES — 6 tOSC — ns Output Data Delay Time tOSC OSC tOSCW tOSCW P0, P1 tSU tHL tD P0, P1 tWP01 P0.1 tWRES RESET 10/12 ¡ Semiconductor MSM64481 PACKAGE DIMENSIONS (Unit : mm) QFP60-P-1519-1.00-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.50 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 11/12 ¡ Semiconductor MSM64481 (Unit : mm) QFP56-P-910-0.65-2K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.43 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 12/12