HD74HC373, HD74HC533 Octal D-type Transparent Latches (with 3-state outputs) Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0200 (Previous ADE-205-498) Rev.2.00 Mar 30, 2006 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features • High Speed Operation: tpd (D to Q) = 16 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name HD74HC373P HD74HC533P HD74HC373FPEL HD74HC533FPEL Package Type DILP-20 pin SOP-20 pin (JEITA) Package Code (Previous Code) PRDP0020AC-B (DP-20NEV) PRSP0020DD-B (FP-20DAV) Package Abbreviation P — FP EL (2,000 pcs/reel) PRSP0020DC-A RP (FP-20DBV) PTSP0020JB-A HD74HC373TELL TSSOP-20 pin T (TTP-20DAV) Note: Please consult the sales office for the above package availability. HD74HC533RPEL Taping Abbreviation (Quantity) EL (1,000 pcs/reel) SOP-20 pin (JEDEC) ELL (2,000 pcs/reel) Function Table Output Control L Enable G H D H HD74HC373 Q H HD74HC533 Q L L L H L L X L No change H No change Z Z Note: H X X 1. H; High level, L; Low level, X; Irrelevant, Z; High impedance Rev.2.00 Mar 30, 2006 page 1 of 9 HD74HC373, HD74HC533 Pin Arrangement HD74HC373 Output Control 1 20 VCC 1Q 2 19 8Q 1D 3 18 8D 2D 4 17 7D 2Q 5 16 7Q 3Q 6 15 6Q 3D 7 14 6D 4D 8 13 5D 4Q 9 12 5Q GND 10 11 Enable G (Top view) HD74HC533 Output Control 1 20 VCC 1Q 2 19 8Q 1D 3 18 8D 2D 4 17 7D 2Q 5 16 7Q 3Q 6 15 6Q 3D 7 14 6D 4D 8 13 5D 4Q 9 12 5Q GND 10 11 Enable G (Top view) Rev.2.00 Mar 30, 2006 page 2 of 9 HD74HC373, HD74HC533 Logic Diagram HD74HC373 1D 2D D G 3D D Q G 4D D Q 5D D G Q G 6D D Q G 7D D Q 8D D G Q G D Q G Q Enable G Output Control 1Q 2Q 3Q 4Q 2D 3D 4D 5D 5Q 6Q 7Q 8Q HD74HC533 1D D D GQ D GQ D GQ 6D D GQ 7D D GQ 8D D GQ D GQ GQ Enable G Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q Absolute Maximum Ratings Item Supply voltage range Symbol VCC Ratings –0.5 to 7.0 Unit V Input / Output voltage Input / Output diode current VIN, VOUT IIK, IOK –0.5 to VCC +0.5 ±20 V mA Output current VCC, GND current IOUT ICC or IGND ±35 ±75 mA mA PT Tstg 500 –65 to +150 mW °C Power dissipation Storage temperature Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00 Mar 30, 2006 page 3 of 9 HD74HC373, HD74HC533 Recommended Operating Conditions Item Symbol Ratings Unit Supply voltage Input / Output voltage VCC VIN, VOUT 2 to 6 0 to VCC V V Operating temperature Ta –40 to 85 0 to 1000 °C tr , tf 0 to 500 0 to 400 ns Input rise / fall time Note: *1 Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Ta = –40 to+85°C Unit Test Conditions 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 — — — — 0.26 ±0.5 — — 0.33 ±5.0 IOH = 7.8 mA µA Vin = VIH or VIL, Vout = VCC or GND — — — — ±0.1 4.0 — — ±1.0 40 µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA Off-state output current IOZ 6.0 6.0 Input current Quiescent supply current Iin ICC 6.0 6.0 Rev.2.00 Mar 30, 2006 page 4 of 9 V V V Vin = VIH or VIL IOH = –20 µA IOH = –6 mA IOH = –7.8 mA V Vin = VIH or VIL IOL = 20 µA IOH = 6 mA HD74HC373, HD74HC533 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Propagation delay time Output enable time tPLH tPHL 2.0 Min — Typ — 150 — Max 190 4.5 6.0 — — 18 — 30 26 — — 38 33 tPLH tPHL 2.0 4.5 — — — 16 125 25 — — 155 31 tZL 6.0 2.0 — — — — 21 150 — — 26 190 4.5 6.0 — — 12 — 30 26 — — 38 33 2.0 4.5 — — — 15 150 30 — — 190 38 6.0 2.0 — — — — 26 150 — — 33 190 4.5 6.0 — — 13 — 30 26 — — 38 33 2.0 4.5 — — — 16 150 30 — — 190 38 6.0 2.0 — 100 — — 26 — — 125 33 — 4.5 6.0 20 17 1 — — — 25 21 — — 2.0 4.5 50 10 — 1 — — 65 13 — — 6.0 2.0 9 80 — — — — 11 100 — — 4.5 6.0 16 14 6 — — — 20 17 — — tZH Output disable time tLZ tHZ Setup time Ta = –40 to +85°C tsu Hold time th Pulse width tw Output rise/fall time tTLH tTHL 2.0 4.5 — — — 4 60 12 — — 75 15 Input capacitance Cin 6.0 — — — — 5 10 10 — — 13 10 Unit Test Conditions ns G to Q ns D to Q ns ns ns ns ns ns ns ns pF Test Circuit VCC VCC Output Pulse Generator Zout = 50 Ω Input Pulse Generator Zout = 50 Ω OC See Function Table Input 1Q to 8Q or 1Q to 8Q S1 OPEN GND CL = 50 pF VCC 1D to 8D Enable G Note : 1. CL includes probe and jig capacitance. Rev.2.00 Mar 30, 2006 page 5 of 9 1 kΩ TEST t PLH / t PHL S1 OPEN t ZH/ t HZ t ZL / t LZ GND VCC HD74HC373, HD74HC533 Waveforms • Waveform – 1 tf tr VCC 90 % 90 % 50 % Input G 50 % 10 % tr 10 % tf VCC 90 % 90 % Input D 0V 10 % 10 % t PHL t PLH Output Q 0V VOH 50 % 50 % VOL Output Q • Waveform – 2 tr VCC 90 % Input G 10 % tr Input D 0V tf 90 % 50 % VCC 90 % 50 % 10 % 10 % t PHL t PLH 0V Output Q VOH 50 % 50 % Output Q VOL • Waveform – 3 tr tf VCC 90 % 90 % 50 % 50 % Input G 10 % tw tsu 10 % 0V th VCC Input D 50 % 50 % 0V Rev.2.00 Mar 30, 2006 page 6 of 9 HD74HC373, HD74HC533 • Waveform – 4 tf Input OC tr 90 % 50 % 10 % VCC 90 % 50 % 10 % t LZ t ZL 0V VOH Waveform - A 50 % t ZH Waveform - B 50 % 10 % VOL t HZ 90 % VOH VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 7 of 9 HD74HC373, HD74HC533 Package Dimensions JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g D 11 E 20 1 10 b3 0.89 A1 A Z Reference Symbol L e1 D E A A1 bp b3 c θ e Z L θ bp e c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B *1 Previous Code FP-20DAV Min Nom Max 7.62 24.50 25.40 6.30 7.00 5.08 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.27 2.54 MASS[Typ.] 0.31g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 20 Dimension in Millimeters 11 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 10 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 8 of 9 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 12.60 13.0 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 HD74HC373, HD74HC533 JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A *1 Previous Code FP-20DBV MASS[Typ.] 0.52g D F 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET. 11 c *2 E HE bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Reference Symbol 10 e *3 bp x M L1 A Z A1 θ L y Detail F JEITA Package Code P-TSSOP20-4.4x6.5-0.65 RENESAS Code PTSP0020JB-A *1 Previous Code TTP-20DAV D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 12.80 13.2 7.50 0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0° 8° 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45 MASS[Typ.] 0.07g D F 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 11 c HE *2 E bp Terminal cross section ( Ni/Pd/Au plating ) Index mark Reference Symbol 1 e *3 bp L1 x M A Z 10 A1 θ L y Detail F Rev.2.00 Mar 30, 2006 page 9 of 9 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 6.50 6.80 4.40 0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0° 8° 6.20 6.40 6.60 0.65 0.13 0.10 0.65 0.4 0.5 0.6 1.0 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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