ETC AM24LC02VTS8 2-wire serial 2k-bits (256 x 8) cmos electrically erasable prom Datasheet

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CONTROL
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STOP
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ck
load
SLAVE
ADDRESS
REGISTER
&
COMPARATOR
A0
A1
A2
inc
WORD
ADDRESS
COUNTER
6
EEPROM
ARRAY
64
XDEC
DATA
BIT
64X4X8
4
2
R/W ~
YDEC
8
VCC
VSS
DATA
REGISTER
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Dout
DOUT
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Thigh
Tf
Tr
Tlow
Tlow
SCL
Thd:Sta
Tsu:Dat
Tsu:Sta
Thd:Dat
Tsu:Sta
SDA
IN
Tbuf
Taa
Tdh
SDA
OUT
SDA
SCL
DATA STABLE
DATA
CHANGE
Figure 1. Data Validity
SDA
SCL
START
BIT
STOP
BIT
Figure 2. Definition of Start and Stop
SCL FROM MASTER
1
8
9
DATA OUTPUT FROM
TRANSMITTER
DATA OUTPUT FROM
RECEIVER
ACKNOWLEDGE
START
Figure 3. Acknowledge Response from Receiver
("!
!
ATC
x BUS ACTIVITY
MASTER
SDA
LINE
SLAVE
ADDRESS
START
BYTE
ADDRESS
DATA n
STOP
S
P
A
C
K
BUS ACTIVITY
SLAVE
A
C
K
A
C
K
Figure 4. Byte Write for Data
BUS ACTIVITY START
MASTER
SDA
LINE
SLAVE
ADDRESS
BYTE
ADDRESS n
DATA n
DATA n+7
STOP
S
P
A
C
K
A
C
K
BUS ACTIVITY
SLAVE
A
C
K
A
C
K
Figure 5. Page Write for Data
BUS ACTIVITY
MASTER
START
SDA
LINE
SLAVE
ADDRESS
STOP
s
P
A
C
K
BUS ACTIVITY
SLAVE
No
A
C
K
DATA
Figure 6. Current Address Read for Data
BUS ACTIVITY
START
MASTER
SDA
LINE
SLAVE
ADDRESS
BYTE
ADDRESS n
START
S
SLAVE
ADDRESS
STOP
S
A
C
K
BUS ACTIVITY
SLAVE
P
A
C
K
A
C
K
No
A
C
K
DATA n
Figure 7. Random Read for Data
BUS ACTIVITY
MASTER
SDA
LINE
BUS ACTIVITY
SLAVE
START
SLAVE
ADDRESS
A
C
K
A
C
K
STOP
S
P
A
C
K
DATA n+1
DATA n
Figure 8. Sequential Read for Data
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DATA n+x
No
A
C
K
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ATC
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E1
E-PIN O0.118 NOTE 9
PIN #1 INDENT O0.025 DEEP 0.006-0.008
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7 (4X)
A1
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ATC
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PIN 1 INDICATOR O0.70
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L1
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