ON NTD2955PT4G Power mosfet Datasheet

NTD2955, NVD2955
Power MOSFET
−60 V, −12 A, P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. Designed for low−voltage, high−
speed switching applications in power supplies, converters, and power
motor controls. These devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer an additional safety margin against unexpected
voltage transients.
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V(BR)DSS
RDS(on) TYP
ID MAX
−60 V
155 mW @ −10 V, 6 A
−12 A
Features
• Avalanche Energy Specified
• IDSS and VDS(on) Specified at Elevated Temperature
• Designed for Low−Voltage, High−Speed Switching Applications and
P−Channel
D
to Withstand High Energy in the Avalanche and Commutation Modes
• NVD Prefix for Automotive and Other Applications Requiring
•
G
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
S
MARKING DIAGRAMS
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Unit
VDSS
−60
Vdc
VGS
VGSM
± 20
± 25
Vdc
Vpk
Drain Current
Drain Current − Continuous @ Ta = 25°C
Drain Current − Single Pulse (tp ≤ 10 ms)
ID
IDM
−12
−18
Adc
Apk
Total Power Dissipation @ Ta = 25°C
PD
55
W
TJ, Tstg
−55 to
175
°C
EAS
216
mJ
RqJC
RqJA
RqJA
2.73
71.4
100
°C/W
TL
260
°C
Operating and Storage Temperature
Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak
IL = 12 Apk, L = 3.0 mH, RG = 25 W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8 in. from case for
10 seconds
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 1 in pad size
(Cu area = 1.127 in2).
2. When surface mounted to an FR4 board using the minimum recommended
pad size (Cu area = 0.412 in2).
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 13
1
4
1 2
4
Drain
4
Drain
YWW
NTP
2955G
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤ 10 ms)
Value
3
DPAK
CASE 369C
STYLE 2
2
2
1
1
3
3
Drain
Drain
Gate
Source Gate
Source
4
1
4
Drain
YWW
NT
2955G
Drain−to−Source Voltage
Symbol
YWW
NT
2955G
Rating
2
3
DPAK−3
CASE 369D
STYLE 2
Y
WW
G
1 2 3
Gate Drain Source
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTD2955/D
NTD2955, NVD2955
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
−60
−
−
67
−
−
−
−
−
−
−10
−100
−
−
−100
−2.0
−
−2.8
4.5
−4.0
−
−
0.155
0.180
−1.86
−
−2.6
−2.0
8.0
−
Mhos
pF
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = −0.25 mA)
(Positive Temperature Coefficient)
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = −60 Vdc, TJ = 25°C)
(VGS = 0 Vdc, VDS = −60 Vdc, TJ = 150°C)
IDSS
Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
(VDS = VGS, ID = −250 mAdc)
(Negative Temperature Coefficient)
VGS(th)
Static Drain−Source On−State Resistance
(VGS = −10 Vdc, ID = −6.0 Adc)
RDS(on)
Drain−to−Source On−Voltage
(VGS = −10 Vdc, ID = −12 Adc)
(VGS = −10 Vdc, ID = −6.0 Adc, TJ = 150°C)
VDS(on)
Forward Transconductance (VDS = 10 Vdc, ID = 6.0 Adc)
gFS
Vdc
mV/°C
W
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = −25 Vdc, VGS = 0 Vdc,
F = 1.0 MHz)
Output Capacitance
Reverse Transfer Capacitance
Ciss
−
500
750
Coss
−
150
250
Crss
−
50
100
td(on)
−
10
20
tr
−
45
85
td(off)
−
26
40
SWITCHING CHARACTERISTICS (Notes 3 and 4)
Turn−On Delay Time
Rise Time
(VDD = −30 Vdc, ID = −12 A,
VGS = −10 V, RG = 9.1 W)
Turn−Off Delay Time
Fall Time
Gate Charge
(VDS = −48 Vdc, VGS = −10 Vdc,
ID = −12 A)
tf
−
48
90
QT
−
15
30
QGS
−
4.0
−
QGD
−
7.0
−
−
−
−1.6
−1.3
−2.5
−
trr
−
50
ta
−
40
−
tb
−
10
−
QRR
−
0.10
−
ns
nC
DRAIN−SOURCE DIODE CHARACTERISTICS (Note 3)
Diode Forward On−Voltage
(IS = 12 Adc, VGS = 0 V)
(IS = 12 Adc, VGS = 0 V, TJ = 150°C)
VSD
Reverse Recovery Time
(IS = 12 A, dIS/dt = 100 A/ms ,VGS = 0 V)
Reverse Recovery Stored Charge
3. Indicates Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperature.
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2
Vdc
ns
mC
NTD2955, NVD2955
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS = -10 V
TJ = 25°C
-9 V
-8 V
-9.5 V
20
−ID, DRAIN CURRENT (A)
−ID, DRAIN CURRENT (A)
25
-7 V
-6.5 V
15
-6 V
10
-5.5 V
-5 V
5
0
0
1
2
3
4
5
6
7
8
9
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
24
22
20
25°C
12
6
4
2
2
3
5
7
9
4
6
8
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.35
TJ = 125°C
0.25
25°C
0.15
-55°C
0.10
0.05
0
0
3
6
15
9
12
18
−ID, DRAIN CURRENT (AMPS)
21
24
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
0.40
0.250
0.200
1.6
VGS = −10 V
0.175
0.150
-15 V
0.125
0.100
0.075
0.050
0
1000
1.2
1.0
0.8
0.6
0.4
6
9
18
12
15
-ID, DRAIN CURRENT (AMPS)
21
24
VGS = 0 V
VGS = −10 V
ID = −6 A
1.4
3
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
2.0
1.8
TJ = 25°C
0.225
Figure 3. On−Resistance versus Drain Current
and Temperature
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
VGS = −10 V
0.20
10
Figure 2. Transfer Characteristics
0.50
0.30
125°C
10
8
Figure 1. On−Region Characteristics
0.45
TJ = -55°C
18
16
14
0
10
VDS ≥ −10 V
100
TJ = 125°C
10
100°C
0.2
0
-50
-25
0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE (°C)
150
1
175
5
Figure 5. On−Resistance Variation with
Temperature
10 15 20 25 30 35 40 45 50 55
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−To−Source Leakage
Current versus Voltage
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3
60
C, CAPACITANCE (pF)
1000
800
VDS = 0 V
VGS = 0 V
TJ = 25°C
Ciss
Crss
Ciss
400
Coss
200
Crss
5
0
5
-VGS
10
15
20
25
ID = 12 A
TJ = 25°C
VDS
12.5
600
0
10
15
QT
10
60
50
40
VGS
7.5
30
QGD
QGS
5
20
2.5
10
0
0
2
4
6
8
10
12
0
16
14
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1200
−VGS, GATE−TO−SOURCE VOLTAGE (V)
NTD2955, NVD2955
QT, TOTAL GATE CHARGE (nC)
-VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
Figure 7. Capacitance Variation
15
VDD = −30 V
ID = −12 A
VGS = −10 V
TJ = 25°C
−IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
1000
100
tf
tr
td(off)
td(on)
10
1
1
10
VGS = 0 V
TJ = 25°C
10
5
0
100
RG, GATE RESISTANCE (W)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
ID, DRAIN CURRENT (AMPS)
100
VGS = −15 V
SINGLE PULSE
TC = 25°C
10
di/dt
100 ms
IS
1 ms
0.1
0.1
trr
10 ms
1
dc
ta
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
tb
TIME
0.25 IS
tp
10
100
IS
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 12. Diode Reverse Recovery Waveform
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTD2955, NVD2955
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
P(pk)
0.1 0.05
0.02
t1
0.01
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.01
1.0E-05
1.0E-04
1.0E-03
1.0E-02
t, TIME (s)
Figure 13. Thermal Response
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5
1.0E-01
RqJC(t) = r(t) RqJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RqJC(t)
1.0E+00
1.0E+01
NTD2955, NVD2955
ORDERING INFORMATION
Package
Shipping†
NTD2955G
DPAK
(Pb−Free)
75 Units / Rail
NTD2955−1G
IPAK
(Pb−Free)
75 Units / Rail
NTD2955T4G
DPAK
(Pb−Free)
NVD2955T4G*
DPAK
(Pb−Free)
Device
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
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6
NTD2955, NVD2955
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE D
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
b2
e
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
H
DETAIL A
3
c
b
0.005 (0.13)
M
H
C
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
2.58
0.102
5.80
0.228
3.00
0.118
1.60
0.063
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
6.17
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
NTD2955, NVD2955
PACKAGE DIMENSIONS
IPAK
CASE 369D
ISSUE C
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
4
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
Z
3
−T−
SEATING
PLANE
K
J
F
D
G
H
3 PL
0.13 (0.005)
M
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NTD2955/D