TI1 ISO3080DW Isolated 5-v full and half-duplex rs-485 transceiver Datasheet

ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
ISOLATED 5-V FULL AND HALF-DUPLEX RS-485 TRANSCEIVERS
Check for Samples: ISO3080, ISO3086, ISO3082, ISO3088
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
1
•
•
•
•
•
•
•
•
•
4000-VPEAK Isolation, 560-Vpeak VIORM
– UL 1577, IEC 60747-5-2 (VDE 0884, Rev. 2),
IEC 61010-1, IEC 60950-1 and CSA
Approved
Bus-Pin ESD Protection
– 16 kV HBM Between Bus Pins and GND2
– 6 kV HBM Between Bus Pins and GND1
1/8 Unit Load – Up to 256 Nodes on a Bus
Meets or Exceeds TIA/EIA RS-485
Requirements
Signaling Rates up to 20 Mbps
Thermal Shutdown Protection
Low Bus Capacitance – 16 pF (Typ)
50 kV/ms Typical Transient Immunity
Fail-safe Receiver for Bus Open, Short, Idle
3.3-V Inputs are 5-V Tolerant
Security Systems
Chemical Production
Factory Automation
Motor/Motion Control
HVAC and Building Automation Networks
Networked Security Stations
ISO3080
Full-Duplex
ISO3086
Full-Duplex
200 kbps
20 Mbps
ISO3082
Half-Duplex
200 kbps
ISO3088
Half-Duplex
20 Mbps
DESCRIPTION
The ISO3080, and ISO3086 are isolated full-duplex differential line drivers and receivers while the ISO3082, and
ISO3088 are isolated half-duplex differential line transceivers for TIA/EIA 485/422 applications.
These devices are ideal for long transmission lines since the ground loop is broken to allow for a much larger
common-mode voltage range. The symmetrical isolation barrier of the device is tested to provide 2500 Vrms of
isolation for 60s between the bus-line transceiver and the logic-level interface.
Any cabled I/O can be subjected to electrical noise transients from various sources. These noise transients can
cause damage to the transceiver and/or near-by sensitive circuitry if they are of sufficient magnitude and
duration. These isolated devices can significantly increase protection and reduce the risk of damage to
expensive control circuits.
The ISO3080, SO3082, ISO3086 and ISO3088 are qualified for use from –40°C to 85°C.
spacer
ISO3080, ISO3086
GND1
GND1
1
2
16
15
Vcc2
GND2
3
4
5
6
7
8
14
13
12
A
B
Z
Y
GND2
11
10
9
R
3
4
RE
DE 5
D
6
GALVANIC ISOLATIO N
Vcc1
GND1
R
RE
DE
D
function diagram
GND2
14
13
12
11
function diagram
DW PACKAGE
A
B
Z
Y
Vcc1
GND1
R
RE
DE
D
GND1
GND1
1
2
16
15
3
4
5
6
7
8
14
13
12
11
10
9
5
Vcc2
DE
GND2
nc
6
D
B
3
A
R
4
nc
RE
GND2
GALVANIC ISOLATION
DW PACKAGE
ISO3082, ISO3088
13
12
B
A
GND2
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2011, Texas Instruments Incorporated
ISO3080, ISO3086
ISO3082, ISO3088
SLOS581D – MAY 2008 – REVISED JANUARY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1)
VALUE
UNIT
–0.3 to 6
V
Voltage at any bus I/O terminal
–9 to 14
V
Voltage input, transient pulse, A, B, Y, and Z (through 100Ω, see Figure 11)
–50 to 50
V
VI
Voltage input at any D, DE or RE terminal
–0.5 to 7
V
IO
Receiver output current
±10
mA
VCC
Input supply voltage,
VO
VIT
(2)
VCC1, VCC2
Human Body Model
ESD
Electrostatic
discharge
JEDEC Standard 22,
Test Method A114-C.01
Charged Device
Model
JEDEC Standard 22,
Test Method C101
Machine Model
ANSI/ESDS5.2-1996
Bus pins and GND1
±6
Bus pins and GND2
±16
All pins
±4
kV
±1
All pins
kV
±200
V
TJ
Maximum junction temperature
150
°C
TSTG
Operating junction temperature
–65 to 150
°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values except differential I/O bus voltages are with respect to network ground terminal and are peak voltage values
RECOMMENDED OPERATING CONDITIONS
MIN
VCC1
(1)
Logic-side supply voltage
(1)
VCC2
Bus-side supply voltage
VOC
Voltage at either bus I/O terminal
VIH
High-level input voltage
VIL
Low-level input voltage
VID
Differential input voltage
RL
Differential input resistance
A with respect to B
Dynamic (ISO3086)
TJ
Operating junction temperature
MAX
5
UNIT
5.5
V
5.5
V
–7
12
V
2
VCC
0
0.8
–12
12
V
V
see Figure 14
54
Driver
Output current
(1)
4.5
A, B
D, DE, RE
IO
TYP
3.15
Receiver
Ω
60
–60
60
–8
8
–40
85
mA
°C
For 5-V operation, VCC1 or VCC2 is specified from 4.5 V to 5.5 V. For 3.3-V operation, VCC1 is specified from 3.15 V to 3.6V.
SUPPLY CURRENT
over recommended operating condition (unless otherwise noted)
PARAMETER
ICC1
Logic-side supply current
ICC2
Bus-side supply current
2
TEST CONDITIONS
MIN
RE at 0 V or VCC, DE at 0 V or VCC1
3.3-V VCC1
RE at 0 V or VCC, DE at 0 V or VCC1
5-V VCC1
RE at 0 V or VCC, DE at 0 V, No load
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TYP
MAX
8
10
15
UNIT
mA
mA
Copyright © 2008–2011, Texas Instruments Incorporated
Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088
ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IO = 0 mA, no load
RL = 54 Ω, See Figure 1
| VOD |
Differential output voltage
magnitude
Δ|VOD|
Change in magnitude of the
differential output voltage
VOC(SS)
Steady-state common-mode
output voltage
ΔVOC(SS)
Change in steady-state
common-mode output voltage
VOC(pp)
Peak-to-peak common-mode
output voltage
See Figure 3
II
Input current
D, DE, VI at 0 V or VCC1
RL = 100 Ω (RS-422), See Figure 1
Vtest from –7 V to +12 V, See Figure 2
High-impedance state output
current
IOZ
See Figure 3
ISO3080
ISO3086
TYP
MAX
3
4.3
VCC
1.5
2.3
2
2.3
UNIT
V
1.5
See Figure 1 and Figure 2
ISO3082
ISO3088
MIN
–0.2
0
0.2
1
2.6
3
–0.1
0.1
0.5
–10
V
V
V
10
mA
See receiver input current
VY or VZ = 12 V,
VCC = 0 V or 5 V,
DE = 0 V
VY or VZ = –7 V.
VCC = 0 V or 5 V,
DE = 0 V
VA or VB at –7 V
IOS
Short-circuit output current
CMTI
Common-mode transient immunity See Figure 12 and Figure 13
1
Other input at 0 V
–1
Other input at 0 V
VA or VB at 12 V
mA
–200
25
200
50
mA
kV/ms
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
tPLH,
tPHL
Propagation delay
PWD (1)
Pulse skew (|tPHL – tPLH|)
tr, tf
Differential output signal rise and fall time
tPZH,
tPZL
Propagation delay,
high-impedance-to-high-level output
Propagation delay,
high-impedance-to-low-level output
tPHZ,
tPLZ
Propagation delay,
high-level-to-high-impedance output
Propagation delay, low-level to
high-impedance output
(1)
TEST CONDITIONS
MIN
TYP MAX
ISO3080/82
0.7
ISO3086/88
ISO3080/82
See Figure 4
ISO3086/88
ISO3080/82
0.5
ISO3086/88
ISO3080/82
ISO3086/88
ISO3080/82
ms
25
45
ns
20
200
3
7.5
0.9
1.5
ms
ns
7
15
50% Vo
2.5
7
90% Vo
1.8
See Figure 5 and
Figure 6,
DE at 0 V
ISO3086/88
UNIT
1.3
25
55
95
225
25
55
ns
ms
ns
Also known as pulse skew
Copyright © 2008–2011, Texas Instruments Incorporated
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ISO3080, ISO3086
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SLOS581D – MAY 2008 – REVISED JANUARY 2011
www.ti.com
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT(+)
Positive-going input threshold voltage
VIT(–)
Negative-going input threshold voltage IO = 8 mA
Vhys
Hysteresis voltage (VIT+ – VIT–)
MIN
TYP
MAX
UNIT
–85
–10
mV
IO = –8 mA
–200
VOH
High-level output voltage
VID = 200 mV, IO = –8 mA,
See Figure 7
VOL
Low-level output voltage
VID = –200 mV, IO = 8 mA,
See Figure 7
IO(Z)
High-impedance state output current
VI = –7 to 12 V, Other input = 0 V
–115
mV
30
mV
3.3-V VCC1
3.3-V VCC1
0.15
0.4
5-V VCC1
0.15
0.4
5-V VCC1
VCC1-0.4
3.1
4
4.8
–1
VA or VB = 12 V
VA or VB = 12 V, VCC = 0
Other input
at 0 V
V
1
0.04
0.1
0.06
0.13
II
Bus input current
IIH
High-level input current, RE
VIH = 2 V
–10
10
IIL
Low-level input current, RE
VIL = 0.8 V
–10
10
RID
Differential input resistance
A, B
CD
Differential input capacitance
Test input signal is a 1.5 MHz sine wave with 1Vpp
amplitude. CD is measured across A and B.
VA or VB = –7 V
VA or VB = –7 V, VCC = 0
–0.1
–0.04
–0.05
–0.03
48
V
mA
mA
mA
mA
kΩ
7
pF
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
tPLH, tPHL
Propagation delay
PWD (1)
Pulse width distortion |tPHL – tPLH|
tr, tf
Output signal rise and fall time
tPHZ,
tPZH
Propagation delay, high-level-to-high-impedance output
Propagation delay, high-impedance-to-high-level output
See Figure 9, DE at 0 V
22
ns
tPZL,
tPLZ
Propagation delay, high-impedance-to-low-level output
Propagation delay, low-level-to-high-impedance output
See Figure 10, DE at 0 V
22
ns
(1)
See Figure 8
90
125
4
12
UNIT
1
ns
ns
Also known as pulse skew.
PARAMETER MEASUREMENT INFORMATION
VCC2
VCC1
IOA
DE
DE
A
0 or
VCC1
GND 1
VOD
B
GND 1
VI
375 W
A
II
D
0 V or 3 V
+
B
VOD
–
60 W
–7 V to 12 V
IOB
GND 2
GND 2
VOB
GND 2
VOA
Figure 1. Driver VOD Test and Current Definitions
375 W
Figure 2. Driver VOD With Common-Mode Loading
Test Circuit
Note: Unless otherwise stated, test circuits are shown for half-duplex devices, ISO3082 & ISO3088. For
full-duplex devices, driver output pins are Y and Z.
4
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Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088
ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
PARAMETER MEASUREMENT INFORMATION (continued)
VCC1
I OA
DE
27 W
A
II
Input
B
VB
27 W
I OB
GND2
VOC
VOA
VOB
VOC(SS)
VOC(p-p)
V OC
GND2
GND1
VA
VOD
B
GND1
VI
A
Input
Generator: PRR= 100 kHz, 50 % duty
cycle, t r < 6ns , t f < 6 ns , ZO = 50 W
Figure 3. Test Circuit and Waveform Definitions For The Driver Common-Mode Output Voltage
DE
VCC1
3V
A
D
Input
Generator
B
VI
VOD
CL = 50 pF
RL = 54 W
±20%
±1%
50 W
GND 1
C L includes fixture and
instrumentation capacitance
Generator: PRR = 100 kHz, 50 % duty cycle,
t r < 6ns , t f <6 ns , ZO = 50
50%
VI
50%
tPHL
tPLH
VOD
90%
50%
10%
VOD(H)
90%
tr
tf
50%
10%
VOD(L)
Figure 4. Driver Switching Test Circuit and Voltage Waveforms
A
3 V if testing A output
,
0 V if testing B output
3 V or 0 V
D
3V
S1
50 W
50%
VI
50%
0V
DE
Input
V
Generator I
VO
CL = 50 pF ±20%
CL includes fixture and
instrumentation
capacitance
RL = 110 W
±1%
tPZH
90%
VO
VOH
50%
tPHZ
~0 V
~
GND 1
Generator PRR = 50 kHz, 50% duty cycle,
tr <6ns, tf <6ns, ZO = 50 W
Figure 5. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
Copyright © 2008–2011, Texas Instruments Incorporated
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ISO3080, ISO3086
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SLOS581D – MAY 2008 – REVISED JANUARY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
3V
0 V if testing A output
,
3 V if testing B output
RL = 110 W
±1%
A
S1
D
3V
50%
VI
3 V or 0 V
0V
B
tPZL
DE
Input
Generator
CL = 50 pF ±20%
VI
50 W
50%
tPLZ
VO
5V
50%
CL includes fixture and
instrumentation
capacitance
GND 2
10%
VOL
Generator: PRR =50 kHz ,50% duty cycle,
t r< 6ns, t < 6ns, Z = 50
f
Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveform
IA
A
R
VA
VA+ VB
2
B
VIC
VB
IO
VID
VO
IB
Figure 7. Receiver Voltage and Current Definitions
3 V
A
Input
Generator
VI
50 W
1.5 V
RE
50%
0 V
CL = 15 pF
±20%
B
tPHL
tPLH
CL includes fixture and
instrumentation capacitance
Generator: PRR=100 kHz, 50% duty cycle,
t < 6ns, t < 6ns, ZO = 50 W
r
f
50%
VI
R VO
VO
90%
50%
10%
50%
tf
tr
V OH
V OL
Figure 8. Receiver Switching Test Circuit and Waveforms
R VO
B
0V
Input
Generator
VCC
A
1.5 V
3V
1 kW ±1%
S1
CL = 15 pF ±20 %
RE
VI
CL includes fixture
and instrumentation
capacitance
t pHZ
tPZH
VO
VI
50%
50%
90%
V OH
50%
50 W
!0 V
Generator:PRR=100 kHz, 50% duty cycle ,
t r<6ns, t f <6ns, Z O = 50 W
Figure 9. Receiver Enable Test Circuit and Waveforms, Data Output High
6
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Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088
ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
PARAMETER MEASUREMENT INFORMATION (continued)
0V
R VO
B
1.5 V
Input
Generator
VCC
A
VI
3V
1 kW ±1%
VI
S1
50%
50%
CL = 15 pF ±20%
RE
0V
CL includes fixture
and instrumentation
capacitance
tPZL
tPLZ
VCC
50%
V
O
50 W
10%
VOL
Generator: PRR =100 kHz, 50% dutycycle,
tr< 6 ns, t f < 6ns, ZO= 50 W
Figure 10. Receiver Enable Test Circuit and Waveforms, Data Output Low
0V
A
RE
R
B
Pulse Generator
15 ms duration
1% duty cycle
tr, tf £100 ns
100 W ±1%
+
_
D
DE
3V
Note:This test is conducted to test survivability only.
Data stability at the R output is not specified.
Figure 11. Transient Over-Voltage Test Circuit
C = 0.1 mF
±1%
2V
VCC1
VCC2
GND1
C = 0.1 mF ±1%
A
DE
D
54 W
S1
B
VOH or VOL
0.8 V
R
VOH or VOL
RE
1 kW
GND1
GND2
CL = 15 pF
(includes probe and
jig capacitance)
V TEST
Figure 12. Half-Duplex Common-Mode Transient Immunity Test Circuit
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SLOS581D – MAY 2008 – REVISED JANUARY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
C = 0.1 mF
±1%
2V
VCC1
VCC2
Y
C = 0.1 mF ±1%
DE
GND1
D
VOH or VOL
54 W
S1
Z
A
0.8 V
1.5 V or 0 V
54 W
VOH or VOL
RE
B
1 kW
0 V or 1.5 V
GND2
GND1
CL = 15 pF
(includes probe and
jig capacitance)
VTEST
Figure 13. Full-Duplex Common-Mode Transient Immunity Test Circuit
DEVICE INFORMATION
1
VID - Differential Input Voltage - pk
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
2
4
6
8
10 12 14
Signaling Rate - Mbps
16
18
20
Figure 14. ISO3086 Recommended Minimum Differential Input Voltage vs Signaling Rate
8
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ISO3080, ISO3086
ISO3082, ISO3088
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SLOS581D – MAY 2008 – REVISED JANUARY 2011
Table 1. Driver Function Table (1)
(1)
ENABLE
INPUT
(DE)
VCC1
VCC2
INPUT
(D)
PU
PU
H
H
PU
PU
L
H
L
H
PU
PU
X
L
hi-Z
hi-Z
PU
PU
X
OPEN
hi-Z
hi-Z
PU
PU
OPEN
H
H
L
PD
PU
X
X
hi-Z
hi-Z
PU
PD
X
X
hi-Z
hi-Z
PD
PD
X
X
hi-Z
hi-Z
OUTPUTS (1)
Y/A
Z/B
H
L
Driver output pins are Y & Z for full-duplex devices and A & B for half-duplex devices.
Table 2. Receiver Function Table (1)
(1)
VCC1
VCC2
DIFFERENTIAL INPUT
VID = (VA – VB)
ENABLE
(RE)
OUTPUT
(R)
PU
PU
–0.01 V ≤ VID
L
H
PU
PU
–0.2 V < VID < –0.01 V
L
?
PU
PU
VID ≤ –0.2 V
L
L
PU
PU
X
H
hi-Z
PU
PU
X
OPEN
hi-Z
PU
PU
Open circuit
L
H
PU
PU
Short Circuit
L
H
PU
PU
Idle (terminated) bus
L
H
PD
PU
X
X
hi-Z
PU
PD
X
L
H
PU = Powered Up; PD = Powered Down; H = Logic High; L= Logic Low; X = Irrelevant, hi-Z = High
Impedance (off), ? = Indeterminate
PACKAGE CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER (1)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
L(I01)
Minimum air gap (Clearance)
Shortest terminal to terminal distance through
air
L(I02)
Minimum external tracking (Creepage)
Shortest terminal to terminal distance across
the package surface
CTI
Tracking resistance (Comparative Tracking
Index)
DIN IEC 60112 / VDE 0303 Part 1
≥175
V
Minimum Internal Gap (Internal Clearance)
Distance through the insulation
0.008
mm
RIO
Isolation resistance
Input to output, VIO = 500 V, all pins on each
side of the barrier tied together creating a
two-terminal device
CIO
Barrier capacitance Input to output
CI
Input capacitance to ground
(1)
8.34
mm
8.1
mm
>1012
Ω
VI = 0.4 sin (4E6pt)
2
pF
VI = 0.4 sin (4E6pt)
2
pF
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation
Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
Copyright © 2008–2011, Texas Instruments Incorporated
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IEC 60664-1 RATINGS TABLE
PARAMETER
TEST CONDITIONS
Basic isolation group
Material group
IIIa
Rated mains voltage ≤ 150 VRMS
I-IV
Rated mains voltage ≤ 300 VRMS
I-III
Rated mains voltage ≤ 400 VRMS
I-II
Installation classification
IEC 60747-5-2 INSULATION CHARACTERISTICS
SPECIFICATION
(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
SPECIFICATION
UNIT
560
V
VIORM
Maximum working insulation
voltage
VPR
Input to output test voltage
Method b1, VPR = VIORM × 1.875,
100% Production test with t = 1 s, Partial discharge < 5 pC
1050
V
VIOTM
Transient overvoltage
t = 60 s
4000
V
9
Ω
RS
Insulation resistance
VIO = 500 V at TS
>10
Pollution degree
(1)
2
Climatic Classification 40/125/21
REGULATORY INFORMATION
VDE
CSA
UL
Certified according to IEC 60747-5-2
Approved under CSA Component
Acceptance Notice
Recognized under 1577 Component
Recognition Program (1)
File Number: 40016131
File Number: 220991
File Number: E181974
(1)
Production tested ≥3000 VRMS for 1 second in accordance with UL 1577.
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
PARAMETER
MIN
IS
Safety input, output, or supply
current
DW-16
TS
Maximum case temperature
DW-16
qJA = 168°C/W, VI = 5.5 V, TJ = 170°C,
TA = 25°C
TYP
MAX
UNIT
157
mA
150
°C
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Characteristics table is that of a device installed in the JESD51-3, Low Effective Thermal Conductivity
Test Board for Leaded Surface Mount Packages and is conservative. The power is the recommended maximum
input voltage times the current. The junction temperature is then the ambient temperature plus the power times
the junction-to-air thermal resistance.
10
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Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088
ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
THERMAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Low-K Thermal Resistance
qJA
Junction-to-Air
qJB
Junction-to-Board Thermal Resistance
qJC
Junction-to-Case Thermal Resistance
PD
(1)
MIN
(1)
168
High-K Thermal Resistance
UNIT
°C/W
96.1
VCC1 = VCC2 = 5.25 V, TJ = 150°C, CL = 15 pF,
Input a 20 MHz 50% duty cycle square wave
Device Power Dissipation
TYP MAX
61
°C/W
48
°C/W
220
mW
Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages.
180
VCC1 = VCC2 = 5.5 V
Safety Limiting Current - mA
160
140
120
100
80
60
40
20
0
0
50
100
150
TC - Case Temperature - °C
200
Figure 15. DW-16 qJC Thermal Derating Curve per IEC 60747-5-2
Copyright © 2008–2011, Texas Instruments Incorporated
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11
ISO3080, ISO3086
ISO3082, ISO3088
SLOS581D – MAY 2008 – REVISED JANUARY 2011
www.ti.com
EQUIVALENT CIRCUIT SCHEMATICS
D and RE Input
VCC1
VCC1
DE Input
VCC1
VCC1
VCC1
1 MW
Input
500 W
500 W
Input
1 MW
A Input
B Input
VCC
16 V
VCC
16 V
36 kW
180 kW
36 kW
180 kW
Input
Input
16 V
36 kW
16 V
36 kW
Y and Z Outputs
VCC
16 V
Output
16 V
5V R Output
3.3V R Output
VCC1
VCC1
12
4W
5.5 W
6.4 W
11 W
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Copyright © 2008–2011, Texas Instruments Incorporated
Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088
ISO3080, ISO3086
ISO3082, ISO3088
www.ti.com
SLOS581D – MAY 2008 – REVISED JANUARY 2011
REVISION HISTORY
Changes from Original (May 2008) to Revision A
Page
•
Changed the Package Characteristics table - L(101) Minimum air gap (Clearance) From 7.7mm To 8.34mm .................. 9
•
Deleted the CSA column from the Regulatory Information Table. ..................................................................................... 10
•
Changed the file number in the VDE column of the Regulatory Information table From: 40014131 To: 40016131 .......... 10
Changes from Revision A (June 2008) to Revision B
Page
•
Changed Features bullet From: 4000-VPEAK Isolation, To: 4000-VPEAK Isolation,, 560-VPEAK VIORM ..................................... 1
•
Added Features sub bullet: UL 1577, IEC 60747-5-2 (VDE 0884, Rev. 2), IEC 61010-1, IEC 60950-1 and CSA
Approved ............................................................................................................................................................................... 1
•
Added the CSA column to the Regulatory Information table .............................................................................................. 10
Changes from Revision B (December 2008) to Revision C
•
Page
Changed Recommended Operatings Condition table note From: For 3-V operation, VCC1 or VCC2 is specified from
3.15 V to 3.6V. To: For 3-V operation, VCC1 is specified from 3.15 V to 3.6V. ..................................................................... 2
Changes from Revision C (October 2009) to Revision D
Page
•
Added TSTG row to the abs max table ................................................................................................................................... 2
•
Added "Dynamic" conditions to Recommended Operating Conditions VID spec with reference to Figure 14 ...................... 2
•
Changed for 3 V to 3.3 V in note 1 of the recommended operating table ............................................................................ 2
•
Deleted VI = VCC! or 0 V from CMTI spec. Conditions statement. Added "Figure 13" .......................................................... 3
•
Changed top row, UNIT column, split into 2 rows, top row µs and second row ns .............................................................. 3
•
Added note to bottom of first page of the Parameter Measurement information ................................................................. 4
•
Added Figure 14 ................................................................................................................................................................... 8
•
Added Footnotes to Driver Function Table and Receiver Function Table ............................................................................ 9
•
Changed File Number from '1698195' to '220991 in Regulatory Information table ............................................................ 10
•
Changed qJAfrom 212°C/W to 168°C/W in conditions statement for IS spec.; and MAX current from 210 mA to 157
mA ....................................................................................................................................................................................... 10
•
Changed graph for "DW-16 qJC Thermal Derating Curve per IEC 60747-5-2", Figure 15 ................................................. 11
Copyright © 2008–2011, Texas Instruments Incorporated
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13
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jan-2011
PACKAGING INFORMATION
Orderable Device
(1)
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
ISO3080DW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3080DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3080DWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3080DWRG4
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3082DW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3082DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3082DWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3082DWRG4
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3086DW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3086DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3086DWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3086DWRG4
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3088DW
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3088DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Request Free Samples
ISO3088DWR
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
ISO3088DWRG4
ACTIVE
SOIC
DW
16
2000
Green (RoHS
& no Sb/Br)
Call TI
Level-2-260C-1 YEAR
Contact TI Distributor
or Sales Office
The marketing status values are defined as follows:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jan-2011
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jan-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
ISO3080DWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
ISO3082DWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
ISO3086DWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
ISO3088DWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jan-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ISO3080DWR
SOIC
DW
16
2000
358.0
335.0
35.0
ISO3082DWR
SOIC
DW
16
2000
358.0
335.0
35.0
ISO3086DWR
SOIC
DW
16
2000
358.0
335.0
35.0
ISO3088DWR
SOIC
DW
16
2000
358.0
335.0
35.0
Pack Materials-Page 2
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