NVMFS5C670NL Power MOSFET 60 V, 6.1 mW, 71 A, Single N−Channel Features • • • • • • Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS5C670NLWF − Wettable Flank Option for Enhanced Optical Inspection AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(ON) MAX 6.1 mW @ 10 V 60 V Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage VGS ±20 V ID 71 A Continuous Drain Current RqJC (Notes 1, 3) TC = 25°C Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State TC = 100°C TC = 25°C Pulsed Drain Current PD TC = 100°C TA = 25°C Power Dissipation RqJA (Notes 1 & 2) 50 Steady State TA = 100°C TA = 25°C TA = 25°C, tp = 10 ms Source Current (Body Diode) G (4) W 61 S (1,2,3) A 17 PD W 3.6 IDM 440 A TJ, Tstg −55 to + 175 °C IS 68 A EAS 166 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Case − Steady State RqJC 2.4 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 41 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2016 February, 2017 − Rev. 2 MARKING DIAGRAM 1.8 Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 3.6 A) Parameter N−CHANNEL MOSFET 12 TA = 100°C Operating Junction and Storage Temperature D (5,6) 31 ID 71 A 8.8 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter ID MAX 1 1 DFN5 (SO−8FL) CASE 488AA STYLE 1 D S S S G D XXXXXX AYWZZ D D XXXXXX = 5C670L XXXXXX = (NVMFS5C670NL) or XXXXXX = 670LWF XXXXXX = (NVMFS5C670NLWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability ORDERING INFORMATION See detailed ordering, marking and shipping information on page 5 of this data sheet. Publication Order Number: NVMFS5C670NL/D NVMFS5C670NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 60 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 27 VGS = 0 V, VDS = 60 V mV/°C TJ = 25 °C 10 TJ = 125°C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 53 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 1.2 2.0 −4.7 VGS = 10 V ID = 35 A 5.1 6.1 VGS = 4.5 V ID = 35 A 7.0 8.8 gFS VDS = 15 V, ID = 35 A V mV/°C 82 mW S CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 1400 VGS = 0 V, f = 1 MHz, VDS = 25 V 690 pF 15 Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 48 V; ID = 35 A 9.0 nC Total Gate Charge QG(TOT) VGS = 10 V, VDS = 48 V; ID = 35 A 20 nC Threshold Gate Charge QG(TH) 2.5 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Plateau Voltage VGP 3.1 td(ON) 11 VGS = 10 V, VDS = 48 V; ID = 35 A 4.5 nC 2.0 V SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 4.5 V, VDS = 48 V, ID = 35 A, RG = 2.5 W tf 60 ns 15 4 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 35 A TJ = 25°C 0.9 TJ = 125°C 0.8 tRR ta tb 1.2 V 34 VGS = 0 V, dIS/dt = 100 A/ms, IS = 35 A QRR 17 ns 17 19 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS5C670NL TYPICAL CHARACTERISTICS 3.8 V 100 80 3.4 V 60 40 3.0 V 20 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 60 TJ = 25°C 40 4.0 TJ = 125°C 0 0.5 1.0 1.5 2.0 TJ = −55°C 2.5 3.0 3.5 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 14 TJ = 25°C ID = 35 A 13 12 11 10 9 8 7 6 3.5 80 0 15 5 100 20 2.6 V 0 VDS = 5 V 120 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 120 140 4.5 V 6.5 V to 10 V ID, DRAIN CURRENT (A) 140 4.5 5.5 6.5 7.5 8.5 9.5 VGS, GATE VOLTAGE (V) 4.0 10 TJ = 25°C 9 8 VGS = 4.5 V 7 6 VGS = 10 V 5 4 5 15 25 35 45 55 65 75 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100000 1.8 VGS = 10 V ID = 35 A TJ = 175°C IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 2.0 1.6 1.4 1.2 1.0 10000 TJ = 125°C 1000 TJ = 85°C 100 0.8 0.6 −50 −25 0 25 50 75 100 125 150 175 10 10 20 30 40 50 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 60 NVMFS5C670NL TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 10000 CISS 1000 COSS 100 CRSS 10 1 VGS = 0 V TJ = 25°C f = 1 MHz 0 10 20 30 40 50 60 10 QT 9 8 7 6 5 4 QGD QGS 3 VDS = 48 V TJ = 25°C ID = 35 A 2 1 0 0 2 4 6 8 10 12 14 16 18 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 20 t, TIME (ns) 100 IS, SOURCE CURRENT (A) 1000 tr td(on) td(off) 10 VGS = 4.5 V VDS = 48 V ID = 35 A tf 1 ID, DRAIN CURRENT (A) 1000 100 10 TJ = −55°C 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 TC = 25°C VGS ≤ 10 V Single Pulse 10 10 ms 0.1 0.1 TJ = 25°C RG, GATE RESISTANCE (W) 500 ms 1 10 1 100 IPEAK, DRAIN CURRENT (A) 1 TJ = 125°C RDS(on) Limit Thermal Limit Package Limit 1 1 ms 10 TJ = 25°C TJ = 100°C 1 0.1 10 100 1E−5 1E−4 1E−3 1E−2 VDS (V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Drain Current vs. Time in Avalanche www.onsemi.com 4 NVMFS5C670NL TYPICAL CHARACTERISTICS 100 R(t) (°C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% 0.1 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Device Marking Package Shipping† NVMFS5C670NLT1G 5C670L DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C670NLWFT1G 670LWF DFN5 (Pb−Free, Wettable Flanks) 1500 / Tape & Reel NVMFS5C670NLT3G 5C670L DFN5 (Pb−Free) 5000 / Tape & Reel NVMFS5C670NLWFT3G 670LWF DFN5 (Pb−Free, Wettable Flanks) 5000 / Tape & Reel NVMFS5C670NLAFT1G 5C670L DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C670NLWFAFT1G 670LWF DFN5 (Pb−Free, Wettable Flanks) 1500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS5C670NL PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE M 2X 0.20 C D 2 A B D1 2X 0.20 C 3 q E 2 2 c A1 4 TOP VIEW C A RECOMMENDED SOLDERING FOOTPRINT* 0.10 C SIDE VIEW 8X b C A B 0.05 c SEATING PLANE DETAIL A 0.10 C 0.10 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q 4X E1 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X DETAIL A 0.495 4.560 2X 1.530 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN e/2 e L 1 3.200 4 4.530 K PIN 5 (EXPOSED PAD) MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.30 5.15 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ E2 L1 M 1.330 2X 0.905 1 0.965 G 4X D2 1.000 4X 0.750 BOTTOM VIEW 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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