TI1 DRV10964 Three-phase sinusoidal sensorless bldc motor driver Datasheet

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DRV10964
SLDS227 – MARCH 2016
DRV10964 5-V, Three-Phase Sinusoidal Sensorless BLDC Motor Driver
1 Features
3 Description
•
The DRV10964 is a three-phase sensorless motor
driver with integrated power MOSFETs. It is
specifically designed for high-efficiency, low-noise
and low-external component count motor drive
applications. The proprietary sensorless windowless
180° sinusoidal control scheme offers ultra-quiet
motor drive performance. The DRV10964 contains an
intelligent lock detect function, combined with other
internal protection circuits to ensure safe operation.
The DRV10964 is available in a thermally efficient 10pin USON package with an exposed thermal pad.
1
•
•
•
•
•
•
•
•
•
Proprietary Sensorless Windowless
180° Sinusoidal Control Scheme
Input Voltage Range 2.1 to 5.5 V
500-mA Output Current
Low Quiescent Current 15 µA (Typical) at Sleep
Mode
Total Driver H+L Rdson Less than 1.5 Ω
Current Limit and Short-Circuit Current Protection
Lock Detection
Anti Voltage Surge (AVS)
UVLO
Thermal Shutdown
Device Information
PART NUMBER
DRV10964
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
PACKAGE
USON (10)
(1)
Notebook CPU Fans
Game Station CPU Fans
ASIC Cooling Fans
Simplified Schematic
VCC
100k
VCC
1
FG
FG Status
2
VCC
FG
PWM
10
FGS
CONFIG
9
3
VCC
FR
8
4
W
U
7
5
GND
V
6
PWMIN
Direction
2.2 µF
M
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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SLDS227 – MARCH 2016
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
7.3 Feature Description................................................... 7
7.4 Device Functional Modes........................................ 14
8
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application .................................................. 17
9 Power Supply Recommendations...................... 20
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 20
11 Device and Documentation Support ................. 21
11.1
11.2
11.3
11.4
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
2
DATE
REVISION
NOTES
February 2016
*
Initial release.
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5 Pin Configuration and Functions
DSN Package
10-Pin USON
Top View
FG
1
10
PWM
FGS
2
9
CONFIG
VCC
3
8
FR
W
4
7
U
GND
5
6
V
Pin Functions
PIN
NO.
I/O
NAME
DESCRIPTION
1
FG
Output
Motor speed indicator output (open drain).
2
FGS
Input
Motor speed indicator selector. The state of this pin is latched on power up and can not be changed
dynamically.
3
VCC
Power
Input voltage for motor and chip supply.
4
W
IO
Motor Phase W
5
GND
Ground
Ground
6
V
IO
Motor Phase V
7
U
IO
Motor Phase U
8
FR
Input
Motor direction selector. This pin can be dynamically changed after power up.
9
CONFIG
Input
Resistor setting for configuring the handoff threshold. The state of this pin is latched on power up and can
not be changed dynamically.
10
PWM
Input
Motor speed control input.
—
Thermal Pad
—
Connect to Ground for maximum thermal efficiency. Thermal pad is on the bottom of the package.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VCC pin supply voltage
Motor phase pins (U, V, W)
MIN
MAX
UNIT
–0.3
6
V
–1
7.7
V
Direction, speed indicator input, and speed input (FR, FGS, PWM, CONFIG)
–0.3
6
V
Speed output (FG)
–0.3
7.7
V
TJ
Junction temperature
–40
150
°C
TSDR
Maximum lead soldering temperature, 10 seconds
260
°C
Tstg
Storage temperature
150
°C
(1)
(2)
–55
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101
UNIT
±2500
(2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
2.1
5.5
V
Motor phase pins
–0.7
7
V
FR, FGS, PWM, CONFIG
Direction, speed indicator input, and speed input
–0.1
5.5
V
FG
Speed output
–0.1
7.5
V
TJ
Junction temperature
–40
125
°C
VCC
VCC pin supply voltage
U, V, W
UNIT
6.4 Thermal Information
DRV10964
THERMAL METRIC
(1)
DSN (USON)
UNIT
10 PINS
Rθ JA
Junction-to-ambient thermal resistance
40.9
°C/W
Rθ JC(top)
Junction-to-case (top) thermal resistance
46.6
°C/W
Rθ JB
Junction-to-board thermal resistance
15.8
°C/W
ψJT
Junction-to-top characterization parameter
0.5
°C/W
ψJB
Junction-to-board characterization parameter
16
°C/W
Rθ JC(bot)
Junction-to-case (bottom) thermal resistance
2.9
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
(VCC = 5 V, TA = 25°C unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
IVCC
Operating current
PWM = VCC, no motor connected
6.5
IVCC_SLEEP
Sleep current
PWM = 0 V
15
20
mA
µA
2
2.1
V
UVLO
VUVLO_H
Undervoltage threshold high
VUVLO_L
Undervoltage threshold low
1.7
1.8
VUVLO_HYS
Undervoltage threshold hysteresis
100
200
300
mV
1
1.5
Ω
V
INTEGRATED MOSFET
RDSON
Series resistance (H+L)
VCC = 5 V; IOUT = 0.5 A
PWM
VIH_PWM
Input high threshold
VIL_PWM
Input low threshold
FPWM
PWM input frequency
RPU_PWM_VCC
PWM pin pullup resistor
0.45 × VCC
Duty cycle >0% and <100%
15
100
V
kHz
Active mode
40
kΩ
Standby mode
1.5
MΩ
1
ms
Sleep entry time
PWM = 0 V and the motor speed
less than 10 Hz
IOL_FG
FG sink current
VFG = 0.3 V
ISC_FG
FG short circuit current
VFG = 5 V
tSLEEP
V
0.15 × VCC
FG
5
mA
13
25
mA
FGS and FR
VIH_FGS
Input high threshold
VIL_FGS
Input low threshold
VIH_FR
Input high threshold
VIL_FR
Input low threshold
RPU_FGS_VCC
FGS pin pullup resistor
RPU_FR_VCC
FR pin pullup resistor
0.45 × VCC
V
0.15 × VCC
0.45 × VCC
V
V
0.15 × VCC
V
Active Mode
40
kΩ
Standby Mode
1.5
MΩ
425
kΩ
BEMF COMPARATOR
Voffset
Input offset
VHYS
Input hysteresis
Tdelay_r
Output delay rising
Tdelay_f
Output delay falling
Vcom
Common mode voltage
-10
10
mV
28
mV
25-mV step
1.5
μs
25-mV step
1.5
μs
VCC – 0.7
V
14
21
0.3
RATE LIMITING
tARamp
Ramp time for align (from 0 to
50% duty cycle)
300
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Electrical Characteristics (continued)
(VCC = 5 V, TA = 25°C unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Handoff speed threshold 87.5 Hz
0
3.1
5.4
% VCC
Handoff speed threshold 12.5 Hz
7.3
9.4
11.7
% VCC
Handoff speed threshold 25 Hz
13.5
15.6
17.9
% VCC
Handoff speed threshold 37.5 Hz
19.8
21.8
24.1
% VCC
Handoff speed threshold 50 Hz
26.0
28.1
30.4
% VCC
Handoff speed threshold 62.5 Hz
32.2
34.4
36.6
% VCC
Handoff speed threshold 75 Hz
38.5
40.6
42.9
% VCC
Handoff speed threshold 87.5 Hz
44.7
46.8
48.9
% VCC
Handoff speed threshold 100 Hz
50.7
53.1
55.1
% VCC
Handoff speed threshold 112.5 Hz
57.0
59.3
61.3
% VCC
Handoff speed threshold 125 Hz
63.2
65.6
67.6
% VCC
Handoff speed threshold 137.5 Hz
69.5
71.9
73.8
% VCC
Handoff speed threshold 150 Hz
75.6
78.1
80.1
% VCC
Handoff speed threshold 162.5 Hz
81.9
84.4
86.3
% VCC
Handoff speed threshold 175 Hz
88.2
90.6
92.6
% VCC
Handoff speed threshold 187.5 Hz
94.5
96.9
100
% VCC
CONFIG
CONFIGtrip
ri
CONFIG pin trip points
CONFIG pin input impedance
10
MΩ
LOCK PROTECTION
tON_LOCK
Lock detect time
tOFF_LOCK
Lock release time
Abnormal Kt lock
0.3
0.33
s
5
5.9
s
SHORT CIRCUIT CURRENT PROTECTION
ISHT
Short circuit current protection
1.8
A
160
°C
10
°C
THERMAL SHUTDOWN
TSD
Thermal shutdown temperature
TSD_HYS
Thermal shutdown hysteresis
6.6 Typical Characteristics
1.8
1.6
Rdson
1.4
1.2
1.0
0.8
0.6
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Power Supply at 25ƒC
C001
Figure 1. RDS(ON) vs Power Supply at 25°C
6
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7 Detailed Description
7.1 Overview
The DRV10964 device is a three phase sensorless motor driver with integrated power MOSFETs. It is
specifically designed for high efficiency, low noise and low external component count motor drive applications.
The proprietary sensorless windowless 180° sinusoidal control scheme provides ultra-quiet motor operation by
keeping electrically induced torque ripple small.
Upon start-up, the DRV10964 device will spin the motor in the direction indicated by the FR input pin. The
DRV10964 device will operate a three phase BLDC motor using a sinusoidal control scheme. The magnitude of
the applied sinusoidal phase voltages is determined by the duty cycle of the PWM pin. As the motor spins, the
DRV10964 device provides the speed information at the FG pin.
The DRV10964 device contains an intelligent lock detect function. In the case where the motor is stalled by an
external force, the system will detect the lock condition and will take steps to protect itself as well as the motor.
The operation of the lock detect circuit is described in detail in Lock Detection .
The DRV10964 device also contains several internal protection circuits such as overcurrent protection,
overvoltage protection, undervoltage protection, and overtemperature protection.
7.2 Functional Block Diagram
FG
U
CONFIG
Decode
ADC
V/I Sensor
V
W
GND
VCC
DRV10964
VCC
PWM and
WakeUp
PWM
FR
FGS
Logic
Core
Lock
U
Over Current
V
Thermal
W
UVLO
DRV10964
GND
7.3 Feature Description
7.3.1 Sleep Mode
When the PWM commanded duty cycle input is lower than 0.38%, but not 0%, the phase outputs will be put into
a high impedance state. The device will stop driving the motor. The device logic is still active during standby
mode and the DRV10964 device will consume current as specified by IVCC.
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Feature Description (continued)
When the PWM commanded duty cycle input is driven to 0% (less than VIL_PWM for at least tSLEEP time), the
DRV10964 device will enter a low power sleep mode. In sleep mode, most of the circuitry in the device will be
disabled to minimize the system current. The current consumption in this state is specified by IVCC_SLEEP.
The device will remain in sleep mode until either the PWM commanded duty cycle input is driven to a logic high
(higher than VIH_PWM) or the PWM input pin is allowed to float. If the input is allowed to float an internal pullup
resistor will raise the voltage to a logic high level.
Recovering from sleep mode is treated the same as power on condition as illustrated in Figure 14.
As part of the device initialization the motor resistance value and the motor Kt value are measured during the
initial motor spin up as shown in Figure 14.
7.3.2 Speed Input and Control
The DRV10964 provides three-phase 25-kHz PWM outputs which have an average value of sinusoidal
waveforms from phase to phase. When any phase is measured with reference to ground, the waveform observed
will be a PWM encoded sinusoid coupled with third order harmonics as shown in Figure 2. This encoding
scheme simplifies the driver requirements because there will always be one phase output that is equal to zero.
U-V
U
V-W
V
W-U
W
Sinusoidal Voltage from Phase to Phase
Sinusoidal Voltage from Phase to GND
With Third Order Harmonics
PWM Output
Average Value
PWM Encoded Phase Output and the Average Value
Figure 2. Sinusoidal Phase Encoding Used in DRV10964
The output amplitude is determined by the supply voltage (VCC) and the commanded PWM duty cycle (PWM) as
described in Equation 1 and illustrated in Figure 3. The maximum amplitude is applied when the commanded
PWM duty cycle is 100%.
Vphpk = PWMdc × VCC
(1)
100% output
Vphpk
VCC
VCC*PWMdc
Figure 3. Output Voltage Amplitude Adjustment
The motor speed is controlled indirectly by using the PWM command to control the amplitude of the phase
voltages which are applied to the motor.
8
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Feature Description (continued)
The duty cycle of PWM input is converted into a 9-bit digital number (from 0 to 511). The control resolution is
1/512 ≈ 0.2%. The duty cycle analyzer implements a first order transfer function between the input duty cycle and
the 9-bit digital number. This is illustrated in Figure 4 and Figure 5.
9-bit Digital
Number
PWM In
Amplitude of Output
Sin-wave
Duty Cycle Analyzer
PWM Output
AVS
Figure 4. PWM Command Input Controls the Output Peak Amplitude
50%
VCC/2
255
255
No AVS or Software
Current Limit Occurs
(511 is the Maximum)
50%
Output at Peak
Figure 5. Example of PWM Command Input Controlling the Output
The transfer function between the PWM commanded duty cycle and the output peak amplitude is adjustable in
the DRV10964 device. The output peak amplitude is described by Equation 1 when PWMdc > minimum operation
duty cycle. The minimum operation duty cycle is 10%. When the PWM commanded duty cycle is lower than
minimum operation duty cycle and higher than 0.38%, the output will be controlled at the minimum operation duty
cycle. When the input duty cycle is lower than 0.38%, the DRV10964 device will not drive the output, and enters
the standby mode. This is illustrated in Figure 6.
Output Duty
10%
0
10%
Input Duty
Minimum Duty Cycle = 10%
Figure 6. Speed Control Transfer Function
7.3.3 Motor Direction Change
The DRV10964 can be easily configured to drive the motor in either direction by setting the input on the FR
(Forward Reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the
commutation sequence is illustrated in Table 1.
Table 1. Motor Direction Phase Sequencing
Motor direction
FR = 0
FR = 1
U->V->W
U->W->V
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7.3.4 Motor Frequency Feedback (FG)
During operation of the DRV10964 device, the FG pin provides an indication of the speed of the motor. The
output provided on this pin is configured by applying a logic signal to the FGS pin.
The formula to determine the speed of the motor is:
IF FGS = 0, RPM = (FREQFG × 60)/number of pole pairs
IF FGS = 1, RPM = (FREQFG × 60 × 3)/number of pole pairs
(2)
(3)
During Open Loop Acceleration the FG pin will provide an indication of the frequency of the signal which is
driving the motor. The lock condition of the motor is not known during Open Loop Acceleration so it is possible
that the FG could be toggling during this time even though the motor is not moving.
The FG pin has built in short circuit protection, which limits the current in the event that the pin is shorted to VCC.
The current will be limited to ISC_FG.
7.3.4.1 Tach Feedback During Spin Down
The DRV10964 will provide feedback on the FG pin during spin down of the motor. Figure 7 illustrates the
behavior of the FG output. When DRV10964 PWM input is at 0% DRV10964 will provide the output of the U
phase comparator on the FG pin until the motor speed drops below 10 Hz. When the motor speed is below 10
Hz the device will enter into the Sleep state and the FG output will be held at a constant value based on the last
BEMF zero cross detection.
Closed Loop
Operation
FG = defined by FGS
Command PWM = 0%
Wait for Motor to Stop
FG = U to CT BEMF comparator
Speed < 10 Hz
Sleep
FG = 0 or 1 (will not toggle)
Figure 7. TACH Feedback on Spin Down
7.3.5 Lock Detection
When the motor is locked by some external condition the DRV10964 will detect the lock condition and will take
action to protect the motor and the device. The lock condition must be properly detected whether it occurs as a
result of a slowly increasing load or a sudden shock.
The DRV10964 reacts to lock conditions by stopping the motor drive. To stop driving the motor the phase
outputs are placed into a high impedance state. To prevent the current which is flowing in the motor from being
returned to the power supply (VCC) the DRV10964 uses an Ant-Voltage Surge feature. For more information on
this feature, see Anti-Voltage Surge (AVS). After successfully transitioning into a high impedance state as the
result of a lock condition the DRV10964 will attempt to restart the motor after tOFF_LOCK seconds.
The DRV10964 has a comprehensive lock detect function which includes 5 different lock detect schemes. Each
of these schemes detects a particular condition of lock as illustrated in Figure 8.
10
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No motor
Frequency Overflow
BEMF abnormal
Tri-state
and Restart
Logic
Accelerate abnormal
Speed abnormal
Figure 8. Lock Detect
The behavior of each lock detect scheme is described in the following sections.
7.3.5.1 Lock0: No Motor
The Phase U current is checked after transitioning from open loop to closed loop. If Phase U current is not
greater than 50mA then the motor is not connected. This is reported as a locked condition.
7.3.5.2 Lock1: Frequency Overflow
For most applications the maximum electrical frequency of the motor will be less than 3 kHz. If the motor is
stopped then the BEMF voltage will be zero. Under this condition, when the DRV10964 device is in the closed
loop mode, the sensor less control algorithm will continue to accelerate the electrical commutation rate even
though the motor is not spinning. A lock condition is triggered if the electrical frequency exceeds 3 kHz.
7.3.5.3 Lock2: BEMF Abnormal
For any specific motor, the integrated value of BEMF during half of an electrical cycle will be a constant as
illustrated by the shaded green area in Figure 9. This is true regardless of whether the motor runs fast or slow.
The DRV10964 monitors this value and uses it as a criterion to determine if the motor is in a lock condition.
The DRV10964 uses the integrated BEMF to determine the Kt value of the motor during the initial motor start.
Based on this measurement a range of acceptable Kt values is established. This range is between 1/2 x Kt and 4
x Kt During closed loop motor operation the Ktc value is continuously updated. If the calculated Ktc goes beyond
the acceptable range a lock condition is triggered. This is illustrated in Figure 10.
Figure 9. BEMF Integration
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4 x Kt
Ktc
Kt
0.5 x Kt
Lock detect
Figure 10. Abnormal Kt Lock Detect
7.3.5.3.1 Lock 3: Accelerate Abnormal
This lock condition is active when the DRV10964 device is operating in the closed loop mode. When the closed
loop commutation rate becomes lower than 1/2 of the previous commutation period then this is an indication that
the motor is not moving. Under this condition the accelerate abnormal condition will be triggered.
7.3.5.4 Lock4: Speed Abnormal
If the motor is in normal operation the motor BEMF will always be less than the voltage applied to the phase. The
DRV10964 sensorless control algorithm is continuously updating the value of the motor BEMF based on the
speed of the motor and the motor Kt as shown in Figure 11. If the calculated value for motor BEMF is higher than
the applied voltage (U) for a certain period of time (tON_LOCK) then there is an error in the system. The calculated
value for motor BEMF is wrong or the motor is out of phase with the commutation logic. When this condition is
detected a lock detect is triggered.
Rm
M
U
BEMF = kt * speed
If speed > U / kt
Lock is triggered.
Figure 11. BEMF Monitoring
7.3.6 Short Circuit Current Protection
The short circuit current protection function shuts off drive to the motor by placing the motor phases into a high
impedance state if the current in any motor phase exceeds the short circuit protection limit ISHT. The DRV10964
device will go through the initialization sequence and will attempt to restart the motor after the short circuit
condition is removed. This function is intended to protect the device and the motor from catastrophic failure when
subjected to a short circuit condition.
7.3.7 Anti-Voltage Surge (AVS)
Under normal operation the DRV10964 acts to transfer energy from the power supply to the motor to generate
torque, which results in angular rotation of the motor. Under certain conditions, however, energy which is stored
in the motor in the form of inductive energy or angular momentum (mechanical energy) can be returned to the
power supply. This can happen whenever the output voltage is quickly interrupted or whenever the voltage
applied to the motor becomes less than the BEMF voltage generated by the motor. The energy which is returned
to the supply can cause the supply voltage to increase. This condition is referred to as voltage surge.
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The DRV10964 includes an anti-voltage-surge (AVS) feature which prevents energy from being transferred from
the motor to the power supply. This feature helps to protect the DRV10964 as well as any other components that
are connected to the power supply (VCC).
7.3.7.1 Protecting Against the Return of Mechanical Energy
Mechanical energy is typically returned to the power supply when the speed command is abruptly decreased. If
the voltage applied to the phase becomes less than the BEMF voltage then the motor will work as a generator
and current will flow from the motor back to VCC. This is illustrated in Figure 12. To prevent this from happening,
the DRV10964 buffers the speed command value and limits the rate at which it is able to change. The AVS
function acts to ensure that the effective output amplitude (U) is maintained to be larger than the BEMF voltage.
This prevents current from becoming less than zero. The value of BEMF used to perform this function is
calculated by the motor Kt and the motor speed.
Rm
I
M
U = BEMF + I * Rm
If U < BEMF, I<0.
BEMF = kt * speed
AVS: UMIN = BEMF
If U > BEMF, I>0.
Figure 12. Mechanical AVS
7.3.7.2 Protecting Against the Return of Inductive Energy
When the DRV10964 suddenly stops driving the motor, the current which is flowing in the motor’s inductance will
continue to flow. It flows through the intrinsic body diodes in the mosfets and charges VCC. An example of this
behavior is illustrated by the two pictures in the top half of Figure 13. When the driver is active, the current flows
from S1 to the motor and then to S6 and is returned to ground. When the driver is placed into a high impedance
(tri-state) mode, the current goes flows from ground through the body diode of S2 to the motor and then through
the body diode of S5 to VCC. The current will continue to flow through the motor’s inductance in this direction
until the inductive energy is dissipated.
Figure 13. Inductive AVS
The lower two pictures in Figure 13 illustrate how the AVS circuit in the DRV10964 device prevents this energy
from being returned to the supply. When the AVS condition is detected the DRV10964 device will act to turn on
the low side device designated as S6. This allows the current flowing in the motor inductance to be returned to
ground instead of being directed to the VCC supply voltage.
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7.3.8 Overtemperature Protection
The DRV10964 contains a thermal shut down function which disables motor operation when the device junction
temperature has exceeded TSD. Motor operation will resume when the junction temperature becomes lower than
TSD - TSD_HYS.
7.3.9 Undervoltage Protection
The DRV10964 contains an undervoltage lockout feature, which prevents motor operation whenever the supply
voltage (VCC) becomes too low. Upon power up, the DRV10964 will operate once VCC rises above VUVLO_H.
The DRV10964 will continue to operate until VCC falls below VUVLO_L.
7.3.10 CONFIG Configuration
The CONFIG pin provides an option for selecting the open loop to closed loop threshold. This is accomplished
with the selection of a resistor divider between VCC and GND which is connected to the CONFIG pin. See
Electrical Characteristics.
7.4 Device Functional Modes
7.4.1 Spin up Settings
7.4.1.1 Motor Kt and Rm
DRV10964 utilizes information about the motor's torque constant and resistance to control motor timing. These
parameters are measured during the initial motor spin up as shown in Figure 14.
7.4.1.2 Motor Start
DRV10964 will start the motor using a procedure which is illustrated in Figure 14.
Power On
Calibration
Align
40 ms
Resistance
Measurement
Open Loop
Accelerate
Wait TOFF_LOCK
Coasting
Close Loop
Kt
Measurement
Closed Loop
Lock Detected
Figure 14. DRV10964 Initialization and Motor Start-up Sequence
7.4.1.3 Initial Speed Detect (ISD)
The ISD function is used to identify the initial condition of the motor.
Phase-to-phase comparators are used to detect the zero crossings of the motor’s BEMF voltage while it is
coasting (motor phase outputs are in high-impedance state). Figure 15 shows the configuration of the
comparators.
14
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Device Functional Modes (continued)
60 degrees
±
V
+
U
+
±
W
Figure 15. Initial Speed Detect Function
The motor speed is determined by measuring the time between two rising edges of either of the comparators.
If neither of the comparator outputs toggle for a given amount of time (80 ms), the condition is defined as
stationary and the Align state will begin. If the comparators are toggling at a speed that is greater than this
threshold then the DRV10964 will wait for the motor to slow down until the toggling is less than the threshold and
it can be treated as stationary.
7.4.1.4 Align
To align the rotor to the commutation logic the DRV10964 applies a 50% duty cycle on phases V and W while
holding phase U at GND. This condition is maintained for 0.64 seconds. In order to avoid a sudden change in
current that could result in undesirable acoustics the 50% duty cycle is applied gradually to the motor over 0.3
seconds.
7.4.1.5 Handoff and Closed Loop
When the motor accelerates to the velocity defined by the voltage applied to the CONFIG pin, commutation
control transitions from open loop mode to closed loop mode. The commutation drive sequence and timing is
determined by the internal control algorithm and the applied voltage is determined by the PWM commanded duty
cycle input.
The selection of handoff threshold can be determined by experimental testing. The goal is to choose a handoff
threshold that is as low as possible and allows the motor to smoothly and reliably transition between the open
loop acceleration and the closed loop acceleration. Normally higher speed motors (maximum speed) require a
higher handoff threshold because higher speed motors have lower Kt and as a result lower BEMF. Table 2
shows the configurable settings for the handoff threshold. Maximum speed in electrical hertz are shown as a
guide to assist in identifying the appropriate handoff speed for a particular application.
Table 2. Motor Handoff Speed Threshold Options
MAXIMUM SPEED (Hz)
Hand Off Frequency (Hz)
CONFIG[3:0]
350 to approximately 400
87.5
0x0
<100
12.5
0x1
100 to approximately 150
25
0x2
150 to approximately 200
37.5
0x3
200 to approximately 250
50
0x4
250 to approximately 300
62.5
0x5
300 to approximately 350
75
0x6
350 to approximately 400
87.5
0x7
400 to approximately 450
100
0x8
450 to approximately 500
112.5
0x9
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Device Functional Modes (continued)
Table 2. Motor Handoff Speed Threshold Options (continued)
16
MAXIMUM SPEED (Hz)
Hand Off Frequency (Hz)
CONFIG[3:0]
500 to approximately 560
125
0xA
560 to approximately 620
137.5
0xB
620 to approximately 700
150
0xC
700 to approximately 800
162.5
0xD
800 to approximately 900
175
0xE
>900
187.5
0xF
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
DRV10964 is used in sensorless three-phase BLDC motor control. The driver provides a high performance, high
reliability, flexible and simple solution for compute fan applications. The following design shows a common
application of the DRV10964.
8.2 Typical Application
VCC
100k
VCC
1
FG
FG Status
2
VCC
FG
PWM
10
FGS
CONFIG
9
3
VCC
FR
8
4
W
U
7
5
GND
V
6
PWMIN
Direction
2.2 µF
M
Figure 16. Typical Application Schematic
8.2.1 Design Requirements
Table 3 lists several key motor characteristics and recommended ranges which the DRV10964 is capable of
driving. However, that does not necessarily mean motors outside these boundaries cannot be driven by
DRV10964.
Recommended ranges listed in Table 3 can serve as a general guideline to quickly decide whether DRV10964 is
a good fit for an application. Motor performance is not ensured for all uses.
Table 3. Key Motor Characteristics and Recommended Ranges
Recommended Value
Rm (Ω)
Lm (µH)
Kt (mV/Hz)
fFG_max (Hz)
2.5 ~ 10
50 ~ 1000
1 ~ 100
1300
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Rm - Motor phase resistance between phase to phase;
Lm - Motor phase to phase inductance between phase to phase;
Kt - Motor BEMF constant from phase to center tape;
fFG_max - Maximum electrical frequency. Maximum motor speed can be calculated from:
• If FGS = 1, RPM = (fFG_max × 3 x 60)/ number of pole pairs
• If FGS = 0, RPM = (fFG_max × 120)/ number of pole pairs
8.2.2 Detailed Design Procedure
1. Refer to Design Requirements and make sure your system meets the recommended application range.
2. Refer to the DRV10964 Tuning Guide and measure the motor parameters.
3. Refer to the DRV10964 Tuning Guide. Configure the parameters using DRV10964 GUI, and optimize the
motor operation. The Tuning Guide takes the user through all the configurations step by step, including: start-up
operation, closed-loop operation, current control, initial positioning, lock detection, and anti-voltage surge.
4. Build your hardware based on Layout Guidelines.
5. Connect the device into system and validate your system solution
8.2.3 Application Curves
NOTE: FG_OUT Signal Being Held HIGH During Locked Rotor
Condition (Stall)
Figure 17. Reference PCB Sinusoidal Current Profile
18
Figure 18. Reference PCB Start-Up (Align-Acceleration)
Profile
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Figure 19. Reference PCB Open Loop and Close Loop
Figure 20. Reference PCB Closed Loop
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9 Power Supply Recommendations
The DRV10964 is designed to operate from an input voltage supply, V(VCC), range from 2.1 and 5.5 V. The user
must place a 2.2-μF ceramic capacitor rated for VCC as close as possible to the VCC and GND pin.
10 Layout
10.1 Layout Guidelines
The package uses an exposed pad to remove heat from the device. For proper operation, this pad must be
thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can
be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without
internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on
the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom
layers.
For details about how to design the PCB, refer to TI application report, PowerPAD™ Thermally Enhanced
Package (SLMA002), and TI application brief, PowerPAD™ Made Easy (SLMA004), available at www.ti.com. In
general, the more copper area that can be provided, the more power can be dissipated.
10.2 Layout Example
2.2 uF
GND
VCC
100k
10 PWM
FG 1
100k
9 CONFIG
FGS 2
VCC 3
GND
(PPAD)
8 FR
W 4
7 U
GND 5
6 V
Figure 21. DRV10964 Layout Example
20
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DRV10964FFDSNR
ACTIVE
SON
DSN
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
964FF1
DRV10964FFDSNT
ACTIVE
SON
DSN
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
964FF1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
9-Mar-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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