Renesas M61311SP L2c bus controlled video pre-amp for high resolution color display Datasheet

M61311SP/M61316SP
l2C BUS Controlled Video Pre-amp for High Resolution Color
Display
REJ03F0199-0201
Rev.2.01
Mar 31, 2008
Description
M61311SP/M61316SP is semiconductor integrated circuit for CRT display monitor.
It includes OSD blanking, OSD mixing, retrace blanking, video detector, sync separator, wide band amplifier,
brightness control.
Main/sub contrast, video response adjust, ret BLK adjust, 4ch D/A OUT and OSD level adjust function can be
controlled by I2C BUS.
Features
• Frequency band width: RGB
OSD
RGB
OSD
OSD BLK
Retrace BLK
Clamp pulse
Output: RGB
OSD
Sync OUT
Video det OUT
• Input:
200 MHz (M61311SP)
150 MHz (M61316SP)
(4 VP-P at −3 dB)
80 MHz
0.7 VP-P (typ.)
3.5 V to 5.0 V (positive)
3.5 V to 5.0 V (positive)
2.5 V to 5.0 V (positive)
2.5 V to 5.0 V (positive)
5 VP-P (at Brightness less than 2 VDC)
4 VP-P (at Brightness less than 2 VDC)
5 VP-P
High = 4.2 VDC, Low = 0.7 VDC
Application
CRT display monitor
Recommended Operating Conditions
Supply voltage range:
11.50 V to 12.50 V (V3, V29)
4.75 V to 5.25 V (V11)
Rated supply voltage:
12.00 V (V3, V29)
5.00 V (V11)
Major Specification
I2C BUS controlled 3ch video pre-amp with OSD mixing function and retrace blanking function.
The difference in the M61311SP/M61316SP is RGB video frequency band width.
M61311SP is 200 MHz, M61316SP is 150 MHz in conditions RGB output is 4 VP-P at −3 dB.
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 1 of 26
M61311SP/M61316SP
Block Diagram
BRIGHT
Retrace
BLK IN
32
17
OSD R
R IN
VCC 12 V
2
Clamp
Sub
contrast
CP
R Sub Cont 8 bit
Main
contrast
3
Retrace
blanking
Amp
OSD Mix
CP
Clamp
F/B
30 R OUT
29 VCC 12 V
OSD G
G IN
CP
Main
contrast
Sub
contrast
Clamp
4
Retrace
blanking
Amp
OSD Mix
28 G OUT
G Sub Cont 8 bit
6
CP
Clamp
F/B
27
OSD B
B IN
7
Main
contrast
Clamp
Sub
contrast
CP
B Sub Cont 8 bit
OSD Mix
CP
Video Det
Main
contrast
8 bit
Video Det OUT 10
SonG IN
5
8
Sync Sepa
Clamp
F/B
OSD
level 7 bit
1 bit SW
Retrace
blanking
Amp
26 B OUT
Ret BLK
adjust
4 bit
11 VCC 5 V
R Sub Cont 8 bit
G Sub Cont 8 bit
B Sub Cont 8 bit
1 bit SW
CP
DAC
Bus
I/F
19 SDA
20 SCL
25
18
9
31
Clamp
Pulse
IN
Sync
Sepa
OUT
ABL IN
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 2 of 26
13
14
15
12
OSD OSD OSD OSD
R
G
B BLK
IN
IN
IN
IN
16
21 22 23 24
D/A OUT
1
M61311SP/M61316SP
Pin Arrangement
M61311SP/M61316SP
GND
1
32 BRIGHT
R IN
2
31 ABL IN
VCC1 (12 V)
3
30 R OUT
G IN
4
29 VCC2 (12 V)
SonG IN
5
28 G OUT
GND1 (12 V)
6
27 GND4
B IN
7
26 B OUT
GND2
8
25 NC (GND)
Sync Sepa OUT
9
24 D/A OUT4
Video Det OUT
10
23 D/A OUT3
VCC3 (5 V)
11
22 D/A OUT2
OSD BLK IN
12
21 D/A OUT1
OSD R IN
13
20 SCL
OSD G IN
14
19 SDA
OSD B IN
15
18 Clamp Pulse IN
GND3
16
17 Retrace BLK IN
(Top view)
NC: No connection
Outline: PRDP0032BA-A (32P4B)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 3 of 26
M61311SP/M61316SP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Supply voltage (pin 3, 29)
Supply voltage (pin 11)
Power dissipation
Ambient temperature
Storage temperature
Recommended supply 12
Recommended supply 5
Voltage range 12
Voltage range 5
Symbol
VCC12
VCC5
Pd
Topr
Tstg
Vopr12
Vopr5
Vopr'12
Vopr'5
Ratings
13.0
6.0
2358
−20 to +75
−40 to +150
12.0
5.0
11.5 to 12.5
4.75 to 5.25
Thermal Derating (Maximum Rating)
Power Dissipation Pd (mW)
2800
2400
2358
2000
1600
1415
1200
800
400
0
−25
0
25
50
75
100
125
Ambient Temperature Ta (°C)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 4 of 26
150
Unit
V
V
mW
°C
°C
V
V
V
V
M61311SP/M61316SP
BUS Control Table
(1) Slave address:
D7
1
D6
0
D5
0
D4
0
D3
1
D2
0
D1
0
R/W
0
= 88H
(2) Slave receiver format:
Normal mode
S
8 bit
Slave address
8 bit
Sub address
A
8 bit
A
Data byte
A
A
8 bit
Data byte (Sub address = 0XH)
A
P
Auto increment mode
S
8 bit
Slave address
8 bit
Data
(Sub address = 0 (X + 1) H)
Note:
8 bit
Sub address (0XH) + 10H
8 bit
A
A
Data
(Sub address = 0 (X + 2) H)
A
S: Start condition, A: Acknowledge, P: Stop condition
(3) Sub address byte and data byte format:
Bit
Sub
Add.
Main contrast
8
00H
Sub contrast R
8
01H
Sub contrast G
8
02H
Sub contrast B
8
03H
OSD level
7
04H
RE-BLK adjust
4
05H
Sharpness control
4
06H
Sync Sepa SW
1
Video Det SW
1
Function
Test mode
2
D/A OUT1
8
07H
D/A OUT2
8
08H
D/A OUT3
8
09H
D/A OUT4
8
0AH
Note:
Data Byte (Top: Byte Format, Under: Start Condition)
D7
A07
0
A17
0
A27
0
A37
0





D6
A06
0
A16
0
A26
0
A36
0
A46
0



D5
A05
0
A15
0
A25
0
A35
0
A45
0



D4
A04
0
A14
0
A24
0
A34
0
A44
0



D3
A03
0
A13
0
A23
0
A33
0
A43
0
A53
0
A63
D2
A02
0
A12
0
A22
0
A32
0
A42
0
A52
0
A62
D1
A01
0
A11
0
A21
0
A31
0
A41
0
A51
0
A61
D0
A00
1*
A10
1*
A20
1*
A30
1*
A40
1*
A50
1*
A60











A65

A64
0

0



0



0



1*

*


A67
0
A77
0

A66
0
A76
0
0


A75
0



A74
0



A73
0



A72
0



A71
0
*

*
A70
1*
A87
0
A97
0
AA7
0
A86
0
A96
0
AA6
0
A85
0
A95
0
AA5
0
A84
0
A94
0
AA4
0
A83
0
A93
0
AA3
0
A82
0
A92
0
AA2
0
A81
0
A91
0
AA1
0
A80
1
A90
1
AA0
1
pre-data
Sub add. 06H
Sync Sepa SW A64
0: Sync Sepa ON
Video Det SW A65
0: Video Det ON
Always set up as A66 and A67 in 0
2
For I C Data, please transfer in the period of vertical.
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 5 of 26
1: Sync Sepa OFF
1: Video Det OFF
M61311SP/M61316SP
I2C BUS Control Section SDA, SCL Characteristics
Item
Min. input LOW voltage
Max. input HIGH voltage
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time start condition. After this period the first clock pulse is generated
The LOW period of the clock
The HIGH period of the clock
Set up time for start condition (Only relevant for a repeated start condition)
Hold time DATA
Set-up time DATA
Rise time of both SDA and SCL lines
Fall time of both SDA and SCL lines
Set-up time for stop condition
Symbol
VIL
VIH
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tr
tf
tSU:STO
Min.
−0.5
3.0
0
1.3
0.6
1.3
0.6
0.6
0
100
20+0.1Cb
20+0.1Cb
0.6
Max.
1.5
5.5
400





0.9

300
300

Unit
V
V
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Timing Chart
tr tf
tBUF
VIH
SDA
VIL
tHD: STA
tSU: DAT
tHD: DAT
tSU: STA
tSU: STO
VIH
SCL
VIL
tLOW
tHIGH
S
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 6 of 26
S
P
S
M61311SP/M61316SP
Electrical Characteristics
(VCC = 12 V, 5 V; Ta = 25°C, unless otherwise noted)
Limits
Item
Test
Symbol Min. Typ. Max. Unit Point

5 V Circuit current1
power save mode
ICC1
12 V Circuit current2
normal mode
ICC2
5 V Circuit current3
normal mode
ICC3
Output dynamic range
Vomax 7.5
6
10 mA
 105 130 mA

4
9
CTL
Vol
Input
8
mA
IB
IA
IB
2
R
IN
5
14 15 17 18 31 32 00H 01H 02H 03H 04H 05H 06H
12 13
7
4
07H 08H 09H 0AH
G SonG B OSD OSD OSD OSD RET CP ABL BRT Main Sub Sub Sub OSD Re- Sharp SonG VDET D/A D/A D/A D/A
R
G
B
Adj BLK ness SW SW OUT OUT OUT OUT
B BLK IN (V) (V) cont
G
IN BLK R
IN IN
cont cont cont
Adj
IN IN
IN
1
2
3
4
a
a
a
b
b
 VDC 26, 28, b
a
a
b
a
a
b
a
a
a
a
a
a
a
b
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
b
b
b
b
30
Maximum input
Vimax 1.4

 VP-P 26, 28, b
b
b
a
b
a
a
a
a
a
b
5
2
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
5 0.5 FF FF FF FF 00
255 255 255 255 0
00
0
5
46 FF FF FF 00
70 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
80 FF FF FF 00
128 255 255 255 0
00
0
80 FF FF FF 00
128 255 255 255 0
00
0
10 FF FF FF 00
16 255 255 255 0
00
0
10 FF FF FF 00
16 255 255 255 0
00
0
FF C8 C8 C8 00
255 200 200 200 0
00
0
FF C8 C8 C8 00
255 200 200 200 0
00
0
FF 80 80 80 00
255 128 128 128 0
00
0
FF 80 80 80 00
255 128 128 128 0
00
0
FF 10
255 16
10
16
10
16
00
0
00
0
FF 10
255 16
10
16
10
16
00
0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
5 0.5 FF FF FF FF 00
255 255 255 255 0
00
0
5
5
2
2
2
30
Maximum gain
GV
16 17.5 19
dB 26, 28, b
b
b
a
b
a
a
a
a
a
b
5
2
30
Relative maximum gain
∆GV
0.8 1.0 1.2
3.3
4



4.7 VP-P 26, 28, b
Main contrast control
characteristics1 (Max.)
VC1
Main contrast control
relative characteristics1
∆VC1
Main contrast control
characteristics2 (Typ.)
VC2
Main contrast control
relative characteristics2
∆VC2
Main contrast control
characteristics3 (Min.)
VC3
Main contrast control
relative characteristics3
∆VC3 −0.2
Sub contrast control
characteristics1 (Max.)
VSC1
Sub contrast control
relative characteristics1
∆VSC1 0.8 1.0 1.2
Sub contrast control
characteristics2 (Typ.)
VSC2
Sub contrast control
relative characteristics2
∆VSC2 0.8 1.0 1.2
Sub contrast control
characteristics3 (Min.)
VSC3
Sub contrast control
relative characteristics3
∆VSC3 −0.2
ABL control
characteristics1
ABL1
ABL control relative
characteristics1
∆ABL1 0.8 1.0 1.2
ABL control
characteristics2
ABL2
ABL control relative
characteristics2
∆ABL2 0.8 1.0 1.2
ABL control
characteristics3
ABL3
ABL control relative
characteristics3
∆ABL3 −0.2
Brightness control
characteristics1
VB1
Brightness control
relative characteristics1
∆VB1 −0.3
Brightness control
characteristics2
VB2
Brightness control
relative characteristics2
∆VB2 −0.3
Brightness control
characteristics3
VB3
Brightness control
relative characteristics3
∆VB3 −0.3
Pulse characteristics1
(4 VP-P)
Tr
Relative pulse
characteristics1 (4 VP-P)
∆Tr
Pulse characteristics2
(4 VP-P)
Tf
Relative pulse
characteristics2 (4 VP-P)
∆Tf
Clamp pulse
threshold voltage
VthCP 0.7 1.5 2.3 VDC 26, 28, b
Clamp pulse minimum
width
WCP
           
b
b
a
b
a
a
a
a
a
b
5
2
30
0.8 1.0 1.2



2.3 2.8 3.3 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
5
2
30
0.8 1.0 1.2



0.25 0.55 0.85 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
5
2
30
3.3
0
4
0.2 VP-P


4.7 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
5
2
30



2.3 2.8 3.3 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
5
2
30



0.2 0.5 0.8 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
5
2
30
0
0.2 VP-P


3.4 4.2 5.0 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
4
2
30



1.5 2.0 2.5 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
2
2
30
−0.3
0



0.3 VP-P 26, 28, b
           
b
b
a
b
a
a
a
a
a
b
0
2
30
0
0.2 VP-P


3.4 3.8 4.2 VDC 26, 28, b
           
a
a
a
a
a
a
a
a
a
b
5
4
30
0
0.3
V


1.6 1.9 2.2 VDC 26, 28, b
           
a
a
a
a
a
a
a
a
a
b
5
2
30
0
0.3
V


0.3 0.5 0.7 VDC 26, 28, b
           
a
a
a
a
a
a
a
a
a
b
30
0
0.3
V


 2.2 3.0 ns* 26, 28, b
 2.7 3.5
30
−0.8
0
0.8 ns


 2.2 3.0 ns* 26, 28, b
30
 2.7 3.5
−0.8
0
0.8 ns


           
b
b
a
b
a
a
a
a
a
b
5
2
           
b
b
a
b
a
a
a
a
a
b
5
2
           
a
a
a
a
a
a
a
a
a
b
5
2
30
0.2


µs 26, 28, b
Note: Tr and Tf pulse characteristics 1 and 2 (4 Vp-p)
BUS CTL (H)
3
12 V
Vcc
a
a
a
a
a
30
top: M61311SP, under: M61316SP
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 7 of 26
a
a
a
a
b
5
2
FF FF FF FF 00
255 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
C8 FF FF FF 00
200 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
0
0
00
0
00
0
00
0
00
0
0
0
00
0
00
0
00
0
00
0
0
0
00
0
00
0
00
0
00
0
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
M61311SP/M61316SP
Electrical Characteristics (cont.)
Limits
Item
Test
Symbol Min. Typ. Max. Unit Point
3
12 V
Vcc
OSD pulse
characteristics1
OTr
OSD pulse
characteristics2
OTf
OSD adjust control
characteristics1 (Max.)
Oadj1
OSD adjust control
relative characteristics1
∆Oadj1 0.8 1.0 1.2
OSD adjust control
characteristics2 (Typ.)
Oadj2
OSD adjust control
relative characteristics2
∆Oadj2 0.8 1.0 1.2
OSD adjust control
characteristics3 (Min.)
Oadj3
OSD adjust control
relative characteristics3
∆Oadj3 −0.2
OSD input
threshold voltage
VthOSD 1.7 2.5 3.3 V
DC 26, 28, b
Black level difference
in OSD BLK on/off
OBLK
Relative OBLK
∆OBLK −0.2

2
CTL
Vol
Input
5
ns 26, 28, b
5
14 15 17 18 31 32 00H 01H 02H 03H 04H 05H 06H
12 13
7
4
07H 08H 09H 0AH
G SonG B OSD OSD OSD OSD RET CP ABL BRT Main Sub Sub Sub OSD Re- Sharp SonG VDET D/A D/A D/A D/A
R
G
B
Adj BLK ness SW SW OUT OUT OUT OUT
B BLK IN (V) (V) cont
G
IN BLK R
IN IN
cont cont cont
Adj
IN IN
IN
1
2
3
4
a
a
a
a
a
b
b
b
a
b
5
2
30

4
7
ns 26, 28, b
a
a
a
a
a
b
b
b
a
b
5
2
30
3.3 4.0 4.9 VP-P 26, 28, b
a
a
a
a
b
b
b
b
a
b
5
2
30



1.2 1.8 2.4 VP-P 26, 28, b
  
a
a
a
     
a
b
b
b
b
a
  
b
5
2
30



−0.5 −0.1 0.3 VP-P 26, 28, b
  
a
a
a
     
a
b
b
b
b
a
  
b
5
2
30
0
0.2



  
a
a
a
     
a
a
b
b
b
a
  
b
5
2
30
−0.5 −1.0 0.3 VDC 26, 28, b
a
a
a
a
b
a
a
a
a
b
5
2
30
0
0.2
 26, 28, b
a
a
a
a
b
a
a
a
a
b
5
2
30
OSD BLK input
threshold voltage
VthBLK 1.7 2.5 3.3 V
DC 26, 28, b
Retrace BLK
characteristics1
HBLK1 1.6 1.9 2.2 V
DC 26, 28, b
Retrace BLK
characteristics2
HBLK2 1.0 1.3 1.6 V
DC 26, 28, b
Retrace BLK
characteristics3
HBLK3 0.3 0.6 0.9 V
DC 26, 28, b
Retrace BLK input
threshold voltage
VthHBLK
0.7 1.5 2.3 VDC 26, 28, b
SOG input maximum
noise voltage
SS-NV

SOG minimum input
voltage
SS-SV
Sync output high level
VSH
Sync output low level
Sync output delay time1
Sync output delay time2
a
b
b
a
a
a
a
b
5
2
a
a
a
a
a
a
a
a
b
b
5
2
a
a
a
a
a
a
a
a
b
b
5
2
30
a
a
a
a
a
a
a
a
b
b
5
2
30
VSL
TDS-F
TDS-R
9
4.5 4.9 5.0 VDC
9
0
10
10
VD-SV 0.2
V-DET output high level
VVDH
V-DET output
delay time1
TDV-F
V-DET output
delay time2
TDV-R
D/A output
maximum voltage
VDH
D/A output
minimum voltage
VDL
D/A OUT input current1
IA+1

9
 VP-P
0.2
V-DET minimum input
voltage
VVDL
a
a
a
a
a
a
a
a
b
b
5
2
30
VD-NV
D/A OUT input current2
b
30
V-DET input maximum
noise voltage
V-DET output low level
b
30
 0.02 VP-P

0.4 0.7 VDC
30
30
65
65
ns
ns
9
9
9
 0.05 VP-P
10

 VP-P
10
3.8 4.2 5.0 VDC
10
0
10
1
0.7 1.1 VDC
23
13
50
40
ns
ns
10
10
10
b
b
b
b
b
b
b
b
b
b
b
b
a
a
a
a
a
a
b
b
b
b
b
b
4.7 5.2 5.7 VDC 21, 22, b
a
0.5 VDC 21, 22, b
a
 mA 21, 22, b
a
a
a
a
a
a
a
b
b
b
b
b
b
a
b
b
b
b
b
b
a
a
a
a
a
a
a
a
a
a
a
a
a
b
b
b
b
b
b
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
b
b
b
b
b
b
b
b
b
b
b
b
b
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2
2
2
2
2
2
2
2
2
2
2
2
23, 24
0
0
a
a
a
a
a
a
a
a
b
5
2
23, 24
IA+2
D/A OUT output
current
IA−
D/A nonlinearity
DNL
0.18 
0.18 


−1.0 
a
a
a
a
a
a
a
a
b
5
2
23, 24
 mA 21, 22, b
a
a
a
a
a
a
a
a
a
b
5
2
23, 24
0.4 mA 21, 22, b
a
a
a
a
a
a
a
a
a
b
5
2
23, 24
1.0 LSB 21, 22, b
23, 24
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 8 of 26
BUS CTL (H)
2
R
IN
a
a
a
a
a
a
a
a
a
b
5
2
FF FF FF FF 6F 00
255 255 255 255 111 0
FF FF FF FF 6F 00
255 255 255 255 111 0
FF FF FF FF 7F 00
255 255 255 255 127 0
FF FF FF FF 7F 00
255 255 255 255 127 0
FF FF FF FF 40
255 255 255 255 64
00
0
FF FF FF FF 40
255 255 255 255 64
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
0F
15
FF FF FF FF 00
255 255 255 255 0
08
8
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF FF FF 00
255 255 255 0
00
0
FF FF FF 00
255 255 255 0
00
0
FF FF FF FF 00
255 255 255 255 0
00
0
FF
255
FF
255
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
08
8
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
FF FF FF FF
255 255 255 255
0
0
00
0
00
0
00
0
00
0
0
0
00
0
00
0
00
0
00
0
0
0
00
0
00
0
00
0
00
0
0
0
FF FF FF FF
255 255 255 255
0
0
vari vari vari vari
able able able able
M61311SP/M61316SP
Electrical Characteristics Test Method
ICC1 5 V Circuit Current1 Power Save Mode
Measuring conditions are as listed in supplementary Table. Measured with a current meter at test point IB.
ICC2 12 V Circuit Current2 Normal Mode
Measuring conditions are as listed in supplementary Table. Measured with a current meter at test point IA.
ICC3 5 V Circuit Current3 Normal Mode
Measuring conditions are as listed in supplementary Table. Measured with a current meter at test point IB.
Vomax Output Dynamic Range
It makes the amplitude of SG1 1.4 P-P. Measure the DC voltage of the white level of the waveform output.
The measured value is called Vomax.
(VDC)
Waveform output
Vomax
0.5
0.0
Vimax Maximum Input
Increase the input signal (SG1) amplitude gradually, starting from 0.7 VP-P. Measure the amplitude of the input signal
when the output signal starts becoming distorted.
GV Maximum Gain
Input SG1, and measure the amplitude output at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
Maximum gain GV is calculated by the equation below:
GV = 20log (VOUT / 0.7) (dB)
∆GV Relative Maximum Gain
Relative maximum gain ∆GV is calculated by the equation below:
∆GV = VOUT (26) / VOUT (28),
VOUT (28) / VOUT (30),
VOUT (30) / VOUT (26)
VC1 Main Contrast Control Characteristics1 (Max.)
Input SG1, and measure the amplitude output at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
The measured value is called VC1.
∆VC1 Main Contrast Control Relative Characteristics1
Relative characteristics ∆VC1 is calculated by the equation below:
∆VC1 = VOUT (26) / VOUT (28),
VOUT (28) / VOUT (30),
VOUT (30) / VOUT (26)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 9 of 26
M61311SP/M61316SP
VC2 Main Contrast Control Characteristics2 (Typ.)
Measuring condition and procedure are the same as described in VC1.
∆VC2 Main Contrast Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VC1.
VC3 Main Contrast Control Characteristics3 (Min.)
Measuring condition and procedure are the same as described in VC1.
∆VC3 Main Contrast Control Relative Characteristics3
Relative characteristics ∆VC3 is calculated by the equation below:
∆VC3 = VOUT (26) − VOUT (28),
VOUT (28) − VOUT (30),
VOUT (30) − VOUT (26)
VSC1 Sub Contrast Control Characteristics1 (Max.)
Input SG1, and measure the amplitude output at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
The measured value is called VSC1.
∆VSC1 Sub Contrast Control Relative Characteristics1
Relative characteristics ∆VSC1 is calculated by the equation below:
∆VSC1 = VOUT (26) / VOUT (28),
VOUT (28) / VOUT (30),
VOUT (30) / VOUT (26)
VSC2 Sub Contrast Control Characteristics2 (Typ.)
Measuring condition and procedure are the same as described in VSC1.
∆VSC2 Sub Contrast Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VSC1.
VSC3 Sub Contrast Control Characteristics3 (Min.)
Measuring condition and procedure are the same as described in VSC1.
∆VSC3 Sub Contrast Control Relative Characteristics3
Relative characteristics ∆VSC3 is calculated by the equation below:
∆VSC3 = VOUT (26) − VOUT (28),
VOUT(28) − VOUT (30),
VOUT (30) − VOUT (26)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 10 of 26
M61311SP/M61316SP
ABL1 ABL Control Characteristics1
Measure the amplitude output at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
The measured value is ABL1.
∆ABL1 ABL Control Relative Characteristics1
Relative characteristics ∆ABL1 is calculated by the equation below:
∆ABL1 = VOUT (26) / VOUT (28),
VOUT (28) / VOUT (30),
VOUT (30) / VOUT (26)
ABL2 ABL Control Characteristics2
Measuring condition and procedure are the same as described in ABL1.
∆ABL2 ABL Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆ABL1.
ABL3 ABL Control Characteristics3
Measuring condition and procedure are the same as described in ABL1.
∆ABL3 ABL Control Relative Characteristics3
Relative characteristics ∆ABL3 is calculated by the equation below:
∆ABL3 = VOUT (26) − VOUT (28),
VOUT (28) − VOUT (30),
VOUT (30) − VOUT (26)
VB1 Brightness Control Characteristics1
Measure the DC voltage at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
The measured value is called VB1.
∆VB1 Brightness Control Relative Characteristics1
Relative characteristics ∆VB1 is calculated by the equation below:
∆VB1 = VOUT (26) − VOUT (28),
VOUT (28) − VOUT (30),
VOUT (30) − VOUT (26)
VB2 Brightness Control Characteristics2
Measuring condition and procedure are the same as described in VB1.
∆VB2 Brightness Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆VB1.
VB3 Brightness Control Characteristics3
Measuring condition and procedure are the same as described in VB1.
∆VB3 Brightness Control Relative Characteristics3
Measuring condition and procedure are the same as described in ∆VB1.
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 11 of 26
M61311SP/M61316SP
Tr Pulse Characteristics1 (4 VP-P)
Measure the time needed for the input pulse to rise from 10% to 90% (Tr1) and for the output pulse to rise from 10% to
90% (Tr2) with an active probe.
Pulse characteristics Tr is calculated by the equations below:
Tr = √ (Tr2)2 − (Tr1)2
(ns)
∆Tr Relative Pulse Characteristics1 (4 VP-P)
Relative characteristics ∆Tr is calculated by the equation below:
∆Tr = Tr (26) − Tr (28),
Tr (28) − Tr (30),
Tr (30) − Tr (26)
Tf Pulse Characteristics2 (4 VP-P)
Measure the time needed for the input pulse to fall from 90% to 10% (Tf1) and for the output pulse to fall from 90% to
10% (Tf2) with an active probe.
Pulse characteristics Tf is calculated by the equations below:
Tf = √ (Tf2)2 − (Tf1)2
(ns)
∆Tf Relative Pulse Characteristics2 (4 VP-P)
Relative characteristics ∆Tf is calculated by the equation below:
∆Tf = Tf (26) − Tf (28),
Tf (28) − Tf (30),
Tf (30) − Tf (26)
100%
90%
10%
0%
Tr1 or Tr2
Tf1 or Tf2
VthCP Clamp Pulse Threshold Voltage
Decrease the SG5 input level gradually from 5.0 VP-P monitoring the waveform output. Measure the top level of input
pulse when the output pedestal voltage turn decrease with unstable. And increase the SG5 input level gradually from 0
VP-P. Measure the top level of input pulse when the output pedestal voltage turn increase with stable (a point of 2.0 V).
The measured value is called VthCP.
WCP Clamp Pulse Minimum Width
Decrease the SG5 pulse width gradually from 0.5 µs, monitoring the output. Measure the SG5 pulse width when the
output pedestal voltage turn decrease with unstable. And increase the SG5 pulse width gradual from 0 µs. Measure the
SG5 pulse width when the output pedestal voltage turn increase with stable (a point of 2.0 V). The measured value is
called WCP.
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 12 of 26
M61311SP/M61316SP
OTr OSD Pulse Characteristics1
Measure the time needed for the output pulse to rise from 10% to 90% (OTr) with an active probe.
OTf OSD Pulse Characteristics2
Measure the time needed for the output pulse to fall from 90% to 10% (OTf) with an active probe.
Oadj1 OSD Adjust Control Characteristics1 (Max.)
Measure the amplitude output at OUT (26, 28, 30). The amplitude is called VOUT (26, 28, 30).
The measured value is called Oadj1.
∆Oadj1 OSD Adjust Control Relative Characteristics1
Relative characteristics ∆Oadj1 is calculated by the equation below:
∆Oadj1 = VOUT (26) / VOUT (28),
VOUT (28) / VOUT (30),
VOUT (30) / VOUT (26)
Oadj2 OSD Adjust Control Characteristics2 (Typ.)
Measuring condition and procedure are the same as described in Oadj1.
∆Oadj2 OSD Adjust Control Relative Characteristics2
Measuring condition and procedure are the same as described in ∆Oadj1.
Oadj3 OSD Adjust Control Characteristics3 (Min.)
Measuring condition and procedure are the same as described in Oadj1.
∆Oadj3 OSD Adjust Control Relative Characteristics3
Relative characteristics ∆Oadj3 is calculated by the equation below:
∆Oadj3 = VOUT (26) − VOUT (28),
VOUT (28) − VOUT (30),
VOUT (30) − VOUT (26)
VthOSD OSD Input Threshold Voltage
Decrease the SG6 input level gradually from 5.0 VP-P, monitoring the output. Measure the top level of SG6 when the
output is disappeared. And increase the SG6 input level gradually from 0 VP-P. Measure the top level of SG6 when the
output is appeared. The measured value is called VthOSD.
OBLK Black Level Difference in OSD BLK on/off
Calculating the black level voltage minus the output voltage of high section of SG6 it makes VOUT (26, 28, 30). The
calculated value is called OBLK.
∆OBLK Relative OBLK
Relative characteristics ∆OBLK is calculated by the equation below:
∆OBLK = VOUT (26) − VOUT (28),
VOUT (28) − VOUT (30),
VOUT (30) − VOUT (26)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 13 of 26
M61311SP/M61316SP
VthBLK OSD BLK Input Threshold Voltage
Confirm that output signal is being blanked by the SG6 at the time.
Decrease the SG6 input level gradually from 5.0 VP-P, monitoring the output. Measure the top level of SG6 when the
blanking period is disappeared. And increase the SG6 input level gradually from 0 VP-P. Measure the top level of SG6
when the blanking period is appeared. The measured value is called VthBLK.
HBLK1 Retrace BLK Characteristics1
Measure the bottom voltage at amplitude of OUT (26, 28, 30). The measured value is called HBLK1.
HBLK2 Retrace BLK Characteristics2
Measuring condition and procedure are the same as described in HBLK1.
HBLK3 Retrace BLK Characteristics3
Measuring condition and procedure are the same as described in HBLK1.
VthHBLK Retrace BLK Input Threshold Voltage
Decrease the SG7 input level gradually from 5.0 VP-P, monitoring the output. Measure the top level of SG7 when the
output is disappeared. And increase the SG7 input level gradually from 0 VP-P. Measure the top level of SG7 when the
output is appeared. The measured value is called VthHBLK.
SS-NV SOG Input Maximum Noise Voltage
When SG4 is all black (no video), the sync's amplitude of SG4 gradually from 0 VP-P to 0.02 VP-P. No pulse output
permitted.
SS-SV SOG Minimum Input Voltage
When SG4 is all white or all black, the sync's amplitude of SG4 gradually from 0.2 VP-P to 0.3 VP-P. Positive pulse has
occurred to Sync Sepa OUT.
VSH Sync Output High level
Measure the high voltage at Sync Sepa OUT. The measured value is treated as VSH.
VSL Sync Output Low Level
Measure the low voltage at Sync Sepa OUT. The measured value is treated as VSL.
TDS-F Sync Output Delay Time1
Sync Sepa OUT becomes high with sink part of SG4.
Measure the time needed for the front edge of SG4 Sync to fall from 50% and for SyncOUT to rise from 50% with an
active probe. The measured value is called TDS-F.
TDS-R Sync Output Delay Time2
Sync Sepa OUT becomes high with sink part of SG4.
Measure the time needed for the rear edge of SG4 Sync to rise from 50% and for SyncOUT to fall from 50% with an
active probe. The measured value is called TDS-R.
SG4
Pedestal voltage
Sync (50%)
Sync Sepa OUT
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 14 of 26
TDS-F
(50%)
TDS-R
M61311SP/M61316SP
VD-NV V-DET Input Maximum Noise Voltage
Increase the SG1 input level gradually from 0 VP-P to 0.05 VP-P. No pulse Video Det OUT permitted.
VD-SV V-DET Minimum Input Voltage
Decrease the SG1 input level gradually from 0.2 VP-P to 0.3 VP-P. Positive pulse has occurred to Video Det OUT.
VVDH V-DET Output High Level
Measure the high voltage at Video Det OUT. The measured value is treated as VVDH.
VVDL V-DET Output Low Level
Measure the low voltage at Video Det OUT. The measured value is treated as VVDL.
TDV-F V-DET Output Delay Time1
Video Det OUT becomes high with signal part of SG1.
Measure the time needed for the SG1 to fall from 50% and for Video Det OUT to fall from 50% with an active probe.
The measured value is called TDV-F.
TDV-R V-DET Output Delay Time2
Video Det OUT becomes high with signal part of SG1.
Measure the time needed for the SG1 to rise from 50% and for Video Det OUT to rise from 50% with an active probe.
The measured value is called TDV-R.
SG1
Video (50%)
(50%)
Pedestal voltage
Video Det OUT
TDV-R
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 15 of 26
TDV-F
M61311SP/M61316SP
VDL D/A Output Minimum Voltage
Measure the DC voltage at D/A OUT. The measured value is called VDL.
IA+1 D/A OUT Input Current1
Measure the input current that flows into D/A OUT through 1 kΩ by 2 VDC.
IA+2 D/A OUT Input Current2
Measure the input current that flows into D/A OUT through 1 kΩ by 0.5 VDC.
IA− D/A OUT Output Current
Measure the output current that flows out of D/A OUT through 1 kΩ by 4.2 VDC.
1 kΩ
A
D/A OUT
DNL D/A Nonlinearity
The difference of differential non-linearity of D/A OUT must be less than ±1.0 LSB.
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 16 of 26
M61311SP/M61316SP
Input Signal
SG No.
Signals
Pulse with amplitude of 0.7 VP-P (f = 30 kHz). Video width of 25 µs. (75%) (Amplitude is variable.)
33 µs
SG1
Video signal
(all white)
8 µs
0.7 VP-P
Video width of 25 µs. (75%)
SG4
Video signal
(all white,
all black)
All white or all black
variable.
0.7 VP-P
3 µs
0.3 VP-P
Sync's amplitude
is variable.
Pulse width and amplitude are variable.
0.5 µs
SG5
Clamp
pulse
5 VTTL
SG6
OSD pulse
5 VTTL
Amplitude is variable.
10 µs
Amplitude is variable.
SG7
BLK pulse
5 VTTL
5 µs
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 17 of 26
M61311SP/M61316SP
Test Circuit
0 to 5 V 0 to 5 V
V32
OUT (30)
V31
OUT (28)
1k
32
31
30
BRIGHT ABL
IN
28
27
GND
R IN
12 V
G IN
1
2
3
4
5
3.3 µ +
IN (4) SonG
IN
0.01 µ 3.3 µ +
26
25
SW2
a
a
b
b
SW4
a
SW5
b a
24
SG5
SG7
SW18 SW17
SDA
a
SCL
b
20
19
18
17
SDA
CP
IN
Ret
BLK
IN
Video
Det
OUT
5V
OSD
BLK
IN
OSD
R
IN
OSD
G
IN
OSD
B
IN
GND
10
11
12
13
14
15
16
B IN
GND
6
7
8
9
SW7
a
b a
SCL
GND
3.3 µ +
b
D/A
OUT
(21)
D/A
D/A
D/A
D/A
OUT4 OUT3 OUT2 OUT1
Sync
Sepa
OUT
23
22
21
50 k
0.01 µ
Sync Video
Sepa Det
OUT OUT
1µ
SW3
D/A
OUT
(22)
CP
IN
IN (7)
0.01 µ +
D/A
OUT
(23)
1k
12 V G OUT GND B OUT GND
SonG
IN
IN (2)
OUT (26)
1k
29
R OUT
D/A
OUT
(24)
b
SW12 SW13 SW14 SW15
a
+
b a
b a
b a
b
47 µ
+
47 µ
SG1
IA A
IB
SG4
A
5V
SG6
12 V
: Measure point
Capacitor: 0.01 µF (unless otherwise specified.)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 18 of 26
M61311SP/M61316SP
Pin Description
Pin No.
2
4
7
Name
R IN
G IN
B IN
DC Voltage (V)
Peripheral Circuit
3.5
Function
Clamp to about 3.5 V due to
clamp pulse from pin 18.
Input at low impedance.
12 V
2k
2k
CP
0.02 mA
3
VCC1
(12 V)
12
5
SonG
IN
When open 2.3
2.25 V
3.5 V

5V
30 k
1.5 k
6k
1.5 k
6k
10 k
1k
5
2.28 V
0.2 mA
1
6
8
16
27
9
GND
GND 1
GND 2
GND 3
GND 4
Sync
Sepa
OUT
0.13 mA
2.4 V

GND
Connect to GND.

Sync Sepa output pin.
When the rise time of the signal
is sped up, connect about 2.3
kΩ between 5 V power supply.
When it does not use, do
openly.
So as not to flow into pin 9 8 mA
over, resistance value does not
make to 2.3 kΩ or under.
Output is a positive.
5V
1k
9
10
Video
Det
OUT

Connect to the power supply
that stabilized.
SYNC ON VIDEO input pin.
Sync is negative.
Input signal at pin 5, compare
with the reference voltage of
internal circuit in order to
separate Sync signal from Sync
on Green signal.
Input at low impedance.
Do not input the signal without
the Sync.
When it does not use this
function, connect to capacitor
between GND, turn on Sync
Sepa SW by I2C BUS.
12 V
10
pin 10 needs to connect the 50
kΩ between 5 V power supply.
When it does not use this
function, turn off Video Det SW
by I2C BUS.
50 k
11
VCC
(5 V)
5
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 19 of 26

Connect to the power supply
that stabilized.
M61311SP/M61316SP
Pin Description (cont.)
Pin No.
12
13
14
15
17
Name
DC Voltage (V)
OSD
BLK IN
OSD R
IN
OSD G
IN
OSD B
IN

Retrace
BLK IN

Peripheral Circuit
12 V
Function
Input the positive pulse
3.5 to 5 V
0.1 mA
1.5 V to GND
500
When it does not use this
function, connect to GND.
When input OSD RGB pulse,
input OSD BLK pulse without
fail.
500
500
500
3.25 V
3.25 V
Input the positive pulse
12 V
2.5 to 5 V
50 k
0.5 V to GND
When it does not use this
function, connect to GND.
17
2.25 V
18
Clamp
Pulse IN

Input the positive pulse which
width 200 ns over.
Input at low impedance.
12 V
0.15 mA
50 k
750
2.5 to 5 V
750
0.5 V to GND
10 k
10 k
500
18
3.75 V
19
SDA

SDA of I2C BUS
(Serial data line)
Tth = 2.3 V
12 V
19
2k
3.0 V
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 20 of 26
M61311SP/M61316SP
Pin Description (cont.)
Pin No.
20
Name
SCL
DC Voltage (V)

Peripheral Circuit
Function
SCL of I2C BUS
(Serial clock line)
Tth = 2.3 V
12 V
20
2k
3.0 V

21
22
23
24
D/A OUT 1
D/A OUT 2
D/A OUT 3
D/A OUT 4
26
28
30
B OUT
G OUT
R OUT
Variable
27
29
GND 4

VCC2
(12 V)
12
ABL IN
When open
2.5 V
D/A output pin.
Output voltage range is 0 V to
5 V.
Input current is below 0.18 mA.
Output current is below 0.4 mA.
12 V
15 k
This terminal needs to connect
the 1 to 3 kΩ resister between
GND.
This resistance value may be
changed, to improve the video
output characteristics.
Connect to GND
29
50
35
31
27
It is the power supply of emitter
follower of RGB output exclusive
use.
5V
5k
6k
9k
2k
16.25 k
32
BRIGHT
2.5 k
31
0.4 mA

ABL (Automatic beam limiter)
input pin.
Input voltage in the ranges of
0 V to 5 V.
Output amplitude Max with 5 V.
Output amplitude Min with 0 V.
When it does not use this
function, connect to 5 V.
It is recommended that the IC is
used between pedestal voltage
2 V to 3 V.
12 V
35 k
35 k
To other
channel
32
25
NC

REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 21 of 26

Connect to GND.
M61311SP/M61316SP
Typical Characteristics (Reference data)
Sub Contrast Control Characteristics
6
6
5
5
Output Amplitude (VP-P)
Output Amplitude (VP-P)
Main Contrast Control Characteristics
4
3
2
1
Sub contrast: Max
ABL:
5V
2
1
Main contrast: Max
ABL:
5V
FFH
Main Contrast Control Data
Sub Contrast Control Data
Brightness Control Characteristics
ABL Control Characteristics
6
6
5
5
4
3
2
1
0
0.5
0
4
3
2
1
Main contrast: Max
Sub contrast: Max
0
1
2
3
4
0
1
2
3
4
5
Brightness Control Voltage (VDC)
ABL Control Voltage (VDC)
OSD Adjust Control Characteristics
D/A OUT Control Characteristics
6
6
5
Output DC Voltage (VDC)
Output Amplitude (VP-P)
3
0
00H
FFH
Output Amplitude (VP-P)
Output DC Voltage (VDC)
0
00H
4
4
3
2
1
5
4
3
2
1
Brightness: 2 VDC
0
00H
7FH
OSD Adjust Control Data
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 22 of 26
0
00H
FFH
D/A OUT Control Data
M61311SP/M61316SP
Application Method for M61311SP/M61316SP
About Clamp Pulse Input
Clamp pulse needs to be always inputted.
Clamp pulse width is recommended:
15 kHz at 1.0 µs over
30 kHz at 0.5 µs over
64 kHz at 0.3 µs over
The clamp pulse circuit in ordinary set is a long round about way, and beside high voltage, sometimes connected to
external terminal, it is very easy affected by large surge.
Therefore, the figure shown below is recommended.
18
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 23 of 26
M61311SP/M61316SP
Notice of Application
Make the nearest distance between output and pull down resister.
Recommend this resister is 1 to 3 kΩ.
Power dissipation in 3 kΩ is smaller than 1 kΩ.
Recommend pedestal voltage of IC output signal is 2 V.
As for the low level of the pulse input of OSD BLK, OSD, Clamp Pulse, Retrace BLK etc., avoid cons the GND level
or under.
Pin 31 connect to the voltage that stabilized, and pay attention as surge etc. does not flow into.
VCC (12 V, 5 V) connects to the power supply that stabilized, and bypass-capacitor connects near the term.
When capacitor is connected to pin 29, it sometimes oscillates. Do not connect capacitor to pin 29.
Connect to bypass-capacitance of the DC line near the terminal.
Connect to the NC pin to GND.
The time (t) is from fall of 9 bit of SCL to rise of acknowledge.
About the forwarding of I2C BUS, the time (t) changes with the resistance that connected outside.
The next SCL does not overlap into this time (t).
5V
SCL
R
20
SCL
t
Acknowledge
400 pF
Acknowledge Delay Time Characteristics (Reference data)
16
Delay Time t (µs)
14
12
10
8
6
4
2
0
1.0
2.0
3.0
5.0
Resistance Value (kΩ)
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 24 of 26
7.0
10
M61311SP/M61316SP
Application Example
CRT
110 V
Cut off Adj
SCL
SDA
5 VDC
+
0.01 µ
47 µ
GND
Clamp Pulse IN
5 VDC
3k
ABL IN
0 to 5 VDC
3k
100 µH
3k
0.01 µ 0.01 µ
100
BRIGHT
2 to 3 VDC
32
31
30
29
28
27
26
25
24
23
GND
Ret BLK IN
0.01 µ 0.01 µ
22
21
20
19
18
17
11
12
13
14
15
16
M61311SP/M61316SP
1
2
3
4
5
6
7
8
9
10
50 k
+
3.3 µ
+
0.01 µ
3.3 µ
+
0.01 µ
1µ
+
3.3 µ
OSD B IN
0.01 µ
OSD G IN
75
OSD R IN
75
75
OSD BLK IN
R IN
0.01 µ
G IN
+
B IN
5 VDC
Sync Video
Sepa Det
OUT OUT
GND
47 µ
12 V
0.01 µ
5V
+
SONG IN
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 25 of 26
+
47 µ
M61311SP/M61316SP
Package Dimensions
RENESAS Code
PRDP0032BA-A
Previous Code
32P4B
MASS[Typ.]
2.2g
17
1
16
D
L
A1
A
A2
*2
c
*1
E
32
e1
JEITA Package Code
P-SDIP32-8.9x28-1.78
SEATING PLANE
e
*3 b
3
bp
*3
b2
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
Reference
Symbol
e1
D
E
A
A1
A2
bp
b2
b3
c
e
L
REJ03F0199-0201 Rev.2.01 Mar 31, 2008
Page 26 of 26
Dimension in Millimeters
Min Nom Max
9.86 10.16 10.46
27.8 28.0 28.2
8.75 8.9 9.05
5.08
0.51
3.8
0.35 0.45 0.55
0.63 0.73 1.03
0.9 1.0 1.3
0.22 0.27 0.34
0°
15°
1.528 1.778 2.028
3.0
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
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