PD- 93773A
IRF820A
SMPS MOSFET
HEXFET® Power MOSFET
Applications
Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High speed power switching
l
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective COSS specified (See AN 1001)
VDSS
RDS(on) max
ID
3.0Ω
2.5A
500V
l
TO-220AB
GDS
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
2.5
1.6
10
50
0.4
± 30
3.4
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topologies:
l
l
Two transistor Forward
Half Bridge and Full Bridge
Notes
through
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are on page 8
1
5/8/00
IRF820A
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
500
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.60
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, I D = 250µA
––– V/°C Reference to 25°C, ID = 1mA
3.0
Ω
VGS = 10V, ID = 1.5A
4.5
V
VDS = VGS, ID = 250µA
25
VDS = 500V, VGS = 0V
µA
250
VDS = 400V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
1.4
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
8.1
12
16
13
340
53
2.7
490
15
28
Max. Units
Conditions
–––
S
VDS = 50V, ID = 1.5A
17
ID = 2.5A
4.3
nC
VDS = 400V
8.5
VGS = 10V, See Fig. 6 and 13
–––
VDD = 250V
–––
ID = 2.5A
ns
–––
RG = 21Ω
–––
RD = 97Ω,See Fig. 10
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
140
2.5
5.0
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
2.5
–––
62
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 2.5
showing the
A
G
integral reverse
––– –––
10
S
p-n junction diode.
––– ––– 1.6
V
TJ = 25°C, IS = 2.5A, VGS = 0V
––– 330 500
ns
TJ = 25°C, I F = 2.5A
––– 760 1140 nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF820A
10
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
0.1
4.5V
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
1
4.5V
20µs PULSE WIDTH
TJ = 150 °C
0.1
1
100
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
0.01
4.0
10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
9.0
ID = 2.5A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF820A
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
1000
Ciss
100
Coss
10
20
VGS , Gate-to-Source Voltage (V)
10000
ID = 2.5A
VDS = 400V
VDS = 250V
VDS = 100V
15
10
5
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
1
10
100
0
1000
4
8
12
16
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
10
TJ = 150 ° C
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
1
TJ = 25 ° C
0.1
0.4
V GS = 0 V
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.2
10
10us
100us
1
0.1
1ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
10ms
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF820A
3.0
RD
VDS
VGS
2.5
D.U.T.
I D , Drain Current (A)
RG
+
-VDD
2.0
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
1.5
1.0
Fig 10a. Switching Time Test Circuit
VDS
0.5
90%
0.0
25
50
75
100
TC , Case Temperature
125
150
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
P DM
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF820A
300
D R IV E R
L
VDS
D .U .T
RG
+
V
- DD
IA S
20V
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
TOP
250
BOTTOM
ID
1.1A
1.6A
2.5A
200
150
100
50
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
IAS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGD
700
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V DSav , Avalanche Voltage ( V )
QGS
650
600
.3µF
D.U.T.
+
V
- DS
550
0.0
0.5
1.0
1.5
2.0
2.5
IAV , Avalanche Current ( A)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRF820A
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET Power MOSFETs
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7
IRF820A
Package Outline
TO-220AB
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
3.78 (.149)
3.54 (.139)
-A-
-B4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
1
2
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
3X
3X
LE AD AS SIG NME NT S
1 - GA TE
2 - DR A IN
3 - S OU RC E
4 - DR A IN
3
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
2.54 (.100)
2X
N OTE S :
1 DIMEN SIO NING & TO LE RA NC ING P E R AN SI Y 14.5M, 1982.
2 CO NT ROLLING DIM EN SIO N : INC H
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
3 O UTLINE CON F OR MS TO JED EC OUT LIN E T O-220A B.
4 HE AT SIN K & LE AD ME A SU RE ME NT S D O NO T INC LU DE B U RRS .
Part Marking Information
TO-220AB
E X A M P L E : T H IS IS A N IR F 1 0 1 0
W IT H A S S E M B L Y
LOT CO DE 9B1M
A
IN T E R N A T IO N A L
R E C T IF IE R
LO GO
ASS EM BLY
LOT CODE
P ART NUM BER
IR F 1 0 1 0
9246
9B
1M
D ATE COD E
(Y Y W W )
Y Y = YE A R
W W = W EEK
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 45mH
RG = 25Ω, IAS = 2.5A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 2.5A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
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8000
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Data and specifications subject to change without notice. 5/00
8
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