PHILIPS BSP128 N-channel enhancement mode vertical d-mos transistor Datasheet

DISCRETE SEMICONDUCTORS
DATA SHEET
BSP128
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
BSP128
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 envelope and intended for
use as a line current interruptor in
telephone sets and for applications in
relay, high-speed and line
transformer drivers.
SYMBOL
PARAMETER
MAX.
UNIT
VDS
drain-source voltage
200
V
ID
DC drain current
350
mA
RDS(on)
drain-source on-resistance
8
Ω
VGS(th)
gate-source threshold voltage
1.8
V
d
4
handbook, halfpage
g
PINNING - SOT223
1
PIN
DESCRIPTION
2
s
3
Top view
MAM054
Code: BSP128
1
gate
2
drain
3
source
4
drain
Fig.1 Simplified outline (SOT223) and symbol.
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
−
200
V
−
20
V
−
350
mA
−
1.4
A
−
1.5
W
storage temperature range
−65
150
°C
junction temperature
−
150
°C
VDS
drain-source voltage
±VGSO
gate-source voltage
ID
DC drain current
IDM
peak drain current
Ptot
total power dissipation
Tstg
Tj
open drain
up to Tamb = 25 °C (note 1)
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
THERMAL RESISTANCE
from junction to ambient (note 1)
83.3 K/W
Note
1. Device mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm2.
April 1995
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP128
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
V(BR)DSS
drain-source breakdown voltage
CONDITIONS
ID = 10 µA; VGS = 0
MIN.
TYP. MAX. UNIT
200
−
−
V
IDSS
drain-source leakage current
VDS = 160 V; VGS = 0
−
−
1
µA
±IGSS
gate-source leakage current
±VGS = 20 V; VDS = 0
−
−
100
nA
VGS(th)
gate-source threshold voltage
ID = 1 mA; VGS = VDS
0.4
−
1.8
V
RDS(on)
drain-source on-resistance
ID = 100 mA; VGS = 2.8 V
−
5
8
Ω
 Yfs
transfer admittance
ID = 300 mA; VDS = 25 V
200
400
−
mS
Ciss
input capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
50
80
pF
Coss
output capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
20
30
pF
Crss
feedback capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
5
10
pF
Switching times (see Figs 2 and 3)
ton
turn-on time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
5
10
ns
toff
turn-off time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
20
30
ns
VDD = 50 V
handbook, halfpage
handbook, halfpage
90 %
INPUT
10 %
90 %
10 V
0V
OUTPUT
ID
50 Ω
10 %
ton
MBB691
toff
MBB692
VDD = 50 V.
Fig.2 Switching times test circuit.
April 1995
Fig.3 Input and output waveforms.
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP128
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
96-11-11
97-02-28
SOT223
April 1995
EUROPEAN
PROJECTION
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP128
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
5
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
6
BSP128
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
7
BSP128
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/1200/01/pp8
Date of release: April 1995
Document order number:
9397 750 02476
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