TI1 LM26LVCISD-135/NOPB 1.6 v, wson-6 factory preset temperature switch and temperature sensor Datasheet

LM26LV
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SNIS144F – JULY 2007 – REVISED FEBRUARY 2013
LM26LV/LM26LV-Q1 1.6 V, WSON-6 Factory Preset Temperature Switch and Temperature
Sensor
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FEATURES
DESCRIPTION
•
•
•
The LM26LV/LM26LV-Q1 is a low-voltage, precision,
dual-output, low-power temperature switch and
temperature sensor. The temperature trip point
(TTRIP) can be preset at the factory to any
temperature in the range of 0°C to 150°C in 1°C
increments. Built-in temperature hysteresis (THYST)
keeps the output stable in an environment of
temperature instability.
1
2
•
•
•
•
•
•
•
•
Low 1.6V Operation
Low Quiescent Current
Latching Function: Device Can Latch the Over
Temperature Condition
Push-Pull and Open-Drain Temperature Switch
Outputs
Wide Trip Point Range of 0°C to 150°C
Very Linear Analog VTEMP Temperature Sensor
Output
VTEMP Output Short-Circuit Protected
Accurate Over −50°C to 150°C Temperature
Range
2.2 mm by 2.5 mm (typ) WSON-6 Package
Excellent Power Supply Noise Rejection
LM26LVQISD–130 and LM26LVQISD-135 are
AEC-Q100 Grade 0 Qualified and are
Manufactured on an Automotive Grade Flow.
For Other Trip Points, Contact Your Sales
Office.
APPLICATIONS
•
•
•
•
•
•
Cell Phones and Wireless Transceivers
Digital Cameras
Battery Management
Automotive
Disk Drives
Games and Appliances
In normal operation the LM26LV/LM26LV-Q1
temperature switch outputs assert when the die
temperature exceeds TTRIP. The temperature switch
outputs will reset when the temperature falls below a
temperature equal to (TTRIP − THYST). The
OVERTEMP digital output, is active-high with a pushpull structure, while the OVERTEMP digital output, is
active-low with an open-drain structure.
The analog output, VTEMP, delivers an analog output
voltage with Negative Temperature Coefficient (NTC).
Driving the TRIP TEST input high: (1) causes the
digital outputs to be asserted for in-situ verification
and, (2) causes the threshold voltage to appear at the
VTEMP output pin, which could be used to verify the
temperature trip point.
The LM26LV/LM26LV-Q1's low minimum supply
voltage makes it ideal for 1.8 Volt system designs. Its
wide operating range, low supply current, and
excellent accuracy provide a temperature switch
solution for a wide range of commercial and industrial
applications.
Key Specifications
Supply Voltage
1.6V to 5.5V
Supply Current
8 μA (typ)
Accuracy, Trip Point Temperature
Accuracy, VTEMP
0°C to 150°C
±2.2°C
0°C to 150°C
±2.3°C
0°C to 120°C
±2.2°C
−50°C to 0°C
±1.7°C
±100 μA
VTEMP Output Drive
Operating Temperature
−50°C to 150°C
Hysteresis Temperature
4.5°C to 5.5°C
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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SNIS144F – JULY 2007 – REVISED FEBRUARY 2013
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Connection Diagram
TRIP
TEST
1
GND
2
OVERTEMP
3
DAP
6
VTEMP
5
OVERTEMP
4
VDD
Figure 1. WSON-6 (Top View)
See Package Number NGF0006A
Typical Transfer Characteristic
Figure 2. VTEMP Analog Voltage vs Die Temperature
Block Diagram
VDD
4
TRIP TEST = 0
(Default)
LM26LV
6
TRIP TEST = 1
VTS
3
OVERTEMP
VTRIP
VDD
TEMP
SENSOR
TEMP
THRESHOLD
5
2
GND
2
VTEMP
OVERTEMP
1
TRIP
TEST
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Pin Descriptions
Pin
No.
Name
Type
Equivalent Circuit
VDD
1
TRIP
TEST
Description
TRIP TEST pin. Active High input.
If TRIP TEST = 0 (Default) then:
VTEMP = VTS, Temperature Sensor Output Voltage
If TRIP TEST = 1 then:
OVERTEMP and OVERTEMP outputs are asserted and
VTEMP = VTRIP, Temperature Trip Voltage.
This pin may be left open if not used.
Digital
Input
1 PA
GND
VDD
5
OVERTEMP
Over Temperature Switch output
Active High, Push-Pull
Asserted when the measured temperature exceeds the Trip Point
Temperature or if TRIP TEST = 1
This pin may be left open if not used.
Digital
Output
GND
3
OVERTEMP
Over Temperature Switch output
Active Low, Open-drain (See Determining the Pull-up Resistor Value)
Asserted when the measured temperature exceeds the Trip Point
Temperature or if TRIP TEST = 1
This pin may be left open if not used.
Digital
Output
GND
VDD
VSENSE
6
VTEMP
Analog
Output
VTEMP Analog Voltage Output
If TRIP TEST = 0 then
VTEMP = VTS, Temperature Sensor Output Voltage
If TRIP TEST = 1 then
VTEMP = VTRIP, Temperature Trip Voltage
This pin may be left open if not used.
GND
4
VDD
Power
Positive Supply Voltage
2
GND
Ground
Power Supply Ground
DAP
Die Attach Pad
The best thermal conductivity between the device and the PCB is achieved
by soldering the DAP of the package to the thermal pad on the PCB. The
thermal pad can be a floating node. However, for improved noise immunity
the thermal pad should be connected to the circuit GND node, preferably
directly to pin 2 (GND) of the device.
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Typical Application
VDD Supply
(+1.6V to +5.5V)
Example: 2 to 3
Battery Cells
VDD
VTEMP
Analog
LM26LV
ADC Input
Microcontroller
OVERTEMP
OVERTEMP
TRIP TEST
GND
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
−0.3V to +6.0V
Supply Voltage
−0.3V to +6.0V
Voltage at OVERTEMP pin
Voltage at OVERTEMP and VTEMP pins
−0.3V to (VDD + 0.5V)
TRIP TEST Input Voltage
−0.3V to (VDD + 0.5V)
Output Current, any output pin
Input Current at any pin
±7 mA
(2)
5 mA
−65°C to +150°C
Storage Temperature
Maximum Junction Temperature, TJ(MAX)
+155°C
Human Body Model
ESD Susceptibility (3)
4500V
Machine Model
300V
Charged Device Model
1000V
For soldering specifications: see product folder at www.ti.com and http://www.ti.com/lit/SNOA549
(1)
(2)
(3)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
When the input voltage (VI) at any pin exceeds power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5mA.
The Human Body Model (HBM) is a 100pF capacitor charged to the specified voltage then discharged through a 1.5kΩ resistor into
each pin. The Machine Model (MM) is a 200pF capacitor charged to the specified voltage then discharged directly into each pin. The
Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through
some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.
Operating Ratings (1)
TMIN ≤ TA ≤ TMAX
Specified Temperature Range:
−50°C ≤ TA ≤ +150°C
LM26LV/LM26LV-Q1
Supply Voltage Range (VDD)
Thermal Resistance (θJA)
(1)
(2)
4
(2)
+1.6 V to +5.5 V
WSON-6 (Package NGF0006A)
152 °C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
The junction to ambient temperature resistance (θJA) is specified without a heat sink in still air.
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Accuracy Characteristics Trip Point Accuracy
Parameter
Trip Point Accuracy (2)
(1)
(2)
Conditions
0 − 150°C
VDD = 5.0 V
Limits (1)
Units
(Limit)
±2.2
°C (max)
Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.
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Accuracy Characteristics VTEMP Analog Temperature Sensor Output Accuracy (1)
There are four gains corresponding to each of the four Temperature Trip Point Ranges. Gain 1 is the sensor gain used for
Temperature Trip Point 0 - 69°C. Likewise Gain 2 is for Trip Points 70 - 109 °C; Gain 3 for 110 - 129 °C; and Gain 4 for 130 150 °C. These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in the
LM26LV/LM26LV-Q1 Conversion Table.
Parameter
Gain 1: for Trip Point
Range 0 - 69°C
Gain 2: for Trip Point
Range 70 - 109°C
VTEMP Temperature
Accuracy (3)
Gain 3: for Trip Point
Range 110 - 129°C
Gain 4: for Trip Point
Range 130 - 150°C
(1)
(2)
(3)
6
Limits (2)
Conditions
TA = 20°C to 40°C
VDD = 1.6 to 5.5 V
±1.8
TA = 0°C to 70°C
VDD = 1.6 to 5.5 V
±2.0
TA = 0°C to 90°C
VDD = 1.6 to 5.5 V
±2.1
TA = 0°C to 120°C
VDD = 1.6 to 5.5 V
±2.2
TA = 0°C to 150°C
VDD = 1.6 to 5.5 V
±2.3
TA = −50°C to 0°C
VDD = 1.7 to 5.5 V
±1.7
TA = 20°C to 40°C
VDD = 1.8 to 5.5 V
±1.8
TA = 0°C to 70°C
VDD = 1.9 to 5.5 V
±2.0
TA = 0°C to 90°C
VDD = 1.9 to 5.5 V
±2.1
TA = 0°C to 120°C
VDD = 1.9 to 5.5 V
±2.2
TA = 0°C to 150°C
VDD = 1.9 to 5.5 V
±2.3
TA = −50°C to 0°C
VDD = 2.3 to 5.5 V
±1.7
TA = 20°C to 40°C
VDD = 2.3 to 5.5 V
±1.8
TA = 0°C to 70°C
VDD = 2.5 to 5.5 V
±2.0
TA = 0°C to 90°C
VDD = 2.5 to 5.5 V
±2.1
TA = 0°C to 120°C
VDD = 2.5 to 5.5 V
±2.2
TA = 0°C to 150°C
VDD = 2.5 to 5.5 V
±2.3
TA = −50°C to 0°C
VDD = 3.0 to 5.5 V
±1.7
TA = 20°C to 40°C
VDD = 2.7 to 5.5 V
±1.8
TA = 0°C to 70°C
VDD = 3.0 to 5.5 V
±2.0
TA = 0°C to 90°C
VDD = 3.0 to 5.5 V
±2.1
TA = 0°C to 120°C
VDD = 3.0 to 5.5 V
±2.2
TA = 0°C to 150°C
VDD = 3.0 to 5.5 V
±2.3
TA = −50°C to 0°C
VDD = 3.6 to 5.5 V
±1.7
Units
(Limit)
°C (max)
°C (max)
°C (max)
°C (max)
Changes in output due to self heating can be computed by multiplying the internal dissipation by the temperature resistance.
Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the
specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the
specified conditions. Accuracy limits do not include load regulation; they assume no DC load.
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Electrical Characteristics
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to
TMAX ; all other limits TA = TJ = 25°C.
Symbol
Typical (1)
Limits (2)
Units
(Limit)
Quiescent Power Supply
Current
8
16
μA (max)
Hysteresis
5
5.5
°C (max)
4.5
°C (min)
VDD − 0.2V
V (min)
VDD − 0.45V
V (min)
Parameter
Conditions
GENERAL SPECIFICATIONS
IS
OVERTEMP DIGITAL OUTPUT
VOH
Logic "1" Output Voltage
ACTIVE HIGH, PUSH-PULL
VDD ≥ 1.6V
Source ≤ 340 μA
VDD ≥ 2.0V
Source ≤ 498 μA
VDD ≥ 3.3V
Source ≤ 780 μA
VDD ≥ 1.6V
Source ≤ 600 μA
VDD ≥ 2.0V
Source ≤ 980 μA
VDD ≥ 3.3V
Source ≤ 1.6 mA
BOTH OVERTEMP and OVERTEMP DIGITAL OUTPUTS
VOL
Logic "0" Output Voltage
OVERTEMP DIGITAL OUTPUT
IOH
Logic "1" Output Leakage
Current (3)
VDD ≥ 1.6V
Sink ≤ 385 μA
VDD ≥ 2.0V
Sink ≤ 500 μA
VDD ≥ 3.3V
Sink ≤ 730 μA
VDD ≥ 1.6V
Sink ≤ 690 μA
VDD ≥ 2.0V
Sink ≤ 1.05 mA
VDD ≥ 3.3V
Sink ≤ 1.62 mA
0.2
V (max)
0.45
ACTIVE LOW, OPEN DRAIN
TA = 30 °C
0.001
TA = 150 °C
0.025
1
μA (max)
VTEMP ANALOG TEMPERATURE SENSOR OUTPUT
−5.1
mV/°C
Gain 2: If Trip Point = 70 - 109°C
−7.7
mV/°C
Gain 3: If Trip Point = 110 - 129°C
−10.3
mV/°C
Gain 4: If Trip Point = 130 - 150°C
−12.8
mV/°C
Gain 1: If Trip Point = 0 - 69°C
VTEMP Sensor Gain
1.6V ≤ VDD < 1.8V
VTEMP Load Regulation (4)
VDD ≥ 1.8V
Source ≤ 90 μA
(VDD − VTEMP) ≥ 200 mV
−0.1
Sink ≤ 100 μA
VTEMP ≥ 260 mV
0.1
Source ≤ 120 μA
(VDD − VTEMP) ≥ 200 mV
−0.1
Sink ≤ 200 μA
VTEMP ≥ 260 mV
0.1
Source or Sink = 100 μA
VDD Supply- to-VTEMP
DC Line Regulation (5)
CL
(1)
(2)
(3)
(4)
(5)
VTEMP Output Load
Capacitance
VDD = +1.6V to +5.5V
Without series resistor. See CAPACITIVE LOADS
−1
mV (max)
1
mV (max)
−1
mV (max)
1
mV (max)
1
Ω
0.29
mV
74
μV/V
−82
dB
1100
pF (max)
Typicals are at TJ = TA = 25°C and represent most likely parametric norm.
Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).
The 1µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the
current for every 15°C increase in temperature. For example, the 1nA typical current at 25°C would increase to 16nA at 85°C.
Source currents are flowing out of the LM26LV/LM26LV-Q1. Sink currents are flowing into the LM26LV/LM26LV-Q1.
Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest
supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Section 4.3.
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Electrical Characteristics (continued)
Unless otherwise noted, these specifications apply for +VDD = +1.6V to +5.5V. Boldface limits apply for TA = TJ = TMIN to
TMAX ; all other limits TA = TJ = 25°C.
Symbol
Parameter
Typical (1)
Conditions
Limits (2)
Units
(Limit)
TRIP TEST DIGITAL INPUT
VIH
Logic "1" Threshold Voltage
VDD− 0.5
V (min)
VIL
Logic "0" Threshold Voltage
0.5
V (max)
IIH
Logic "1" Input Current
1.5
2.5
μA (max)
0.001
1
μA (max)
1.1
2.3
ms (max)
1.0
2.9
ms (max)
IIL
Logic "0" Input Current
(6)
TIMING
tEN
tV
(6)
Time from Power On to Digital
Output Enabled. See definition
below.
Time from Power On to Analog
Temperature Valid. See
definition below.
VTEMP CL = 0 pF to 1100 pF
The 1µA limit is based on a testing limitation and does not reflect the actual performance of the part. Expect to see a doubling of the
current for every 15°C increase in temperature. For example, the 1nA typical current at 25°C would increase to 16nA at 85°C.
VDD
1.3V
tEN
OVERTEMP
OVERTEMP
Enabled
Enabled
VDD
tVTEMP
Valid
VTEMP
Figure 3. Definitions of tEN and tV
8
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Typical Performance Characteristics
(1)
VTEMP Output Temperature Error
vs.
Temperature
Minimum Operating Temperature
vs.
Supply Voltage
Figure 4.
Figure 5.
Supply Current
vs.
Temperature
Supply Current
vs.
Supply Voltage
Figure 6.
Figure 7.
Load Regulation, 100 mV Overhead
T = 80°C Sourcing Current (1)
Load Regulation, 200 mV Overhead
T = 80°C Sourcing Current (1)
Figure 8.
Figure 9.
The curves shown represent typical performance under worst-case conditions. Performance improves with larger overhead (VDD −
VTEMP), larger VDD, and lower temperatures.
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Typical Performance Characteristics (continued)
(2)
(3)
10
Load Regulation, 400 mV Overhead
T = 80°C Sourcing Current (1)
Load Regulation, 1.72V Overhead
T = 150°C, VDD = 2.4V
Sourcing Current (1)
Figure 10.
Figure 11.
Load Regulation, VDD = 1.6V
Sinking Current (2)
Load Regulation, VDD = 1.8V
Sinking Current (2)
Figure 12.
Figure 13.
Load Regulation, VDD = 2.4V
Sinking Current (3)
Change in VTEMP
vs.
Overhead Voltage
Figure 14.
Figure 15.
The curves shown represent typical performance under worst-case conditions. Performance improves with larger VTEMP, larger VDD and
lower temperatures.
The curves shown represent typical performance under worst-case conditions. Performance improves with larger VTEMP, larger VDD and
lower temperatures.
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Typical Performance Characteristics (continued)
VTEMP Supply-Noise Rejection
vs.
Frequency
Line Regulation
VTEMP vs. Supply Voltage
Gain 1: For Trip Points 0 - 69°C
Figure 16.
Figure 17.
Line Regulation VTEMP vs. Supply Voltage
Gain 2: For Trip Points 70 - 109°C
Line Regulation VTEMP vs. Supply Voltage
Gain 3: For Trip Points 110 - 129°C
Figure 18.
Figure 19.
Line Regulation VTEMP vs. Supply Voltage
Gain 4: For Trip Points 130 - 150°C
Figure 20.
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LM26LV/LM26LV-Q1 VTEMP VS DIE TEMPERATURE CONVERSION TABLE
The LM26LV/LM26LV-Q1 has one out of four possible factory-set gains, Gain 1 through Gain 4, depending on
the range of the Temperature Trip Point. The VTEMP temperature sensor voltage, in millivolts, at each discrete die
temperature over the complete operating temperature range, and for each of the four Temperature Trip Point
ranges, is shown in the Conversion Table. This table is the reference from which the LM26LV/LM26LV-Q1
accuracy specifications (listed in the Electrical Characteristics section) are determined. This table can be used,
for example, in a host processor look-up table. See The Second-Order Equation (Parabolic) for the parabolic
equation used in the Conversion Table.
Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table (1)
Die Temp.,
°C
(1)
12
VTEMP, Analog Output Voltage, mV
Gain 1: for
TTRIP = 0-69°C
Gain 2: for
TTRIP = 70-109°C
Gain 3: for
TTRIP = 110-129°C
Gain 4: for
TTRIP = 130-150°C
−50
1312
1967
2623
3278
−49
1307
1960
2613
3266
−48
1302
1952
2603
3253
−47
1297
1945
2593
3241
−46
1292
1937
2583
3229
−45
1287
1930
2573
3216
−44
1282
1922
2563
3204
−43
1277
1915
2553
3191
−42
1272
1908
2543
3179
−41
1267
1900
2533
3166
−40
1262
1893
2523
3154
−39
1257
1885
2513
3141
−38
1252
1878
2503
3129
−37
1247
1870
2493
3116
−36
1242
1863
2483
3104
−35
1237
1855
2473
3091
−34
1232
1848
2463
3079
−33
1227
1840
2453
3066
−32
1222
1833
2443
3054
−31
1217
1825
2433
3041
−30
1212
1818
2423
3029
−29
1207
1810
2413
3016
−28
1202
1803
2403
3004
−27
1197
1795
2393
2991
−26
1192
1788
2383
2979
−25
1187
1780
2373
2966
−24
1182
1773
2363
2954
−23
1177
1765
2353
2941
−22
1172
1757
2343
2929
−21
1167
1750
2333
2916
−20
1162
1742
2323
2903
−19
1157
1735
2313
2891
−18
1152
1727
2303
2878
−17
1147
1720
2293
2866
The VTEMP temperature sensor output voltage, in mV, vs Die Temperature, in °C, for each of the four gains corresponding to each of the
four Temperature Trip Point Ranges. Gain 1 is the sensor gain used for Temperature Trip Point 0 - 69°C. Likewise Gain 2 is for Trip
Points 70 - 109 °C; Gain 3 for 110 - 129 °C; and Gain 4 for 130 - 150 °C. VDD = 5.0V. The values in bold font are for the Trip Point
range.
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
Die Temp.,
°C
VTEMP, Analog Output Voltage, mV
Gain 1: for
TTRIP = 0-69°C
Gain 2: for
TTRIP = 70-109°C
Gain 3: for
TTRIP = 110-129°C
Gain 4: for
TTRIP = 130-150°C
−16
1142
1712
2283
2853
−15
1137
1705
2272
2841
−14
1132
1697
2262
2828
−13
1127
1690
2252
2815
−12
1122
1682
2242
2803
−11
1116
1674
2232
2790
−10
1111
1667
2222
2777
−9
1106
1659
2212
2765
−8
1101
1652
2202
2752
−7
1096
1644
2192
2740
−6
1091
1637
2182
2727
−5
1086
1629
2171
2714
−4
1081
1621
2161
2702
−3
1076
1614
2151
2689
−2
1071
1606
2141
2676
−1
1066
1599
2131
2664
0
1061
1591
2121
2651
1
1056
1583
2111
2638
2
1051
1576
2101
2626
3
1046
1568
2090
2613
4
1041
1561
2080
2600
5
1035
1553
2070
2587
6
1030
1545
2060
2575
7
1025
1538
2050
2562
8
1020
1530
2040
2549
9
1015
1522
2029
2537
10
1010
1515
2019
2524
11
1005
1507
2009
2511
12
1000
1499
1999
2498
13
995
1492
1989
2486
14
990
1484
1978
2473
15
985
1477
1968
2460
16
980
1469
1958
2447
17
974
1461
1948
2435
18
969
1454
1938
2422
19
964
1446
1927
2409
20
959
1438
1917
2396
21
954
1431
1907
2383
22
949
1423
1897
2371
23
944
1415
1886
2358
24
939
1407
1876
2345
25
934
1400
1866
2332
26
928
1392
1856
2319
27
923
1384
1845
2307
28
918
1377
1835
2294
29
913
1369
1825
2281
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
Die Temp.,
°C
14
VTEMP, Analog Output Voltage, mV
Gain 1: for
TTRIP = 0-69°C
Gain 2: for
TTRIP = 70-109°C
Gain 3: for
TTRIP = 110-129°C
Gain 4: for
TTRIP = 130-150°C
30
908
1361
1815
2268
31
903
1354
1804
2255
32
898
1346
1794
2242
33
892
1338
1784
2230
34
887
1331
1774
2217
35
882
1323
1763
2204
36
877
1315
1753
2191
37
872
1307
1743
2178
38
867
1300
1732
2165
39
862
1292
1722
2152
40
856
1284
1712
2139
41
851
1276
1701
2127
42
846
1269
1691
2114
43
841
1261
1681
2101
44
836
1253
1670
2088
45
831
1245
1660
2075
46
825
1238
1650
2062
47
820
1230
1639
2049
48
815
1222
1629
2036
49
810
1214
1619
2023
50
805
1207
1608
2010
51
800
1199
1598
1997
52
794
1191
1588
1984
53
789
1183
1577
1971
54
784
1176
1567
1958
55
779
1168
1557
1946
56
774
1160
1546
1933
57
769
1152
1536
1920
58
763
1144
1525
1907
59
758
1137
1515
1894
60
753
1129
1505
1881
61
748
1121
1494
1868
62
743
1113
1484
1855
63
737
1105
1473
1842
64
732
1098
1463
1829
65
727
1090
1453
1816
66
722
1082
1442
1803
67
717
1074
1432
1790
68
711
1066
1421
1776
69
706
1059
1411
1763
70
701
1051
1400
1750
71
696
1043
1390
1737
72
690
1035
1380
1724
73
685
1027
1369
1711
74
680
1019
1359
1698
75
675
1012
1348
1685
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
Die Temp.,
°C
VTEMP, Analog Output Voltage, mV
Gain 1: for
TTRIP = 0-69°C
Gain 2: for
TTRIP = 70-109°C
Gain 3: for
TTRIP = 110-129°C
Gain 4: for
TTRIP = 130-150°C
76
670
1004
1338
1672
77
664
996
1327
1659
78
659
988
1317
1646
79
654
980
1306
1633
80
649
972
1296
1620
81
643
964
1285
1607
82
638
957
1275
1593
83
633
949
1264
1580
84
628
941
1254
1567
85
622
933
1243
1554
86
617
925
1233
1541
87
612
917
1222
1528
88
607
909
1212
1515
89
601
901
1201
1501
90
596
894
1191
1488
91
591
886
1180
1475
92
586
878
1170
1462
93
580
870
1159
1449
94
575
862
1149
1436
95
570
854
1138
1422
96
564
846
1128
1409
97
559
838
1117
1396
98
554
830
1106
1383
99
549
822
1096
1370
100
543
814
1085
1357
101
538
807
1075
1343
102
533
799
1064
1330
103
527
791
1054
1317
104
522
783
1043
1304
105
517
775
1032
1290
106
512
767
1022
1277
107
506
759
1011
1264
108
501
751
1001
1251
109
496
743
990
1237
110
490
735
979
1224
111
485
727
969
1211
112
480
719
958
1198
113
474
711
948
1184
114
469
703
937
1171
115
464
695
926
1158
116
459
687
916
1145
117
453
679
905
1131
118
448
671
894
1118
119
443
663
884
1105
120
437
655
873
1091
121
432
647
862
1078
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Table 1. VTEMP Temperature Sensor Output Voltage vs Die Temperature Conversion Table(1) (continued)
Die Temp.,
°C
VTEMP, Analog Output Voltage, mV
Gain 1: for
TTRIP = 0-69°C
Gain 2: for
TTRIP = 70-109°C
Gain 3: for
TTRIP = 110-129°C
Gain 4: for
TTRIP = 130-150°C
122
427
639
852
1065
123
421
631
841
1051
124
416
623
831
1038
125
411
615
820
1025
126
405
607
809
1011
127
400
599
798
998
128
395
591
788
985
129
389
583
777
971
130
384
575
766
958
131
379
567
756
945
132
373
559
745
931
133
368
551
734
918
134
362
543
724
904
135
357
535
713
891
136
352
527
702
878
137
346
519
691
864
138
341
511
681
851
139
336
503
670
837
140
330
495
659
824
141
325
487
649
811
142
320
479
638
797
143
314
471
627
784
144
309
463
616
770
145
303
455
606
757
146
298
447
595
743
147
293
438
584
730
148
287
430
573
716
149
282
422
562
703
150
277
414
552
690
VTEMP vs DIE TEMPERATURE APPROXIMATIONS
The LM26LV/LM26LV-Q1's VTEMP analog temperature output is very linear. The Conversion Table above and the
equation in the Section The Second-Order Equation (Parabolic) represent the most accurate typical performance
of the VTEMP voltage output vs Temperature.
The Second-Order Equation (Parabolic)
The data from the Conversion Table, or the equation below, when plotted, has an umbrella-shaped parabolic
curve. VTEMP is in mV.
GAIN1: VTEMP = 907.9 - 5.132 x (TDIE - 30°C) - 1.08e-3 x (T DIE - 30°C)
2
GAIN2: VTEMP = 1361.4 - 7.701 x (TDIE - 30°C) - 1.60e-3 x (T DIE - 30°C)
16
2
GAIN3: VTEMP = 1814.6 - 10.270 x (TDIE - 30°C) - 2.12e-3 x (T DIE - 30°C)
2
GAIN4: VTEMP = 2268.1 - 12.838 x (TDIE - 30°C) - 2.64e-3 x (T DIE - 30°C)
2
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The First-Order Approximation (Linear)
For a quicker approximation, although less accurate than the second-order, over the full operating temperature
range the linear formula below can be used. Using this formula, with the constant and slope in the following set
of equations, the best-fit VTEMP vs Die Temperature performance can be calculated with an approximation error
less than 18 mV. VTEMP is in mV.
GAIN1: VTEMP = 1060 - 5.18 x TDIE
GAIN2: VTEMP = 1590 - 7.77 x TDIE
GAIN3: VTEMP = 2119 - 10.36 x TDIE
GAIN4: VTEMP = 2649 - 12.94 x TDIE
(2)
First-Order Approximation (Linear) over Small Temperature Range
For a linear approximation, a line can easily be calculated over the desired temperature range from the
Conversion Table using the two-point equation:
V2 - V1 ·
u (T - T1)
V - V1 =
T2 - T1 ¹
(3)
·
¹
Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the
coordinates of the highest temperature.
For example, if we want to determine the equation of a line with Gain 4, over a temperature range of 20°C to
50°C, we would proceed as follows:
·
¹
V - 2396 mV =
2010 mV - 2396 mV·
x (T - 20°C)
50°C - 20°C
¹
(4)
V - 2396 mV = (-12.8 mV/°C) x (T - 20°C)
(5)
V = (-12.8 mV/°C) x (T-20°C) + 2396 mV
(6)
Using this method of linear approximation, the transfer function can be approximated for one or more
temperature ranges of interest.
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OVERTEMP and OVERTEMP Digital Outputs
The OVERTEMP Active High, Push-Pull Output and the OVERTEMP Active Low, Open-Drain Output both assert
at the same time whenever the Die Temperature reaches the factory preset Temperature Trip Point. They also
assert simultaneously whenever the TRIP TEST pin is set high. Both outputs de-assert when the die temperature
goes below the Temperature Trip Point - Hysteresis. These two types of digital outputs enable the user the
flexibility to choose the type of output that is most suitable for his design.
Either the OVERTEMP or the OVERTEMP Digital Output pins can be left open if not used.
OVERTEMP OPEN-DRAIN DIGITAL OUTPUT
The OVERTEMP Active Low, Open-Drain Digital Output, if used, requires a pull-up resistor between this pin and
VDD. The following section shows how to determine the pull-up resistor value.
Determining the Pull-up Resistor Value
VDD
iT
RPull-Up
VOUT
OVERTEMP
Digital Input
iL
isink
The Pull-up resistor value is calculated at the condition of maximum total current, iT, through the resistor. The
total current is:
iT = iL + isink
(7)
where,
iT
iT is the maximum total current through the Pull-up Resistor at VOL.
iL
iL is the load current, which is very low for typical digital inputs.
VOUT VOUT is the Voltage at the OVERTEMP pin. Use VOL for calculating the Pull-up resistor.
VDD(Max) VDD(Max) is the maximum power supply voltage to be used in the customer's system.
The pull-up resistor maximum value can be found by using the following formula:
Rpull-up = VDD (Max) ± VOL
iT
(8)
EXAMPLE CALCULATION
Suppose we have, for our example, a VDD of 3.3 V ± 0.3V, a CMOS digital input as a load, a VOL of 0.2 V.
1. We see that for VOL of 0.2 V the electrical specification for OVERTEMP shows a maximim isink of 385 µA.
2. Let iL= 1 µA, then iT is about 386 µA max. If we select 35 µA as the current limit then iT for the calculation
becomes 35 µA
3. We notice that VDD(Max) is 3.3V + 0.3V = 3.6V and then calculate the pull-up resistor as RPull-up = (3.6 −
0.2)/35 µA = 97k
4. Based on this calculated value, we select the closest resistor value in the tolerance family we are using.
In our example, if we are using 5% resistor values, then the next closest value is 100 kΩ.
18
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NOISE IMMUNITY
The LM26LV/LM26LV-Q1 is virtually immune from false triggers on the OVERTEMP and OVERTEMP digital
outputs due to noise on the power supply. Test have been conducted showing that, with the die temperature
within 0.5°C of the temperature trip point, and the severe test of a 3 Vpp square wave "noise" signal injected on
the VDD line, over the VDD range of 2V to 5V, there were no false triggers.
TRIP TEST Digital Input
The TRIP TEST pin simply provides a means to test the OVERTEMP and OVERTEMP digital outputs
electronically by causing them to assert, at any operating temperature, as a result of forcing the TRIP TEST pin
high.
When the TRIP TEST pin is pulled high the VTEMP pin will be at the VTRIP voltage.
If not used, the TRIP TEST pin may either be left open or grounded.
VTEMP Analog Temperature Sensor Output
The VTEMP push-pull output provides the ability to sink and source significant current. This is beneficial when, for
example, driving dynamic loads like an input stage on an analog-to-digital converter (ADC). In these applications
the source current is required to quickly charge the input capacitor of the ADC. See the Applications Circuits
section for more discussion of this topic. The LM26LV/LM26LV-Q1 is ideal for this and other applications which
require strong source or sink current.
NOISE CONSIDERATIONS
The LM26LV/LM26LV-Q1's supply-noise rejection (the ratio of the AC signal on VTEMP to the AC signal on VDD)
was measured during bench tests. It's typical attenuation is shown in the Typical Performance Characteristics
section. A load capacitor on the output can help to filter noise.
For operation in very noisy environments, some bypass capacitance should be present on the supply within
approximately 2 inches of the LM26LV/LM26LV-Q1.
CAPACITIVE LOADS
The VTEMP Output handles capacitive loading well. In an extremely noisy environment, or when driving a switched
sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any
precautions, the VTEMP can drive a capacitive load less than or equal to 1100 pF as shown in Figure 21. For
capacitive loads greater than 1100 pF, a series resistor is required on the output, as shown in Figure 22, to
maintain stable conditions.
VDD
LM26LV
OPTIONAL
BYPASS
CAPACITANCE
VTEMP
GND
CLOAD d 1100 pF
Figure 21. LM26LV/LM26LV-Q1 No Decoupling Required for Capacitive Loads Less than 1100pF.
VDD
LM26LV
OPTIONAL
BYPASS
CAPACITANCE
VTEMP
RS
GND
CLOAD >
1100 pF
Figure 22. LM26LV/LM26LV-Q1 with series resistor for capacitive loading greater than 1100pF
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CLOAD
Minimum RS
1.1 nF to 99 nF
3 kΩ
100 nF to 999 nF
1.5 kΩ
1 μF
800 Ω
VOLTAGE SHIFT
The LM26LV/LM26LV-Q1 is very linear over temperature and supply voltage range. Due to the intrinsic behavior
of an NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped
over the operating range of the device. The location of the shift is determined by the relative levels of VDD and
VTEMP. The shift typically occurs when VDD − VTEMP = 1.0V.
This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VTEMP. Since
the shift takes place over a wide temperature change of 5°C to 20°C, VTEMP is always monotonic. The accuracy
specifications in the Electrical Characteristics table already includes this possible shift.
Mounting and Temperature Conductivity
The LM26LV/LM26LV-Q1 can be applied easily in the same way as other integrated-circuit temperature sensors.
It can be glued or cemented to a surface.
The best thermal conductivity between the device and the PCB is achieved by soldering the DAP of the package
to the thermal pad on the PCB. The temperatures of the lands and traces to the other leads of the
LM26LV/LM26LV-Q1 will also affect the temperature reading.
Alternatively, the LM26LV/LM26LV-Q1 can be mounted inside a sealed-end metal tube, and can then be dipped
into a bath or screwed into a threaded hole in a tank. As with any IC, the LM26LV/LM26LV-Q1 and
accompanying wiring and circuits must be kept insulated and dry, to avoid leakage and corrosion. This is
especially true if the circuit may operate at cold temperatures where condensation can occur. If moisture creates
a short circuit from the VTEMP output to ground or VDD, the VTEMP output from the LM26LV/LM26LV-Q1 will not be
correct. Printed-circuit coatings are often used to ensure that moisture cannot corrode the leads or circuit traces.
The thermal resistance junction-to-ambient (θJA) is the parameter used to calculate the rise of a device junction
temperature due to its power dissipation. The equation used to calculate the rise in the LM26LV/LM26LV-Q1's
die temperature is
[
TJ = TA + TJA (VDDIQ) + (VDD - VTEMP) IL
]
(9)
where TA is the ambient temperature, IQ is the quiescent current, IL is the load current on the output, and VO is
the output voltage. For example, in an application where TA = 30 °C, VDD = 5 V, IDD = 9 μA, Gain 4, VTEMP = 2231
mV, and IL = 2 μA, the junction temperature would be 30.021 °C, showing a self-heating error of only 0.021°C.
Since the LM26LV/LM26LV-Q1's junction temperature is the actual temperature being measured, care should be
taken to minimize the load current that the VTEMP output is required to drive. If The OVERTEMP output is used
with a 100 k pull-up resistor, and this output is asserted (low), then for this example the additional contribution is
[(152° C/W)x(5V)2/100k] = 0.038°C for a total self-heating error of 0.059°C. Table 2 shows the thermal resistance
of the LM26LV/LM26LV-Q1.
Table 2. LM26LV/LM26LV-Q1 Thermal Resistance
20
Device Number
NS Package Number
Thermal Resistance (θJA)
LM26LVCSID/LM26LVQCISD
NGF0006A
152° C/W
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Applications Circuits
VDD
4
1
NC
5
Asserts when TDIE > TTRIP
6
LM26LV
OVERTEMP
NC
3
See text.
NC
2
GND
Figure 23. Temperature Switch Using Push-Pull Output
VDD
4
100k
1
NC
LM26LV
3
OVERTEMP
6
Asserts when TDIE > TTRIP
NC
See text.
5
NC
2
GND
Figure 24. Temperature Switch Using Open-Drain Output
SAR Analog-to-Digital Converter
Reset
+1.6V to +5.5V
LM26LV
6
4
VDD
Input
Pin
CBP
1
2
RIN
Sample
VTEMP
TRIP
TEST
OT
GND
OT
5
CFILTER
CPIN
CSAMPLE
3
Figure 25. Suggested Connection to a Sampling Analog-to-Digital Converter Input Stage
Most CMOS ADCs found in microcontrollers and ASICs have a sampled data comparator input structure. When
the ADC charges the sampling cap, it requires instantaneous charge from the output of the analog source such
as the LM26LV/LM26LV-Q1 temperature sensor and many op amps. This requirement is easily accommodated
by the addition of a capacitor (CFILTER). The size of CFILTER depends on the size of the sampling capacitor and the
sampling frequency. Since not all ADCs have identical input stages, the charge requirements will vary. This
general ADC application is shown as an example only.
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V+
VTEMP
R3
VT1
R4
VT2
4.1V
LM4040
VDD
VT
R1
U3
0.1 PF
(High = overtemp alarm)
+
U1
-
R2
VOUT
VOUT
VT1 =
(4.1)R2
R1 + R2||R3
VT2 =
(4.1)R2
R2 + R1||R3
VTEMP
LM26LV
U2
Figure 26. Celsius Temperature Switch
VDD
100k
4
TRIP TEST
3
1
6
LM26LV
OVERTEMP
NC
5
OVERTEMP
2
GND
Figure 27. TRIP TEST Digital Output Test Circuit
VDD
100k
4
TRIP TEST 1
RESET
Momentary
5
LM26LV
6
OVERTEMP
NC
3 OVERTEMP
2
GND
Figure 28. Latch Circuit using OVERTEMP Output
The TRIP TEST pin, normally used to check the operation of the OVERTEMP and OVERTEMP pins, may be
used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs
to assert. As shown in Figure 28, when OVERTEMP goes high the TRIP TEST input is also pulled high and
causes OVERTEMP output to latch high and the OVERTEMP output to latch low. The latch can be released by
either momentarily pulling the TRIP TEST pin low (GND), or by toggling the power supply to the device. The
resistor limits the current out of the OVERTEMP output pin.
22
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REVISION HISTORY
Changes from Revision E (February 2013) to Revision F
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 22
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PACKAGE OPTION ADDENDUM
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13-Sep-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM26LVCISD-050/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
050
LM26LVCISD-060/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
060
LM26LVCISD-065/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
065
LM26LVCISD-070/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
070
LM26LVCISD-075/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
075
LM26LVCISD-080/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
080
LM26LVCISD-085/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
085
LM26LVCISD-090/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
090
LM26LVCISD-095/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
095
LM26LVCISD-100/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
100
LM26LVCISD-105/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
105
LM26LVCISD-110/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
110
LM26LVCISD-115/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
115
LM26LVCISD-120/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
120
LM26LVCISD-125/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
125
LM26LVCISD-130/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
130
LM26LVCISD-135/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
135
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
13-Sep-2014
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM26LVCISD-140/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
140
LM26LVCISD-145/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
145
LM26LVCISD-150/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
150
LM26LVCISDX-050/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
050
LM26LVCISDX-060/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
060
LM26LVCISDX-065/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
065
LM26LVCISDX-070/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
070
LM26LVCISDX-075/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
075
LM26LVCISDX-080/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
080
LM26LVCISDX-085/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
085
LM26LVCISDX-090/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
090
LM26LVCISDX-095/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
095
LM26LVCISDX-100/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
100
LM26LVCISDX-105/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
105
LM26LVCISDX-110/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
110
LM26LVCISDX-115/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
115
LM26LVCISDX-120/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
120
LM26LVCISDX-125/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
125
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
13-Sep-2014
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM26LVCISDX-130/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
130
LM26LVCISDX-135/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
135
LM26LVCISDX-140/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
140
LM26LVCISDX-145/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
145
LM26LVCISDX-150/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 150
150
LM26LVQISD-130/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 150
Q30
LM26LVQISD-135/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 150
Q35
LM26LVQISDX-130/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 150
Q30
LM26LVQISDX-135/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 150
Q35
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
13-Sep-2014
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM26LV, LM26LV-Q1 :
• Catalog: LM26LV
• Automotive: LM26LV-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM26LVCISD-050/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-060/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-065/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-070/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-075/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-080/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-085/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-090/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-095/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-100/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-105/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-110/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-115/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-120/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-125/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-130/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-135/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-140/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Sep-2015
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM26LVCISD-145/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISD-150/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-050/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-060/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-065/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-070/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-075/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-080/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-085/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-090/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-095/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-100/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-105/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-110/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-115/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-120/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-125/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-130/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-135/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-140/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-145/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVCISDX-150/NOPB WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVQISD-130/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVQISD-135/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVQISDX-130/NOP
B
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LM26LVQISDX-135/NOP
B
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Sep-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM26LVCISD-050/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-060/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-065/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-070/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-075/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-080/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-085/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-090/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-095/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-100/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-105/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-110/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-115/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-120/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-125/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-130/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-135/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-140/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-145/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVCISD-150/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Sep-2015
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM26LVCISDX-050/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-060/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-065/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-070/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-075/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-080/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-085/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-090/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-095/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-100/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-105/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-110/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-115/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-120/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-125/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-130/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-135/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-140/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-145/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVCISDX-150/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVQISD-130/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVQISD-135/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LM26LVQISDX-130/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LM26LVQISDX-135/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
Pack Materials-Page 4
MECHANICAL DATA
NGF0006A
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