FDC6506P Dual P-Channel Logic Level PowerTrench MOSFET General Description Features These P-Channel logic level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. • These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. Applications • Load switch • Battery protection • Power management -1.8 A, -30 V. RDS(on) = 0.170 Ω @ VGS = -10 V RDS(on) = 0.280 Ω @ VGS = -4.5 V • Low gate charge (2.3nC typical). • Fast switching speed. • High performance trench technology for extremely low RDS(ON). • SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick). D2 S1 4 3 5 2 6 1 D1 G2 SuperSOT TM -6 S2 G1 Absolute Maximum Ratings Symbol TA = 25°C unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage -30 V VGSS Gate-Source Voltage V ID Drain Current (Note 1a) ±20 -1.8 -10 A PD Power Dissipation for Single Operation (Note 1a) 0.96 W (Note 1b) 0.9 - Continuous - Pulsed (Note 1c) TJ, Tstg Operating and Storage Junction Temperature Range 0.7 -55 to +150 °C °C/W °C/W Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient (Note 1a) 130 Thermal Resistance, Junction-to-Case (Note 1) 60 Package Outlines and Ordering Information Device Marking .506 1999 Fairchild Semiconductor Corporation Device Reel Size Tape Width Quantity FDC6506P 7’’ 8mm 3000 units FDC6506P Rev. C FDC6506P February 1999 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min VGS = 0 V, ID = -250 µA ID = -250 µA, Referenced to 25°C -30 Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 µA nA IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -100 nA On Characteristics V mV/°C -20 (Note 2) VDS = VGS, ID = -250 µA ID = -250 µA, Referenced to 25°C VGS(th) Gate Threshold Voltage ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance -1 -1.8 -3 ID(on) On-State Drain Current VGS = -10 V, ID = -1.8 A VGS = -10 V, ID = -1.8 A @125°C VGS = -4.5 V, ID = -1.4 A VGS = -10 V, VDS = - 5 V gFS Forward Transconductance VDS = -5 V, ID = -1.8 A 3 VDS = -15 V, VGS = 0 V, f = 1.0 MHz 190 pF 70 pF 30 pF 0.14 0.20 0.22 V mV/°C 4 0.17 0.27 0.28 -10 Ω A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) tf Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge (Note 2) VDD = -15 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 Ω 7 14 ns 8 16 ns Turn-Off Delay Time 14 25 ns Turn-Off Fall Time 2 6 ns 2.3 3.5 nC VDS = -5 V, ID = -1.8 A, VGS = -10 V 1 nC 0.8 nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.8 A (Note 2) -0.8 -0.8 A -1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.Both devices are assumed to be operating and sharing the dissipated heat energy equally. a) 130 °C/W when mounted on a 0.125 in2 pad of 2 oz. copper. b) 140 °C/W when mounted on a 0.005 in2 pad of 2 oz. copper. c) 180 °C/W when mounted on a 0.0015 in2 pad of 2 oz. copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDC6506P Rev. C FDC6506P Electrical Characteristics FDC6506P Typical Characteristics 10 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.5 -ID, DRAIN CURRENT (A) VGS=-10V 8 -7.0V -5.5V 6 -4.5V -4.0V 4 -3.5V 2 -3.0V 2 VGS=-4.0V -4.5V 1.5 -5.0V -6.0V -7.0V -10V 1 0.5 0 0 1 2 3 4 0 5 2 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 10 0.5 1.4 ID=-1.8A VGS=-10V 1.3 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 8 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Figure 1. On-Region Characteristics. 1.2 1.1 1 0.9 0.8 ID=-1.0A 0.4 0.3 o TJ=125 C 0.2 o 25 C 0.1 0.7 -50 -25 0 25 50 75 100 125 2 150 3 4 5 6 7 8 9 10 -V GS, GATE TO SOURCE VOLTAGE (V) o TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 4 -IS, REVERSE DRAIN CURRENT (A) 10 VDS=-5V -ID, DRAIN CURRENT (A) 6 -ID, DRAIN CURRENT (A) o TJ=-55 C o 25 C 3 125 o 2 1 VGS=0 1 o TJ=125 C o 25 C 0.1 o -55 C 0.01 0.001 0 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.3 0.6 0.9 1.2 1.5 -VSD, BODY DIODE VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6506P Rev. C (continued) 300 -VGS, GATE-SOURCE VOLTAGE (V) 10 f=1MHz VGS=0V ID= -1.8A VDS=-5.0V 240 CAPACITANCE (pF) 8 -10V 6 -15V 4 Ciss 180 120 2 60 0 0 Coss Crss 0 1 2 3 0 4 6 Figure 7. Gate-Charge Characteristics. RD N S(O )L T IMI 30 1m s 10m s 10 0m s 1s DC 1 0.3 VGS = -10V SINGLE PULSE R θJA = 180°C/W T A = 25°C 0.01 0.1 0.2 SINGLE PULSE RθJA =180°C/W TA = 25°C 4 POWER (W) 3 D 24 5 100 us 10 0.03 18 Figure 8. Capacitance Characteristics. 30 0.1 12 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 3 2 1 0.5 1 2 5 10 20 0 0.01 50 0.1 -VDS , DRAIN-SOURCE VOLTAGE (V) r(t), NORMALIZED EFFECTIVE 1 10 100 300 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. TRANSIENT THERMAL RESISTANCE -I , DRAIN CURRENT (A) FDC6506P Typical Characteristics Figure 10. Single Pulse Maximum Power Dissipation. 1 0.5 D = 0.5 0.2 0.2 0.1 R θJA (t) = r(t) * R θJA R θJA =180°C/W 0.1 P(pk) 0.05 t1 0.05 0.02 0.01 0.02 0.01 0.0001 t2 TJ - T A = P * R JA (t) θ Duty Cycle, D = t 1 / t 2 Single Pulse 0.001 0.01 0.1 1 10 100 300 t 1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. FDC6506P Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions SSOT-6 Packaging Configuration: Figure 1.0 Customize Label Antistatic Cover Tape Conductive Embossed Carrier Tape F63TNR Label 631 Packaging Option Packaging type Standard (no flow code) TNR Qty per Reel/Tube/Bag 3,000 Reel Size 631 631 D87Z SSOT-6 Unit Orientation TNR 10,000 7” Dia 13” 184x187x47 343x343x64 Max qty per Box 9,000 20,000 Weight per unit (gm) 0.0158 0.0158 Weight per Reel (kg) 0.1440 0.4700 Box Dimension (mm) 631 Pin 1 SSOT-6 Packaging Information 343mm x 342mm x 64mm Intermediate box for D87Z Option F63TNR Label Note/Comments F63TNR Label F63TNR Label sample 184mm x 184mm x 47mm Pizza Box for Standard Option F63TNR Label LOT: CBVK741B019 QTY: 3000 FSID: FDC633N SPEC: D/C1: D9842 D/C2: Trailer SSOT-6 Tape Leader Configuration: Figure 2.0 QTY1: QTY2: SPEC REV: CPN: QARV: (F63TNR)2 Carrier Tape Cover Tape 1998 Fairchild Semiconductor Corporation Trailer Tape 160mm minimum Components Leader Tape 390mm minimum December 1998, Rev. B SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type A0 B0 SSOT-6 (8mm) 3.23 +/-0.10 3.18 +/-0.10 W 8.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.00 +/-0.125 1.75 +/-0.10 F 6.25 min 3.50 +/-0.05 P1 P0 4.0 +/-0.1 4.0 +/-0.1 K0 T 1.37 +/-0.10 0.255 +/-0.150 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). Wc 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 5.2 +/-0.3 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SSOT-6 Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7” Diameter Option B Min Dim C See detail AA W3 13” Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 – 0.429 7.9 – 10.9 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 – 0.429 7.9 – 10.9 8mm 7” Dia 7.00 177.8 8mm 13” Dia 13.00 330 Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL) December 1998, Rev. B SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SuperSOT-6 (FS PKG Code 31, 33) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0158 1998 Fairchild Semiconductor Corporation September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.