NCP130 300mA, Very Low Dropout Bias Rail CMOS Voltage Regulator The NCP130 is a 300 mA VLDO equipped with NMOS pass transistor and a separate bias supply voltage (VBIAS). The device provides very stable, accurate output voltage with low noise suitable for space constrained, noise sensitive applications. In order to optimize performance for battery operated portable applications, the NCP130 features low IQ consumption. The XDFN6 1.2 mm x 1.2 mm package is optimized for use in space constrained applications. www.onsemi.com T MARKING DIAGRAM XDFN6 CASE 711AT XM Features • • • • • • • • • • • • • Input Voltage Range: 0.8 V to 5.5 V Bias Voltage Range: 2.4 V to 5.5 V Fixed Output Voltage Device Output Voltage Range: 0.8 V to 2.1 V ±1.5% Accuracy over Temperature, 0.5% VOUT @ 25°C Ultra−Low Dropout: 150 mV Maximum at 300 mA Very Low Bias Input Current of Typ. 80 mA Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA Logic Level Enable Input for ON/OFF control Output Active Discharge Option available Stable with a 1 mF Ceramic Capacitor Available in XDFN6 − 1.2 mm x 1.2 mm x 0.4 mm package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant X M = Specific Device Code = Date Code PIN CONNECTIONS OUT 1 NC 2 EN 3 6 Thermal Pad IN 5 GND 4 BIAS (Top VIew) Typical Applications • Battery−powered Equipment • Smartphones, Tablets • Cameras, DVRs, STB and Camcorders ORDERING INFORMATION See detailed ordering and shipping information on page 8 of this data sheet. VBIAS 2.7 V NCP130 100 nF BIAS VIN 1.3 V OUT IN 1 mF VOUT 1.0 V @ 300 mA 1 mF EN GND VEN Figure 1. Typical Application Schematics © Semiconductor Components Industries, LLC, 2015 February, 2015 − Rev. 1 1 Publication Order Number: NCP130/D NCP130 CURRENT LIMIT IN OUT ENABLE BLOCK EN UVLO BIAS 150 W VOLTAGE REFERENCE + − THERMAL LIMIT *Active DISCHARGE GND *Active output discharge function is present only in NCP130AMXyyyTCG devices. yyy denotes the particular output voltage option. Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. Pin Name 1 OUT Regulated Output Voltage pin 2 N/C Not internally connected 3 EN Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. 4 BIAS Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage Lockout Circuit. 5 GND Ground pin 6 IN Pad Description Input Voltage Supply pin Should be soldered to the ground plane for increased thermal performance. ABSOLUTE MAXIMUM RATINGS Rating Input Voltage (Note 1) Output Voltage Chip Enable and Bias Input Symbol Value Unit VIN −0.3 to 6 V VOUT −0.3 to (VIN+0.3) ≤ 6 V VEN, VBIAS −0.3 to 6 V Output Short Circuit Duration tSC unlimited s Maximum Junction Temperature TJ 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22−A114 ESD Machine Model tested per EIA/JESD22−A115 Latchup Current Maximum Rating tested per JEDEC standard: JESD78. THERMAL CHARACTERISTICS Rating Thermal Characteristics, XDFN6 1.2 mm x 1.2 mm Thermal Resistance, Junction−to−Air www.onsemi.com 2 Symbol Value Unit RqJA 170 °C/W NCP130 ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, unless otherwise noted. CIN = 1 mF, CBIAS = 0.1 mF, COUT = 1 mF (effective capacitance) (Note 3). Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Note 4) Parameter Test Conditions Symbol Min VIN Operating Bias Voltage Range VBIAS Undervoltage Lock−out VBIAS Rising Hysteresis UVLO Operating Input Voltage Range Output Voltage Accuracy −40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V, 2.7 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V, 1 mA < IOUT < 300 mA VOUT Output Voltage Accuracy Typ Max Unit VOUT+VDO 5.5 V (VOUT+1.35) ≥2.4 5.5 V 1.6 0.2 −1.5 V +1.5 % VOUT ±0.5 % VIN Line Regulation VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V LineReg 0.01 %/V VBIAS Line Regulation 2.7 V or (VOUT(NOM) + 1.6 V), whichever is greater < VBIAS < 5.5 V LineReg 0.01 %/V Load Regulation IOUT = 1 mA to 300 mA LoadReg 1.5 mV VIN Dropout Voltage IOUT = 300 mA (Note 5) VDO 75 150 mV VBIAS Dropout Voltage IOUT = 300 mA, VIN = VBIAS (Note 5) VDO 1.1 1.4 V Output Current Limit VOUT = 90% VOUT(NOM) ICL 550 850 mA Bias Pin Operating Current VBIAS = 2.7 V IBIAS 80 110 mA Bias Pin Disable Current VEN ≤ 0.4 V IBIAS(DIS) 0.5 1 mA Vinput Pin Disable Current VEN ≤ 0.4 V IVIN(DIS) 0.5 1 mA EN Pin Threshold Voltage EN Input Voltage “H” VEN(H) EN Input Voltage “L” VEN(L) EN Pull Down Current VEN = 5.5 V IEN 0.3 Turn−On Time COUT = 1 mF, From assertion of VEN to VOUT = 98% VOUT(NOM), VOUT(NOM) = 1.05 V tON 150 ms Power Supply Rejection Ratio VIN to VOUT, f = 1 kHz, IOUT = 300 mA, VIN ≥ VOUT +0.5 V PSRR(VIN) 65 dB VBIAS to VOUT, f = 1 kHz, IOUT = 300 mA, VIN ≥ VOUT +0.5 V PSRR(VBIAS) 80 dB Output Noise Voltage VIN = VOUT +0.5 V, VOUT(NOM) = 1.05 V, f = 10 Hz to 100 kHz VN 40 mVRMS Thermal Shutdown Threshold Temperature increasing 160 °C Temperature decreasing 140 Output Discharge Pull−Down VEN ≤ 0.4 V, VOUT = 0.5 V, NCP130A options only RDISCH 400 V 0.9 0.4 150 1.0 mA W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more information. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM). www.onsemi.com 3 NCP130 APPLICATIONS INFORMATION 2.6 . V − 4.2 V VBAT NCP130 EN DC/DC 1.3 V VOUT(NOM) LX IN EN Processor BIAS 1.3 V OUT 1.0 V IN LOAD GND FB GND I/O I/O To other circuits Figure 3. Typical Application: Low−Voltage Post−Regulator with ON/OFF functionality www.onsemi.com 4 NCP130 TYPICAL CHARACTERISTICS 100 VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.05 V, IOUT = 300 mA, CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 1 mF (effective capacitance), unless otherwise noted. +125°C 90 80 +85°C 70 60 +25°C 50 −40°C 40 30 20 10 0 0 50 150 100 250 200 300 IOUT, OUTPUT CURRENT (mA) 300 IOUT = 300 mA 250 200 150 +125°C +85°C +25°C 100 50 0 0.5 VDO (VBIAS − VOUT) DROPOUT VOLTAGE (mV) VDO (VIN − VOUT) DROPOUT VOLTAGE (mV) IOUT = 100 mA 160 140 120 100 +125°C +85°C 60 +25°C −40°C 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Figure 5. VIN Dropout Voltage vs. (VBIAS − VOUT) and Temperature TJ 200 80 1.0 VBIAS − VOUT (V) Figure 4. VIN Dropout Voltage vs. IOUT and Temperature TJ 180 −40°C 4.5 VBIAS − VOUT (V) 1400 1300 −40°C +25°C 1200 1100 +85°C 1000 +125°C 900 800 0 50 100 200 150 250 300 IOUT, OUTPUT CURRENT (mA) Figure 6. VIN Dropout Voltage vs. (VBIAS − VOUT) and Temperature TJ Figure 7. VBIAS Dropout Voltage vs. IOUT and Temperature TJ 140 200 180 120 160 +125°C +85°C 140 IBIAS (mA) IBIAS (mA) 100 80 60 −40°C +25°C 120 +125°C +85°C 100 80 60 40 40 20 20 0 2.0 0 0 50 100 150 200 250 300 +25°C −40°C 2.5 3.0 3.5 4.0 4.5 5.0 IOUT, OUTPUT CURRENT (mA) VBIAS (V) Figure 8. BIAS Pin Current vs. IOUT and Temperature TJ Figure 9. BIAS Pin Current vs. VBIAS and Temperature TJ www.onsemi.com 5 5.5 NCP130 TYPICAL CHARACTERISTICS At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.05 V, IOUT = 300 mA, CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 1 mF (effective capacitance), unless otherwise noted. 800 ICL, CURRENT LIMIT (mA) 700 +125°C 600 +85°C +25°C 500 −40°C 400 300 200 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VBIAS − VOUT (V) Figure 10. Current Limit vs. (VBIAS − VOUT) www.onsemi.com 6 5.0 NCP130 APPLICATIONS INFORMATION In applications where no low input supplies impedance available (PCB inductance in VIN and/or VBIAS inputs as example), the recommended CIN = 1 mF and CBIAS = 0.1 mF or greater. Ceramic capacitors are recommended. For the best performance all the capacitors should be connected to the NCP130 respective pins directly in the device PCB copper layer, not through vias having not negligible impedance. When using small ceramic capacitor, their capacitance is not constant but varies with applied DC biasing voltage, temperature and tolerance. The effective capacitance can be much lower than their nominal capacitance value, most importantly in negative temperatures and higher LDO output voltages. That is why the recommended Output capacitor capacitance value is specified as Effective value in the specific application conditions. The NCP130 dual−rail very low dropout voltage regulator is using NMOS pass transistor for output voltage regulation from VIN voltage. All the low current internal controll circuitry is powered from the VBIAS voltage. The use of an NMOS pass transistor offers several advantages in applications. Unlike a PMOS topology devices, the output capacitor has reduced impact on loop stability. VIN to VOUT operating voltage difference can be very low compared with standard PMOS regulators in very low VIN applications. The NCP130 offers smooth monotonic start-up. The controlled voltage rising limits the inrush current. The Enable (EN) input is equipped with internal hysteresis. NCP130 is a Fixed Voltage linear regulator. Dropout Voltage Because of two power supply inputs VIN and VBIAS and one VOUT regulator output, there are two Dropout voltages specified. The first, the VIN Dropout voltage is the voltage difference (VIN – VOUT) when VOUT starts to decrease by percents specified in the Electrical Characteristics table. VBIAS is high enough, specific value is published in the Electrical Characteristics table. The second, VBIAS dropout voltage is the voltage difference (VBIAS – VOUT) when VIN and VBIAS pins are joined together and VOUT starts to decrease. Enable Operation The enable pin will turn the regulator on or off. The threshold limits are covered in the electrical characteristics table in this data sheet. If the enable function is not to be used then the pin should be connected to VIN or VBIAS. Current Limitation The internal Current Limitation circuitry allows the device to supply the full nominal current and surges but protects the device against Current Overload or Short. Thermal Protection Internal thermal shutdown (TSD) circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When TSD activated , the regulator output turns off. When cooling down under the low temperature threshold, device output is activated again. This TSD feature is provided to prevent failures from accidental overheating. Input and Output Capacitors The device is designed to be stable for ceramic output capacitors with Effective capacitance in the range from 1 mF to 10 mF. The device is also stable with multiple capacitors in parallel, having the total effective capacitance in the specified range. www.onsemi.com 7 NCP130 ORDERING INFORMATION Nominal Output Voltage Marking Marking Rotation NCP130AMX080TCG 0.80 V Q 180° NCP130AMX105TCG 1.05 V R 180° NCP130AMX110TCG 1.10 V T 180° NCP130AMX115TCG 1.15 V V 180° NCP130AMX120TCG 1.20 V Y 180° NCP130AMX150TCG 1.50 V 2 180° NCP130AMX180TCG 1.80 V 3 180° NCP130AMX210TCG 2.10 V 4 180° NCP130BMX080TCG 0.80 V Q 270° NCP130BMX105TCG 1.05 V R 270° NCP130BMX110TCG 1.10 V T 270° NCP130BMX115TCG 1.15 V V 270° NCP130BMX120TCG 1.20 V Y 270° NCP130BMX150TCG 1.50 V 2 270° NCP130BMX180TCG 1.80 V 3 270° NCP130BMX210TCG 2.10 V 4 270° Device Option Package Shipping† XDFN6 (Pb−Free) 3000 / Tape & Reel Output Active Discharge Non−Active Discharge †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. To order other package and voltage variants, please contact your ON sales representative www.onsemi.com 8 NCP130 PACKAGE DIMENSIONS XDFN6 1.20x1.20, 0.40P CASE 711AT ISSUE O D PIN ONE REFERENCE A B ÍÍÍ ÍÍÍ ÍÍÍ NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25mm FROM TERMINAL TIPS. 4. COPLANARITY APPLIES TO THE PAD AS WELL AS THE TERMINALS. L DETAIL A OPTIONAL CONSTRUCTION E DIM A A1 b D D2 E E2 e L L1 0.05 C 2X 0.05 C 2X A DETAIL B 0.05 C ÉÉÉ ÇÇÇ EXPOSED Cu TOP VIEW MOLD CMPD DETAIL B OPTIONAL CONSTRUCTION A1 0.05 C NOTE 4 C SIDE VIEW 6X 1 RECOMMENDED MOUNTING FOOTPRINT* SEATING PLANE 1.08 PACKAGE OUTLINE D2 DETAIL A 3 6X 0.35 L1 E2 6X MILLIMETERS MIN MAX 0.30 0.45 0.00 0.05 0.13 0.23 1.20 BSC 0.84 1.04 1.20 BSC 0.20 0.40 0.40 BSC 0.15 0.25 0.05 REF 1.40 L 0.40 6 1 0.40 PITCH 4 6X e b 6X 0.24 DIMENSIONS: MILLIMETERS 0.10 BOTTOM VIEW M C A B *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP130/D