LINER LTC2846 3.3v software-selectable multiprotocol transceiver with termination Datasheet

LTC2846
3.3V Software-Selectable
Multiprotocol Transceiver
with Termination
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FEATURES
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DESCRIPTIO
The LTC®2846 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with
the LTC2844 or LTC2845, this chip set forms a complete
software-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. All necessary cable termination is provided inside
the LTC2846. The LTC2846 has a boost regulator that takes
in a 3.3V input and switches at 1.2MHz, allowing the use of
tiny, low cost capacitors and inductors 2mm or less in height.
The 5V output drives an internal charge pump that requires
only five space-saving surface mounted capacitors. The
LTC2846 is available in a 36-lead SSOP surface mount
package.
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
Operates from Single 3.3V Supply
TUV Rheinland of North America Inc. Certified NET1,
NET2 and TBR2 Compliant, Report No.:
TBR2/050101/02, TBR2/051501/02
1.2MHz Boost Switching Regulator for 3.3V to 5V
Conversion
On-Chip Cable Termination
Complete DTE or DCE Port with LTC2844 or LTC2845
Small Footprint
Available in 36-Lead SSOP (0.209 Wide) Package
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APPLICATIO S
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, LTC and LT are registered trademarks of Linear Technology Corporation.
Data Networking
CSU and DSU
Data Routers
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TYPICAL APPLICATIO
Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
CTS
DSR
DCD
DTR
RTS
D2
D1
RXD
TXC
D3
R4
18
R3
R2
13 5
22 6
TXD
D3
D2
D1
T
T
T
12
15 11
24 14
LTC2846
LTC2844
D4
SCTE
RXC
R1
10 8
23 20 19 4
1
7
R3
R2
T
T
16
3
9
R1
17
2
TXD A (103)
TXD B
SCTE A (113)
SCTE B
TXC A (114)
TXC B
RXC A (115)
RXC B
RXD A (104)
RXD B
SG (102)
SHIELD (101)
RTS A (105)
RTS B
DTR A (108)
DCD A (109)
DTR B
DCD B
DSR A (107)
CTS A (106)
DSR B
CTS B
LL A (141)
DB-25 CONNECTOR
2846 TA01
sn2846 2846fs
1
LTC2846
W W
W
AXI U
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ABSOLUTE
RATI GS
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U
W
PACKAGE/ORDER I FOR ATIO
(Note 1)
VCC Voltage.............................................. – 0.3V to 6.5V
VIN Voltage .............................................. – 0.3V to 6.5V
Input Voltage
Transmitters ........................... – 0.3V to (VCC + 0.3V)
Receivers ............................................... – 18V to 18V
Logic Pins .............................. – 0.3V to (VCC + 0.3V)
Output Voltage
Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers ................................. – 0.3V to (VIN + 0.3V)
VEE ........................................................ – 10V to 0.3V
VDD ....................................................... – 0.3V to 10V
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
VEE .................................................................. 30 sec
SW Voltage ............................................... – 0.4V to 36V
FB Voltage ............................................... – 0.3V to 2.5V
Current into FB Pin .............................................. ±1mA
SHDN Voltage ........................................... – 0.3V to 10V
Operating Temperature Range
LTC2846C ............................................... 0°C to 70°C
LTC2846I ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
NC
36 SW
1
BOOST
SWITCHING
REGULATOR
35 FB
PGND
2
VIN
3
SHDN
4
33 C2 +
C1–
5
32 C2 –
+
6
C1
VDD
7
VCC
8
D1
9
31 VEE
CHARGE PUMP
R1 12
30 GND
29 D1 A
28 D1 B
D1
T
D2
T
D2 10
D3 11
34 SGND
27 D2 A
26 D2 B
25 D3/R1 A
D3
T
24 D3/R1 B
R2 13
R3 14
23 R2 A
R1
T
22 R2 B
M0 15
M1 16
LTC2846CG
LTC2846IG
R2
21 R3 A
T
VIN 17
20 R3 B
R3
19 DCE/DTE
M2 18
G PACKAGE
36-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 90°C/W, θJC = 35°C/W
*θJA SOLDERED TO A CIRCUIT BOARD IS TYPICALLY 60°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, VSHDN = VIN, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
VCC Supply Current (DCE Mode,
All Digital Pins = GND or VIN)
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
MIN
TYP
MAX
UNITS
Supplies
ICC
PD
Internal Power Dissipation (DCE Mode)
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode, Full Load
V.28 Mode, Full Load
V+
Positive Charge Pump Output Voltage
V.11 or V.28 Mode, No Load
V.35 Mode
V.28 Mode, with Load
V.28 Mode, with Load, IDD = 10mA
14
100
126
20
35
300
●
●
●
●
●
●
●
8
7
8
130
170
75
900
mA
mA
mA
mA
mA
µA
550
775
200
mW
mW
mW
9.3
8.0
8.7
6.5
V
V
V
V
sn2846 2846fs
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LTC2846
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, VSHDN = VIN, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
V–
Negative Charge Pump Output Voltage
V.28 Mode, No Load
V.28 Mode, Full Load
V.35 Mode
RS530, RS530-A, X.21 Modes, Full Load
fOSC
Charge Pump Oscillator Frequency
tr
Charge Pump Rise Time
●
●
●
MIN
TYP
– 7.5
– 5.5
– 4.5
– 9.6
– 8.5
– 6.5
– 6.0
V
V
V
V
500
kHz
2
ms
No-Cable Mode/Power-Off to Normal Operation
MAX
UNITS
Logic Inputs and Outputs
VIH
Logic Input High Voltage
D1, D2, D3, M0, M1, M2, DCE/DTE
SHDN
●
VIL
Logic Input Low Voltage
D1, D2, D3, M0, M1, M2, DCE/DTE
SHDN
●
IIN
Logic Input Current
D1, D2, D3
M0, M1, M2, DCE/DTE = GND
M0, M1, M2, DCE/DTE = VIN
SHDN = GND
SHDN = 3V
●
●
●
2.0
2.4
– 30
V
V
– 75
16
VOH
Output High Voltage
IO = – 3mA
●
VOL
Output Low Voltage
IO = 1.6mA
●
IOSR
Output Short-Circuit Current
0V ≤ VO ≤ VIN
●
IOZR
Three-State Output Current
M0 = M1 = M2 = VIN, VO = GND
M0 = M1 = M2 = VIN, VO = VIN
●
●
VODO
Open Circuit Differential Output Voltage
RL = 1.95k (Figure 1)
●
VODL
Loaded Differential Output Voltage
RL = 50Ω (Figure 1)
RL = 50Ω (Figure 1)
●
2.7
V
V
±10
– 120
±10
±0.1
32
µA
µA
µA
µA
µA
3
0.2
–30
0.8
0.5
–85
V
0.4
V
±50
mA
–160
±10
µA
µA
±5
V
0.67VODO
V
V
0.2
V
V.11 Driver
0.5VODO
±2
∆VOD
Change in Magnitude of Differential
Output Voltage
RL = 50Ω (Figure 1)
●
VOC
Common Mode Output Voltage
RL = 50Ω (Figure 1)
●
3
V
∆VOC
Change in Magnitude of Common Mode
Output Voltage
RL = 50Ω (Figure 1)
●
0.2
V
ISS
Short-Circuit Current
VOUT = GND
IOZ
Output Leakage Current
VA and VB ≤ 0.25V, Power Off or
±1
●
±150
mA
±100
µA
No-Cable Mode or Driver Disabled
t r, t f
Rise or Fall Time
(Figures 2, 13)
●
2
15
25
ns
t PLH
Input to Output Rising
(Figures 2, 13)
●
15
40
65
ns
t PHL
Input to Output Falling
(Figures 2, 13)
●
15
40
65
ns
∆t
Input to Output Difference, tPLH – tPHL
(Figures 2, 13)
●
0
3
12
ns
t SKEW
Output to Output Skew
(Figures 2, 13)
3
ns
sn2846 2846fs
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LTC2846
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, VSHDN = VIN, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.2
V
40
mV
V.11 Receiver
VTH
Input Threshold Voltage
– 7V ≤ VCM ≤ 7V
●
∆VTH
Input Hysteresis
– 7V ≤ VCM ≤ 7V
●
RIN
Input Impedance
–7V ≤ VCM ≤ 7V (Figure 3)
●
t r, t f
Rise or Fall Time
CL = 50pF (Figures 4, 14)
t PLH
Input to Output Rising
CL = 50pF (Figures 4, 14)
●
50
90
ns
t PHL
Input to Output Falling
CL = 50pF (Figures 4, 14)
●
50
90
ns
∆t
Input to Output Difference, tPLH – tPHL
CL = 50pF (Figures 4, 14)
●
0
4
25
ns
VOD
Differential Output Voltage
Open Circuit, RL = 1.95k (Figure 5)
With Load, – 4V ≤ VCM ≤ 4V (Figure 6)
●
±0.44
±0.55
±1.2
±0.66
V
V
VOA, VOB
Single-Ended Output Voltage
Open Circuit, RL = 1.95k (Figure 5)
●
±1.2
V
VOC
Transmitter Output Offset
RL = 50Ω (Figure 5)
●
±0.6
V
IOH
Transmitter Output High Current
VA, VB = 0V
●
–9
– 13
mA
IOL
Transmitter Output Low Current
VA, VB = 0V
●
9
IOZ
Transmitter Output Leakage Current
VA and VB ≤ 0.25V
●
ROD
Transmitter Differential Mode Impedance
ROC
Transmitter Common Mode Impedance
– 2V ≤ VCM ≤ 2V (Figure 7)
t r , tf
t PLH
Rise or Fall Time
(Figures 8, 13)
Input to Output
(Figures 8, 13)
●
15
35
65
ns
15
35
65
ns
0
16
ns
– 0.2
15
100
103
Ω
15
ns
V.35 Driver
●
– 11
11
13
mA
±1
±100
µA
50
100
150
Ω
135
150
165
5
t PHL
Input to Output
(Figures 8, 13)
●
∆t
Input to Output Difference, tPLH – tPHL
(Figures 8, 13)
●
t SKEW
Output to Output Skew
(Figures 8, 13)
Ω
ns
4
ns
V.35 Receiver
VTH
Differential Receiver Input Threshold Voltage
– 2V ≤ VCM ≤ 2V (Figure 9)
●
∆VTH
Receiver Input Hysteresis
– 2V ≤ VCM ≤ 2V (Figure 9)
●
RID
Receiver Differential Mode Impedance
– 2V ≤ VCM ≤ 2V
●
RIC
Receiver Common Mode Impedance
– 2V ≤ VCM ≤ 2V (Figure 10)
t r, t f
Rise or Fall Time
CL = 50pF (Figures 4, 14)
tPLH
Input to Output
CL = 50pF (Figures 4, 14)
●
50
90
ns
tPHL
Input to Output
CL = 50pF (Figures 4, 14)
●
50
90
ns
∆t
Input to Output Difference, tPLH – tPHL
CL = 50pF (Figures 4, 14)
●
0
4
25
ns
VO
Output Voltage
Open Circuit
RL = 3k (Figure 11)
●
●
±5
±8.5
±10
V
V
ISS
Short-Circuit Current
VOUT = GND
●
±150
mA
ROZ
Power-Off Resistance
– 2V < VO < 2V, Power Off
or No-Cable Mode
●
300
SR
Slew Rate
RL = 7k, CL = 0 (Figures 11, 15)
●
4
30
V/µs
t PLH
Input to Output
RL = 3k, CL = 2500pF (Figures 11, 15)
●
1.5
2.5
µs
t PHL
Input to Output
RL = 3k, CL = 2500pF (Figures 11, 15)
●
1.5
2.5
µs
– 0.2
0.2
V
15
40
mV
90
103
110
Ω
135
150
165
Ω
15
ns
V.28 Driver
Ω
sn2846 2846fs
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LTC2846
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VIN = 3.3V, VSHDN = VIN, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
V.28 Receiver
VTHL
Input Low Threshold Voltage
VTLH
Input High Threshold Voltage
∆VTH
Receiver Input Hysteresis
RIN
Receiver Input Impedance
t r , tf
Rise or Fall Time
tPLH
Input to Output
tPHL
Input to Output
Boost Switching Regulator (Note 4)
VIN
Operating Voltage
VFB
Feedback Voltage
IFB
FB Pin Bias Current
IQ
Quiescent Current
Quiescent Current in Shutdown
∆VFB(LR)
Reference Line Regulation
f
Switching Frequency
DCMAX
Maximum Duty Cycle
ILIM
Switch Current Limit
VSAT
Switch VCESAT
ILEAK
Switch Leakage Current
CONDITIONS
MIN
(Figure 12)
(Figure 12)
(Figure 12)
– 15V ≤ VA ≤ 15V
CL = 50pF (Figures 12, 16)
CL = 50pF (Figures 12, 16)
CL = 50pF (Figures 12, 16)
●
2
0
3
●
●
●
●
●
3
1.230
●
VFB = 1.255V
VSHDN = 2.4V, Not Switching
VSHDN = 0V, VIN = 3V
3V ≤ VIN ≤ 3.6V
●
0.85
82
1
●
●
(Note 5)
ISW = 900mA
VSW = 5V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
TYP
0.05
5
15
60
160
3.3
1.255
120
4.2
0.01
0.01
1.2
90
1.2
350
0.01
MAX
UNITS
0.8
V
V
V
kΩ
ns
ns
ns
0.3
7
300
300
3.6
1.280
360
6
1
0.05
1.6
V
V
nA
mA
µA
%/V
MHz
%
A
mV
µA
2
1
Note 3: All typicals are given for VCC = 5V, VIN = 3.3V, CVCC = CVIN = 10µF,
CVDD = 1µF, CVEE = 3.3µF and TA = 25°C.
Note 4: The Boost Regulator is specified for VIN = 3V unless otherwise
noted.
Note 5: Current limit guaranteed by design and/or correlation to static test.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
V.11 Mode ICC vs Data Rate
170
V.35 Mode ICC vs Data Rate
150
TA = 25°C
160
V.28 Mode ICC vs Data Rate
60
TA = 25°C
145
55
140
50
TA = 25°C
ICC (mA)
ICC (mA)
140
130
120
ICC (mA)
150
135
45
130
40
125
35
110
100
90
10
100
1000
120
10000
DATA RATE (kBd)
2846 G04
30
10
100
1000
DATA RATE (kBd)
10000
2846 G05
10
20
40
DATA RATE (kBd)
60
80 100
2846 G06
sn2846 2846fs
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LTC2846
U W
TYPICAL PERFOR A CE CHARACTERISTICS
V.11 Mode ICC vs Temperature
V.35 Mode ICC vs Temperature
V.28 Mode ICC vs Temperature
128.0
110
37.5
127.5
105
36.5
126.5
100
36.0
126.0
ICC (mA)
ICC (mA)
ICC (mA)
37.0
127.0
125.5
95
125.0
90
35.0
124.5
34.5
124.0
85
34.0
123.5
80
–40 –20
40
20
60
0
TEMPERATURE (°C)
80
100
123.0
–40 –20
40
20
0
60
TEMPERATURE (°C)
33.5
–40 – 20
100
40
1.4
35
1.2
TA = 100°C
20
15
80
10
100
Boost Switching Regulator
Oscillator Frequency
vs Temperature
1.30
TA = 25°C
1.25
1.0
FREQUENCY (MHz)
30
25
60
40
20
TEMPERATURE (°C)
0
3846 G09
Boost Switching Regulator
Current Limit vs Duty Cycle
CURRENT LIMIT (A)
SHDN PIN CURRENT (µA)
Boost Switching Regulator SHDN
Pin Current vs Voltage
TA = 25°C
80
2846 G08
2846 G07
0.8
0.6
0.4
1.20
1.15
1.10
0.2
5
0
35.5
0
0
1
2
4
3
SHDN PIN VOLTAGE (V)
5
10
6
20
30
50
40
60
DUTY CYCLE (%)
2846 G10
70
80
2846 G11
1.05
–40
–20
40
20
0
60
TEMPERATURE (°C)
80
100
2846 G12
Efficiency vs Load Current
90
TA = 25°C
85
VIN = 3.3V
EFFICIENCY (%)
80
75
70
65
60
55
50
0
50 100 150 200 250 300 350 400 450 500
LOAD CURRENT (mA)
2846 TA01b
sn2846 2846fs
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LTC2846
U
U
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PI FU CTIO S
NC (Pin 1): No Connect.
PGND (Pin 2): Boost Switching Regulator Power Ground.
Tie PGND to SGND.
VIN (Pin 3): Input Supply Pin. Input supply to boost
switching regulator. 3V ≤ VIN ≤ 3.6V. Bypass with a 10µF
capacitor to ground.
SHDN (Pin 4): Boost Switching Regulator Shutdown Pin.
Tie to 2.4V or more to enable regulator. Ground to shut
down.
M2 (Pin 18): TTL Level Mode Select Input 2 with Pull-Up
to VIN. See Table 1.
DCE/DTE (Pin 19): TTL Level Mode Select Input with
Pull-Up to VIN. See Table 1.
R3 B (Pin 20): Receiver 3 Noninverting Input.
R3 A (Pin 21): Receiver 3 Inverting Input.
R2 B (Pin 22): Receiver 2 Noninverting Input.
R2 A (Pin 23): Receiver 2 Inverting Input.
C1 –␣ (Pin 5): Capacitor C1 Negative Terminal. Connect a
1µF capacitor between C1+ and C1–.
D3/R1 B (Pin 24): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
C1 + (Pin 6): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1 + and C1 –.
D3/R1 A (Pin 25): Receiver 1 Inverting Input and Driver 3
Inverting Output.
VDD (Pin 7): Generated Positive Supply Voltage for
V.28. Connect a 1µF capacitor to ground.
D2 B (Pin 26): Driver 2 Noninverting Output.
VCC (Pin 8): Input Supply Pin. Input supply to transceiver. 4.75V ≤ VCC ≤ 5.25V. Connect to output of switching regulator.
D1 B (Pin 28): Driver 1 Noninverting Output.
D1 (Pin 9): TTL Level Driver 1 Input.
GND (Pin 30): Transceiver Ground.
D2 (Pin 10): TTL Level Driver 2 Input.
VEE (Pin 31): Generated Negative Supply Voltage. Connect
a 3.3µF capacitor to GND.
D3 (Pin 11): TTL Level Driver 3 Input.
R1 (Pin 12): CMOS Level Receiver 1 Output with Pull-Up
to VIN when Three-Stated.
R2 (Pin 13): CMOS Level Receiver 2 Output with Pull-Up
to VIN when Three-Stated.
R3 (Pin 14): CMOS Level Receiver 3 Output with Pull-Up
to VIN when Three-Stated.
M0 (Pin 15): TTL Level Mode Select Input 0 with Pull-Up
to VIN. See Table 1.
M1 (Pin 16): TTL Level Mode Select Input 1 with Pull-Up
to VIN. See Table 1.
VIN (Pin 17): Input Supply Pin. Input supply to transceiver.
3V ≤ VIN ≤ 3.6V. Connect to Pin 3.
D2 A (Pin 27): Driver 2 Inverting Output.
D1 A (Pin 29): Driver 1 Inverting Output.
C2 – (Pin 32): Capacitor C2 Negative Terminal. Connect a
1µF capacitor between C2 + and C2 –.
C2 + (Pin 33): Capacitor C2 Positive Terminal. Connect a
1µF capacitor between C2 + and C2 – .
SGND (Pin 34): Boost Switching Regulator Signal Ground.
Tie PGND to SGND.
FB (Pin 35): Boost Switching Regulator Feedback Pin.
Reference voltage is 1.255V. Connect resistive divider tap
here. Minimize trace area at FB.
SW (Pin 36): Boost Switching Regulator Switch Pin.
Connect inductor/diode here. Minimize trace area at this
pin to reduce EMI.
sn2846 2846fs
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LTC2846
W
BLOCK DIAGRA
BOOST SWITCHING REGULATOR
PGND
2
GND
SW
36 SW
VIN
3
VIN
FB
35 FB
SHDN
4
SHDN GND
34 SGND
CHARGE PUMP
C1–
5
C1–
C2+
33 C2+
C1+
6
C1+
C2–
32 C2–
VDD
7
VDD
VEE
31 VEE
VCC
8
VCC
GND
30 GND
29 D1A
50Ω
S1
D1 9
D1
S2
125Ω
50Ω
28 D1B
27 D2A
50Ω
S1
D2 10
D2
S2
125Ω
50Ω
26 D2B
D3 11
D3
25 D3/R1 A
10k
20k
6k
S3
DCE/DTE 19
10k
51.5Ω
S2
S1
125Ω
51.5Ω
20k
24 D3/R1 B
R1 12
R1
23 R2A
20k
6k
10k
R2 13
51.5Ω
S3
R2
S2
125Ω
10k
51.5Ω
22 R2B
20k
21 R3A
20k
6k
10k
R3 14
VIN 17
10k
M0 15
M1 16
M2 18
MODE
SELECTION
LOGIC
51.5Ω
S3
R3
S2
125Ω
51.5Ω
20 R3B
20k
2846 BD
sn2846 2846fs
8
LTC2846
TEST CIRCUITS
D
RL
B
D
VOD
A
RL
B
A
VOC
CL
100pF
RL
100Ω
CL
100pF
2846 F02
2846 F01
Figure 1. V.11 Driver DC Test Circuit
IB
Figure 2. V.11 Driver AC Test Circuit
B
R
B
IA
VCM = ±7V
A
+
–
CL
A
2(VB – VA)
RIN =
IB – IA 2846 F03
2846 F04
Figure 3. Input Impedance Test Circuit
VOB
125Ω
R
Figure 4. V.11, V.35 Receiver AC Test Circuit
VOB
50Ω
RL
125Ω
50Ω
50Ω
50Ω
50Ω
125Ω
125Ω
50Ω
VOD
50Ω
VOC
RL
2846 F05
2846 F06
VOA
+
–
50Ω
VCM
VCM = ±2V
2846 F07
VOA
Figure 5. V.35 Driver Open-Circuit Test
Figure 6. V.35 Driver Test Circuit
Figure 7. V.35 Driver Common Mode
Impedance Test Circuit
51.5Ω
125Ω
50Ω
50Ω
50Ω
50Ω
VTH
+
–
2846 F08
VCM
+
–
125Ω
125Ω
VCM = ± 2V
+
–
2846 F10
2846 F09
Figure 8. V.35 Driver AC Test Circuit
D
Figure 9. V.35 Receiver DC Test Circuit
A
A
CL
RL
2846 F11
Figure 11. V.28 Driver Test Circuit
51.5Ω
VA
Figure 10. Receiver Common Mode
Impedance Test Circuit
R
CL
2846 F12
Figure 12. V.28 Receiver Test Circuit
sn2846 2846fs
9
LTC2846
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ODE SELECTIO
Table 1
M2 M1 M0 DCE/ D1,2 D3
DTE
(Note 1)
(Note 1)
Mode Name
D1
A
D2
B
A
D3
B
A
B
R1
R2
R3
R1
R2,R3
(Note 2)
(Note 2)
(Note 2)
(Note 3)
(Note 3)
A
B
A
B
A
VDD
(Note 4)
VEE
(Note 5)
B
Not Used
(Default V.11) 0
0
0
0
TTL
X
V.11 V.11 V.11 V.11
Z
Z
V.11 V.11 V.11 V.11 V.11 V.11 CMOS
CMOS
9.3V
–6V
RS530A
0
0
1
0
TTL
X
V.11 V.11 V.11 V.11
Z
Z
V.11 V.11 V.11 V.11 V.11 V.11 CMOS
CMOS
9.3V
–6V
RS530
0
1
0
0
TTL
X
V.11 V.11 V.11 V.11
Z
Z
V.11 V.11 V.11 V.11 V.11 V.11 CMOS
CMOS
9.3V
–6V
X.21
0
1
1
0
TTL
X
V.11 V.11 V.11 V.11
Z
Z
V.11 V.11 V.11 V.11 V.11 V.11 CMOS
CMOS
9.3V
–6V
V.35
1
0
0
0
TTL
X
V.35 V.35 V.35 V.35
Z
Z
V.35 V.35 V.35 V.35 V.35 V.35 CMOS
CMOS
8V
–6.5V
RS449/V.36
1
0
1
0
TTL
X
V.11 V.11 V.11 V.11
Z
Z
V.11 V.11 V.11 V.11 V.11 V.11 CMOS
CMOS
9.3V
–6V
CMOS
8.7V
–8.5V
Z
4.7V
0.3V
V.28/RS232
1
1
0
0
TTL
X
V.28
Z
V.28
Z
Z
Z
V.28 30k V.28 30k V.28 30k CMOS
No Cable
1
1
1
0
X
X
Z
Z
Z
Z
Z
Z
30k 30k 30k 30k
30k 30k
Z
Not Used
(Default V.11) 0
0
0
1
TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11
Z
CMOS
9.3V
–6V
RS530A
0
0
1
1
TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11
Z
CMOS
9.3V
–6V
RS530
0
1
0
1
TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11
Z
CMOS
9.3V
–6V
X.21
0
1
1
1
TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11
Z
CMOS
9.3V
–6V
V.35
1
0
0
1
TTL TTL V.35 V.35 V.35 V.35 V.35 V.35 30k 30k V.35 V.35 V.35 V.35
Z
CMOS
8V
–6.5V
RS449/V.36
1
0
1
1
TTL TTL V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11
Z
CMOS
9.3V
–6V
TTL TTL V.28
V.28/RS232
1
1
0
1
No Cable
1
1
1
1
X
X
Z
Z
V.28
Z
V.28
Z
30k 30k V.28 30k V.28 30k
Z
CMOS
8.7V
–8.5V
Z
Z
Z
Z
Z
30k 30k 30k 30k
Z
Z
4.7V
0.3V
Note 1: Driver inputs are TTL level compatible.
Note 2: Unused receiver inputs are terminated with 30k to ground. In addition, R2 and R3 are always
terminated by a 103Ω differential impedence (see Block Diagram on page 8).
Note 3: Receiver Outputs are CMOS level compatible and have a weak pull up to VIN when Z.
30k 30k
Note 4: VDD values shown are typical values for VCC = 5V, VIN = 3.3V and TA = 25°C with LTC2846
under full load for each mode.
Note 5: VEE values shown are typical values for VCC = 5V, VIN = 3.3V and TA = 25°C with LTC2846
under full load for each mode.
U
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W
SWITCHI G TI E WAVEFOR S
3V
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
1.5V
D
0V
1.5V
t PHL
t PLH
VO
B–A
–VO
90%
90%
50%
10%
tr
1/2 VO
50%
10%
tf
A
VO
B
t SKEW
t SKEW
2846 F13
Figure 13. V.11, V.35 Driver Propagation Delays
VOD2
B–A
–VOD2
VOH
R
VOL
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
0V
INPUT
0V
t PHL
t PLH
1.65V
OUTPUT
1.65V
2846 F14
Figure 14. V.11, V.35 Receiver Propagation Delays
sn2846 2846fs
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LTC2846
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SWITCHI G TI E WAVEFOR S
3V
1.5V
1.5V
D
0V
t PHL
VO
t PLH
3V
0V
A
–VO
SR = 6V
tf
–3V
3V
SR = 6V
tr
0V
–3V
tf
2846 F15
tr
Figure 15. V.28 Driver Propagation Delays
VIH
1.5V
1.5V
A
VIL
t PHL
VOH
R
VOL
t PLH
1.65V
1.65V
2846 F16
Figure 16. V.28 Receiver Propagation Delays
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APPLICATIO S I FOR ATIO
Overview
Mode Selection
The LTC2846 consists of a boost switching regulator, a
charge pump and a 3-driver/3-receiver transceiver. The
boost switching regulator generates a 5V VCC from the
3.3V input at VIN to power the charge pump and transceiver. The charge pump generates the VDD and VEE
supplies. The LTC2846’s VCC, VDD and VEE supplies can
be used to power a companion chip like the LTC2844 or
LTC2845. The receiver outputs are driven between 0V and
VIN to interface with 3.3V logic.
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see Table 1).
The LTC2846 and LTC2844 form a complete softwareselectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. Cable termination is provided on-chip, eliminating the need for discrete termination designs.
The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in
Figure 18. The internal pull-up current sources will ensure
a binary 1 when a pin is left unconnected.
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 17. The LTC2846 half of each port
is used to generate and appropriately terminate the clock
and data signals. The LTC2844 is used to generate the
control signals along with LL (Local Loopback).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 =␣ 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VIN.
sn2846 2846fs
11
LTC2846
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APPLICATIO S I FOR ATIO
SERIAL
CONTROLLER
DTE
DCE
LTC2846
LTC2846
SERIAL
CONTROLLER
TXD
D1
TXD
103Ω
R3
TXD
SCTE
D2
SCTE
103Ω
R2
SCTE
R1
D3
TXC
R1
103Ω
TXC
D3
TXC
RXC
R2
103Ω
RXC
D2
RXC
RXD
R3
103Ω
RXD
D1
RXD
LTC2844
LTC2844
RTS
D1
RTS
R3
RTS
DTR
D2
DTR
R2
DTR
D3
R1
DCD
R1
DCD
D3
DCD
DSR
R2
DSR
D2
DSR
CTS
R3
CTS
D1
CTS
LL
LL
D4
R4
R4
LL
D4
2846 F17
Figure 17. Complete Multiprotocol Interface in EIA530 Mode
When the cable is removed, leaving all mode pins unconnected, the LTC2846/LTC2844 will enter no-cable mode.
In this mode the LTC2846/LTC2844 supply current drops
to less than 900µA and the LTC2846/LTC2844 driver outputs are forced into a high impedance state. At the same
time, the R2 and R3 receivers of the LTC2846 are differentially terminated with 103Ω and the other receivers on
the LTC2846 and LTC2844 are terminated with 30kΩ to
ground.
Cable Termination
Traditional implementations used expensive relays to
switch resistors or required the user to change termination modules every time a new interface standard was
sn2846 2846fs
12
LTC2846
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APPLICATIO S I FOR ATIO
(DATA)
M0
LTC2846
M1
M2
DCE/DTE
CONNECTOR
15
16
18
NC
19
NC
CABLE
DCE/DTE
M2
LTC2844
M1
M0
14
13
12
11
(DATA)
2846 F18
Figure 18. Single Port DCE V.35 Mode Selection in the Cable
selected. Switching the terminations with FETs is difficult
because the FETs must remain off when the signal voltage
is beyond the supply voltage. Alternatively, custom cables
may contain termination in the cable head or route signals
to various terminations on the board.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
LOAD
CABLE
TERMINATION
The LTC2846/LTC2844 chip set solves the cable termination switching problem by automatically providing the
appropriate termination and switching on-chip for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
A
A'
C
C'
RECEIVER
2846 F19
Figure 19. Typical V.10 Interface
V.10 (RS423) Interface
IZ
All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are implemented on the LTC2844 or LTC2845.
A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A' connected to A, and ground C' connected via the signal return
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.
The V.10 receiver configuration in the LTC2844 and
LTC2845 is shown in Figure 21. In V.10 mode, switch S3
inside the LTC2844 and LTC2845 is turned off. The
noninverting input is disconnected inside the LTC2844
–10V
3.25mA
–3V
VZ
3V
–3.25mA
10V
2846 F20
Figure 20. V.10 Receiver Input Impedance
sn2846 2846fs
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LTC2846
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APPLICATIO S I FOR ATIO
A'
A
A'
LTC2844
R8
6k
R5
20k
R1
51.5Ω
R6
10k
S3
LTC2846
R8
6k
R6
10k
RECEIVER
S1
R3
124Ω
S2
R4
20k
B
B'
C'
R7
10k
B'
GND
Figure 21. V.10 Receiver Configuration
GENERATOR
A
RECEIVER
A'
B
B'
C
C'
R7
10k
R4
20k
GND
2846 F23
Figure 23. V.11 Receiver Configuration
LOAD
CABLE
TERMINATION
RECEIVER
S3
R2
51.5Ω
C'
2846 F21
BALANCED
INTERCONNECTING
CABLE
R5
20k
termination impedance to the cable as shown in Figure
231. The LTC2844 and LTC2845 only handle control
signals, so no termination other than their V.11 receivers’
30k input impedance is necessary.
V.28 (RS232) Interface
100Ω
MIN
2846 F22
Figure 22. Typical V.11 Interface
and LTC2845 receivers and connected to ground. The
cable termination is then the 30k input impedance to
ground of the LTC2844 and LTC2845 V.10 receiver.
A typical V.28 unbalanced interface is shown in Figure 24.
A V.28 single-ended generator with output A and ground
C is connected to a single-ended receiver with input A'
connected to A and ground C' connected via the signal
return to ground C.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 22. A
V.11 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.11
interface has a differential termination at the receiver end
that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is essential to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the impedance curve shown in Figure 20.
In V.11 mode, all switches are off except S1 of the
LTC2846’s receivers which connects a 103Ω differential
LOAD
CABLE
TERMINATION
A
A'
C
C'
RECEIVER
2846 F24
Figure 24. Typical V.28 Interface
A'
LTC2846
R1
51.5Ω
S1
S2
B'
C'
R8
6k
R3
124Ω
R5
20k
R6
10k
S3
R2
51.5Ω
R4
20k
GND
RECEIVER
R7
10k
2846 F25
1Actually,
there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination
networks on the LTC2846 can be treated identically if it is assumed that an S1 switch exists and is
always closed on the R2 and R3 receivers.
Figure 25. V.28 Receiver Configuration
sn2846 2846fs
14
LTC2846
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APPLICATIO S I FOR ATIO
In V.28 mode, S3 is closed inside the LTC2846/LTC2844
which connects a 6k (R8) impedance to ground in parallel
with 20k (R5) plus 10k (R6) for a combined impedance of
5k as shown in Figure 25. Proper termination is only provided when the B input of the receivers is floating, since S1
of the LTC2846’s R2 and R3 receivers remains on in V.28
mode1. The noninverting input is disconnected inside the
LTC2846/LTC2844 receiver and connected to a TTL level
reference voltage to give a 1.4V receiver trip point.
V.35 Interface
A typical V.35 balanced interface is shown in Figure 26. A
V.35 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.35
interface requires a T or delta network termination at the
receiver end and the generator end. The receiver differential impedance measured at the connector must be
BALANCED
INTERCONNECTING
CABLE
GENERATOR
LOAD
CABLE
TERMINATION
A'
A
50Ω
RECEIVER
125Ω
50Ω
125Ω
50Ω
50Ω
B
B'
C
C'
2846 F26
Figure 26. Typical V.35 Interface
A'
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground (C) must be 150Ω ±15Ω.
No-Cable Mode
The no-cable mode (M0 = M1 = M2 = 1) is intended for
the case when the cable is disconnected from the connector. The charge pump, bias circuitry, drivers and
receivers are turned off, the driver outputs are forced into
a high impedance state, and the VCC supply current to the
transceiver drops to less than 300µA while its VIN supply
current drops to less than 10µA. Note that the LTC2846’s
R2 and R3 receivers continue to be terminated by a 103Ω
differential impedance.
Charge Pump
The LTC2846 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 28. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about – 7.5V on VEE. Three 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2 and
C3. The VEE capacitor C4 should be a minimum of 3.3µF.
All capacitors are 16V and should be placed as close as
possible to the LTC2846 to reduce EMI.
R8
6k
R5
20k
7
R6
10k
S1
S2
C'
In V.35 mode, both switches S1 and S2 inside the LTC2846
are on, connecting a T network impedance as shown in
Figure 27. The 30k input impedance of the receiver is
placed in parallel with the T network termination, but does
not affect the overall input impedance significantly.
LTC2846
R1
51.5Ω
B'
100Ω␣ ±10Ω, and the impedance between shorted terminals (A' and B') and ground (C') must be 150Ω ±15Ω.
R3
124Ω
RECEIVER
C3
1µF
S3
6
C1
1µF 5
R2
51.5Ω
R4
20k
R7
10k
GND
8
5V
2846 F27
VDD
C2 +
33
C1+
C2 –
32
C2
1µF
LTC2846
C1–
VCC
VEE
GND
31
30
+
C4
3.3µF
C5
10µF
2846 F28
Figure 27. V.35 Receiver Configuration
Figure 28. Charge Pump
sn2846 2846fs
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LTC2846
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APPLICATIO S I FOR ATIO
Switching Regulator
The circuit as shown in Figure 29 can provide up to 480mA
at 5V to drive the LTC2846’s transceiver as well as its
companion chip in the DTE-DCE interface. In its shut down
mode with the SHDN pin at 0V, the boost switching
regulator draws less than 10µA.
The switching regulator has a switch current limit of 1A.
This current limit protects the switch as well as the external components connected to the switching regulator.
The high speed operation of the boost switching regulator
demands careful attention to board layout. Figure 30
shows the recommended component placement.
Ferrite core inductors should be used to obtain the best
efficiency, as core losses at 1.2MHz are much lower for
ferrite cores than for cheaper powdered-iron types. Choose
an inductor that can handle at least 1A without saturating,
and ensure that the inductor has a low DCR (copper wire
resistance) to minimize I2R power losses.
Receiver Fail-Safe
Use low ESR capacitors for the output to minimize output
ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have extremely low ESR and are
available in very small packages. Ceramic capacitors also
make a good choice for the input decoupling capacitor,
and should be placed as close as possible to the switching
regulator. Solid tantalum or OS-CON capacitors can be
used but they will occupy more board area than a ceramic
and will have a higher ESR.
DTE vs DCE Operation
A Schottky diode is recommended for use with the switching regulator. The ON Semiconductor MBR0520 is a very
good choice.
To set the output voltage, select the values of R1 and R2
according to the following equation.
R1 = R2[(5V/1.255V) – 1]
All LTC2846/LTC2844 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or
are shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
The DCE/DTE pin acts as an enable for Driver 3/Receiver␣ 1
in the LTC2846, and Driver 3/Receiver 1 and Receiver 4/
Driver 4 in the LTC2844.
The LTC2846/LTC2844 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operation by rerouting the signals to the LTC2846/LTC2844
using a dedicated DTE cable or dedicated DCE cable.
A dedicated DTE port using a DB-25 male connector is
shown in Figure 31. The interface mode is selected by logic
outputs from the controller or from jumpers to either VIN
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 32.
A good value for R2 is 4.3k which sets the current in the
resistor divider chain to 1.255V/4.3k = 292µA.
D1
C6
10µF
SHDN
36
SW
BOOST
SWITCHING
REGULATOR
35
4
SHDN
FB
GND
2, 34
VIN
C5
+
3
VIN
VCC
5V
480mA
+
L1
5.6µH
VIN
3.3V
VCC
GND
R1
13k
L1
R1
D1
C6
R2
C5
10µF
R2
4.3k
SHUTDOWN
C5,C6: TAIYO YUDEN X5R JMK316BJ106ML
D1: ON SEMICONDUCTOR MBR0520
L1: SUMIDA CR43-5R6
Figure 29. Boost Switching Regulator
2846 F30
2846 F29
Figure 30. Suggested Layout
sn2846 2846fs
16
LTC2846
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A port with one DB-25 connector, that can be configured
for either DTE or DCE operation is shown in Figure 33. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via the
LTC2846’s Driver 1. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Multiprotocol Interface with RL, LL, TM
and a DB-25 Connector
If the RL, LL and TM signals are implemented, there are not
enough drivers and receivers available in the LTC2846/
LTC2844. In Figure 34, the required control signals are
handled by the LTC2845. The LTC2845 has an additional
single-ended driver/receiver pair that can handle two more
optional control signals such as TM and RL.
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 35. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (connector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or
DCE/DTE is floating, internal pull-up current sources will
pull the signals to VIN. The select bit M2 is floating, and
therefore, internally pulled high. When the cable is pulled
out, the interface will go into the no-cable mode.
Power Dissipation Calculations
The LTC2846 takes in a 3.3V supply and produces a 5V VCC
with an internal switcher at approximately 80% efficiency.
VDD and VEE are in turn produced from VCC with an internal
charge pump at approximately 80% and 70% efficiency
respectively. Current drawn internally from VDD or VEE
translates directly into a higher ICC. The LTC2846 dissipates power according to the equation:
PDISS(2846) = 125% • (VCC • ICC)
– ND • PRT + NR • PRT
PRT refers to the power dissipated by each driver in a
receiver termination on the far end of the cable while ND is
the number of drivers. Conversely, current from the far
end drivers dissipate power NR • PRT in the internal
receiver termination where NR is the number of receivers.
LTC2846 Power Dissipation
Consider an LTC2846 in X.21, DCE mode (three V.11
drivers and two V.11 receivers). From the Electrical Characteristics Table, ICC at no load = 14mA, ICC at full load =
100mA. Each receiver termination is 100Ω (RRT) and
current going into each receiver termination = (100mA –
14mA)/3 = 28.7mA (IRT).
PRT = (IRT)2 • RRT
(2)
From Equation (2), PRT = 82.4mW and from Equation (1),
DC power dissipation PDISS(2846) = 125% • (5V • 100mA)
– 3 • 82.4mW + 2 • 82.4mW = 543mW.
Consider the above example running at a baud rate of
10MBd. From the Typical Characteristic for “V.11 Mode
ICC vs Data Rate,” the ICC at 10MBd is 160mA. ICC
increases with baud rate due to driver transient dissipation. From Equation (1), AC power dissipation PDISS(2846)
= 125% • (5V • 160mA) –3 • 82.4mW + 2 • 82.4mW =
918mW.
LTC2845 Power Dissipation
If a LTC2845 is used to form a complete DCE port with the
LTC2846, it will be running in the X.21 mode (three V.11
drivers and two V.10 drivers, two V.11 receivers and two
V.10 receivers, all with internal 30k termination). In addition to VCC, it uses the VDD and VEE outputs from the
LTC2846. Negligible power is dissipated in the large
internal receiver termination of the LTC2845 so the NR •
PRT term of Equation (1) can be omitted. Thus Equation (1)
is modified as follows:
PDISS(2845) = (VCC • ICC) + (VDD • IDD)
(1)
sn2846 2846fs
17
LTC2846
U
TYPICAL APPLICATIO S
+ (VEE • IEE) – ND • PRT
(3)
Since power is drawn from the supplies of the LTC2846
(VCC, VDD and VEE) at less than 100% efficiency, the
LTC2846 dissipates extra power to source PDISS(2845) and
PRT :
PDISS1(2846) = 125% • (VCC • ICC) + 125% • 125%
• (VDD • IDD) + 125% • 143% • (VEE • IEE)
– PDISS(2845) – ND • PRT
= 25% • (VCC • ICC) + 56% • (VDD • IDD)
+ 79% • (VEE • IEE)
(4)
From the LTC2845 Electrical Characteristics Table, for
VCC = 5V, VDD = 8V and VEE = – 5.5V:
79mW and V.10 PRT = 49.6mW.
From Equation (3), PDISS(2845) = 5V • (110mA – 23mA) +
(8V • 0.3mA) + 5.5V • 23mA – 3 • 79mW – 2 • 49.6mW =
228mW. Since the LTC2845 runs slow control signals, the
AC power dissipation can be assumed to be equal to the DC
power dissipation.
The extra power dissipated in the LTC2846 due to LTC2845
is given by Equation(4), PDISS1(2846) = 25% • (5V • 87mA)
+ 56% • (8V • 0.3mA) + 79% • (5.5V • 23mA) = 210mW.
So for an X.21 DCE port running at 10MBd, the LTC2846
dissipates approximately 918mW + 210mW = 1128mW
while the LTC2845 dissipates 228mW.
ICC at no load
2.7mA
Compliance Testing
ICC at full load with all drivers high
110mA
The LTC2846/LTC2844 and LTC2846/LTC2845 chipsets
have been tested by TUV Rheinland of North America Inc.
and passed the NET1, NET2 and TBR2 requirements.
Copies of the test reports are available from LTC or TUV
Rheinland of North America Inc.
IEE at no load
2mA
IEE at full load with both V.10 drivers low
23mA
IDD at no load
0.3mA
IDD at full load
0.3mA
The V.11 drivers are driven between VCC and GND while
the V.10 drivers are driven between VCC and VEE. Assume
that the V.11 driver outputs are high and V.10 driver
outputs low. Current going into each 100Ω V.11 receiver
termination = (110mA – 2.7mA) – 23mA/3 = 28.1mA.
Current going into each 450Ω V.10 receiver termination =
23mA – 2mA/2 = 10.5mA. From Equation (2), V.11 PRT =
The title of the reports are Test Report No.:
TBR2/051501/02 and TBR2/050101/02
The address of TUV Rheinland of North America Inc. is:
TUV Rheinland of North America Inc.
1775, Old Highway 8 NW, Suite 107
St. Paul, MN 55112
Tel. (651) 639-0775
Fax (651) 639-0873
sn2846 2846fs
18
LTC2846
U
TYPICAL APPLICATIO S
D1
MBR0520
L1
5.6µH
3
C6
10µF
SHDN
4
7
C3
1µF
36
BOOST
SWITCHING
REGULATOR
5
C1
1µF
VCC
5V
33
30
LTC2846
9
D1
10
SCTE
R2
4.3k
T
D2
C5
10µF
C2
1µF
31
CHARGE
PUMP
8
TXD
35
32
6
VCC
5V
R1
13k
T
+
VIN
3.3V
C4
3.3µF
29
2
28
14
27
24
26
11
25
15
24
12
23
17
22
9
21
3
20
16
TXD A (103)
TXD B
SCTE A (113)
SCTE B
11
D3
12
TXC
15
16
18
19
C8
1µF
RTS
DTR
R2
14
RXD
C7
1µF
R1
13
RXC
T
R3
T
T
M0
7
M1
M2
17 VIN
3.3V
DCE/DTE
VCC
1
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DSR
CTS
LL
6
R1
7
R2
8
R3
10
R4
9
M0
M1
M2
11
12
13
14
RXC A (115)
RXC B
RXD A (104)
RXD B
SG
SHIELD
DB-25 MALE
CONNECTOR
28
C9
1µF
27
TXC B
26
4
25
19
24
20
23
23
RTS A (105)
RTS B
DTR A (108)
DTR B
D3
LTC2844
DCD
1
TXC A (114)
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD A (109)
DCD B
DSR A (107)
DSR B
CTS A (106)
CTS B
LL A (141)
D4
M0
M1
VIN
15
C10
1µF
VIN
3.3V
M2
DCE/DTE
2846 F31
Figure 31. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
sn2846 2846fs
19
LTC2846
U
TYPICAL APPLICATIO S
D1
MBR0520
L1
5.6µH
3
C6
10µF
SHDN
4
7
C3
1µF
36
BOOST
SWITCHING
REGULATOR
5
C1
1µF
VCC
5V
8
LTC2846
D1
10
RXC
T
D2
R2
4.3k
33
30
9
RXD
35
T
C5
10µF
C2
1µF
32
31
CHARGE
PUMP
6
VCC
5V
R1
13k
+
VIN
3.3V
C4
3.3µF
29
3
28
16
27
17
26
9
25
15
24
12
23
24
22
11
21
2
20
14
RXD A (104)
RXD B
RXC A (115)
RXC B
11
D3
12
TXC
R2
14
TXD
15
16
18
NC
C7
1µF
R1
13
SCTE
C8
1µF
19
R3
T
7
M1
M2
17 VIN
3.3V
DCE/DTE
VCC
1
VCC
2
VDD
VEE
GND
D1
4
DSR
T
M0
3
CTS
T
D2
5
6
R1
7
DTR
R2
8
RTS
R3
10
LL
R4
9
11
M0
12
M1
13
M2
NC
14
SCTE A (113)
SCTE B
TXD A (103)
TXD B
SGND (102)
SHIELD (101)
DB-25 FEMALE
CONNECTOR
28
C9
1µF
27
TXC B
26
5
25
13
24
6
23
22
CTS A (106)
CTS B
DSR A (107)
DSR B
D3
LTC2844
DCD
1
TXC A (114)
22
8
21
10
20
20
19
23
18
4
17
19
16
18
DCD A (109)
DCD B
DTR A (108)
DTR B
RTS A (105)
RTS B
LL A (141)
D4
M0
M1
VIN
15
C10
1µF
VIN
3.3V
M2
DCE/DTE
2846 F32
Figure 32. Controller-Selectable DCE Port with DB-25 Connector
sn2846 2846fs
20
LTC2846
U
TYPICAL APPLICATIO S
D1
MBR0520
L1
5.6µH
3
C6
10µF
SHDN
4
7
C3
1µF
36
BOOST
SWITCHING
REGULATOR
5
C1
1µF
VCC
5V
8
LTC2846
D1
10
DTE_SCTE/DCE_RXC
T
D2
R2
4.3k
33
30
9
DTE_TXD/DCE_RXD
35
T
C5
10µF
C2
1µF
32
31
CHARGE
PUMP
6
VCC
5V
R1
13k
+
VIN
3.3V
C4
3.3µF
29
2
28
14
27
24
26
11
25
15
24
12
23
17
22
9
21
3
20
16
DTE
DCE
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
11
D3
12
DTE_TXC/DCE_TXC
15
16
18
19
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
R2
14
DTE_RXD/DCE_TXD
C7
1µF
R1
13
DTE_RXC/DCE_SCTE
C8
1µF
T
R3
T
T
M0
7
M1
M2
DCE/DTE
VCC
1
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
6
R1
7
R2
8
R3
10
R4
9
M0
M1
M2
DCE/DTE
11
12
13
14
SHIELD
DB-25
CONNECTOR
28
C9
1µF
27
SG
26
4
25
19
24
20
23
23
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
D3
LTC2844
DTE_DCD/DCE_DCD
1
17 VIN
3.3V
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
LL A
LL A
D4
M0
M1
VIN
15
C10
1µF
VIN
3.3V
M2
DCE/DTE
2846 F33
Figure 33. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
sn2846 2846fs
21
LTC2846
U
TYPICAL APPLICATIO S
D1
MBR0520
L1
5.6µH
36
3
C6
10µF
SHDN
4
7
C3
1µF
BOOST
SWITCHING
REGULATOR
5
C1
1µF
VCC
5V
8
LTC2846
D1
10
DTE_SCTE/DCE_RXC
T
D2
R2
4.3k
33
30
9
DTE_TXD/DCE_RXD
35
T
C5
10µF
C2
1µF
32
31
CHARGE
PUMP
6
VCC
5V
R1
13k
+
VIN
3.3V
C4
3.3µF
29
2
28
14
27
24
26
11
25
15
24
12
23
17
22
9
21
3
20
16
DTE
TXD A
DCE
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
11
D3
12
DTE_TXC/DCE_TXC
15
16
18
19
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
VCC
5V
C8
1µF
T
R2
14
DTE_RXD/DCE_TXD
C7
1µF
R1
13
DTE_RXC/DCE_SCTE
T
T
R3
M0
7
M1
M2
1, 19
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_RI
DTE_RI/DCE_LL
DTE_TM/DCE_RL
DTE_RL/DCE_TM
M0
M1
M2
DCE/DTE
6
R1
7
R2
8
R3
9
D4
10
R4
17
R5
18
11
12
13
14
SHIELD
36
DB-25
CONNECTOR
C9
1µF
35
34
4
33
19
32
20
31
23
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
D3
LTC2845
DTE_DCD/DCE_DCD
1
17 VIN
3.3V
DCE/DTE
SG
D5
M0
M1
8
29
10
28
6
27
22
26
5
25
24
13
23
*
22
25
21
21
20
VIN
15
D4ENB
M2
DCE/DTE
30
R4EN
16
C10
1µF
VIN
3.3V
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
18
LL
RTS B
RI
RI
LL
TM
RL
RL
TM
*OPTIONAL
2846 F34
NC
Figure 34. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
sn2846 2846fs
22
LTC2846
U
TYPICAL APPLICATIO S
D1
MBR0520
L1
5.6µH
3
C6
10µF
SHDN
4
7
C3
1µF
36
BOOST
SWITCHING
REGULATOR
5
C1
1µF
8
LTC2846
D1
10
DTE_SCTE/DCE_RXC
T
D2
R2
4.3k
33
30
9
DTE_TXD/DCE_RXD
35
T
C5
10µF
C2
1µF
32
31
CHARGE
PUMP
6
VCC
5V
VCC
5V
R1
13k
+
VIN
3.3V
C4
3.3µF
29
2
28
14
27
24
26
11
25
15
24
12
23
17
22
9
21
3
20
16
DTE
DCE
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
11
D3
12
DTE_TXC/DCE_TXC
R1
13
DTE_RXC/DCE_SCTE
R2
14
DTE_RXD/DCE_TXD
15
16
NC
18
19
T
R3
T
T
M0
7
M1
M2
1
17 VIN
3.3V
DCE/DTE
SG
SHIELD
DB-25
CONNECTOR
C7
1µF
C8
1µF
VCC
1
VCC
2
VDD
VEE
GND
25
DCE/DTE
21
M1
18
M0
4
RTS A
19
RTS B
20
DTR A
23
DTR B
28
C9
1µF
27
26
3
DTE_RTS/DCE_CTS
D1
24
4
DTE_DTR/DCE_DSR
25
D2
5
23
LTC2844
R1
7
DTE_DSR/DCE_DTR
R2
8
DTE_CTS/DCE_RTS
R3
10
12
NC
13
14
22
8
21
10
20
6
19
22
18
5
17
13
16
R4
9
11
CTS B
DSR A
DSR B
D3
6
DTE_DCD/DCE_DCD
CTS A
D4
M0
M1
M2
DCE/DTE
VIN
15
C10
1µF
VIN
3.3V
DCD A
DCD A
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
CABLE WIRING FOR MODE SELECTION
MODE
PIN 18
PIN 21
V.35
PIN 7
PIN 7
RS449, V.36
NC
PIN 7
RS232
PIN 7
NC
CABLE WIRING FOR
DTE/DCE SELECTION
MODE
DTE
DCE
PIN 25
PIN 7
NC
2846 F35
Figure 35. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
sn2846 2846fs
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC2846
U
PACKAGE DESCRIPTIO
G Package
36-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
12.50 – 13.10*
(.492 – .516)
1.25 ±0.12
7.8 – 8.2
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
5.3 – 5.7
7.40 – 8.20
(.291 – .323)
0.42 ±0.03
0.65 BSC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
RECOMMENDED SOLDER PAD LAYOUT
5.00 – 5.60**
(.197 – .221)
2.0
(.079)
0° – 8°
0.09 – 0.25
(.0035 – .010)
0.65
(.0256)
BSC
0.55 – 0.95
(.022 – .037)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
0.05
(.002)
0.22 – 0.38
(.009 – .015)
G36 SSOP 0802
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
LTC1343
Software-Selectable Multiprotocol Transceiver
4-Driver/4-Receiver for Data and Clock Signals
LTC1344A
Software-Selectable Cable Terminator
Perfect for Terminating the LTC1543 (Not Needed with LTC1546)
LTC1345
Single Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1543
Software-Selectable Multiprotocol Transceiver
Terminated with LTC1344A for Data and Clock Signals, Companion to
LTC1544 or LTC1545 for Control Signals
LTC1544
Software-Selectable Multiprotocol Transceiver
Companion to LTC1546 or LTC1543 for Control Signals Including LL
LTC1545
Software-Selectable Multiprotocol Transceiver
5-Driver/5-Receiver Companion to LTC1546 or LTC1543
for Control Signals Including LL, TM and RL
LTC1546
Software-Selectable Multiprotocol Transceiver
3-Driver/3-Receiver with Termination for Data and Clock Signals
LTC2844
3.3V Software-Selectable Multiprotocol Transceiver
Companion to LTC2846 for Control Signals Including LL
LTC2845
3.3V Software-Selectable Multiprotocol Transceiver
5-Driver/5-Receiver Companion to LTC2846 for Control Signals
Including LL, TM and RL
sn2846 2846fs
24
Linear Technology Corporation
LT/TP 0503 1K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2002