FUJITSU SEMICONDUCTOR DATA SHEET DS04-27202-3E ASSP SWITCHING REGULATOR CONTROLLER MB3769A The Fujitsu MB3769A is a pulse-width-modulation controller which is applied to fixed frequency pulse modulation technique. The MB3769A contains wide band width Op-Amp and high speed comparator to construct very high speed switching regulator system up to 700 kHz. Output is suitable for power MOS FET drive owing to adoption of totem pole output. The MB3769A provides stand-by mode at low voltage power supply when it is applied in primary control system. • High frequency oscillator (f = 1 to 700 kHz) • On-chip wide band frequency operation amplifier (BW = 8 MHz typ.) • On-chip high speed comparator (td = 120 ns typ.) PLASTIC DIP 16-PIN (DIP-16P-M04) • Internal reference voltage generator provides a stable reference supply (5 V ± 2%) • Low power dissipation (1.5 mA typ. at standby mode, 8 mA typ. at operating mode) • Output current ± 100 mA (± 600 mA at peak) • High speed switching operation (tr = 60 ns, tf = 30 ns, CL = 1000 pF typ.) • Adjustable Dead-time • On-chip soft start and quick shut down functions • Internal circuitry prohibits double pulse at dynamic current limit operation • Under voltage lock out function (OFF to ON: 10 V typ. ON to OFF: 8 V typ.) PLASTIC FPT 16-PIN (FPT-16P-M06) • On-chip output shut down circuit with latch function at over voltage • On-chip Zener diode (15 V) This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. 1 MB3769A ■ PIN ASSIGNMENT (TOP VIEW) ■ +IN (OP) 1 16 +IN (C) -IN (OP) 2 15 -IN (C) FB 3 14 VREF DTC 4 13 OVP CT 5 12 VCC RT 6 11 VZ GND 7 10 VH VL 8 9 OUT ABSOLUTE MAXIMUM RATINGS (See NOTE) Rating Symbol Value Unit Power Supply Voltage VCC 20 V Output Current IOUT 120 (660*) mA Operation Amp. Input Voltage Vin (OP) VCC + 0.3 (≤ 20) V Power Dissipation: DIP : FPT PD 1000** mW PD 620*** mW Operating Temp. : DIP : FPT TOP -30 to +85 °C TOP -30 to +75 °C Storage Temp. TSTG -55 to +125 °C * ** *** : : : Duty ≤ 5% TA = 25 °C TA = 25 °C, FPT package is mounted on the epoxy board. (4 cm x 4 cm x 0.15 cm) NOTE : Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 MB3769A ■ BLOCK DIAGRAM Fig. 1 - MB3769A Block Diagram Over Current Detection Comparator -IN (C) 15 S +IN (C) 16 Q + R 1.85 V + VREF 1.8 V DTC + + + PWM + Comparator + 10 VH 9 OUT 8 VL - 4 STB STB FB 3 +IN (OP) 1 -IN (OP) 2 OVP 13 + Error Amp. - + Over Voltage Detector S Q Power off 1.5 V to 3.5 V 2.5 V CT 5 RT 6 V CC (2.5 V) Triangle Wave Oscillator + 8/10 V STB - 12 15.4 V VZ R 5.0 + 0.1 V Reference Regulator 11 + 14 VREF 30 kΩ GND 7 3 MB3769A ■ RECOMMENDED OPERATING CONDITION DIP package Parameter FPT package SymboL Unit Min Typ Max Min Typ Max Power Supply Voltage VCC 12 15 18 12 15 18 V Output Current (DC) IOUT -100 - 100 -100 - 100 mA Output Current (Peak) IOUT PEAK -600 - 600 -600 - 600 mA Operation Amp. Input voltage VINOP -0.2 0 to VREF VCC -3 -0.2 0 to VREF VCC-3 V FB Sink Current ISINK - - 0.3 - - 0.3 mA FB Source Current ISOURCE - - 2 - - 2 mA VINC+ -0.3 0 to 3 VCC -0.3 0 to 3 VCC V VINC- -0.3 0 to 2 2.5 -0.3 0 to 2 2.5 V Reference Section Output Current IREF - 5 10 - 2 10 mA Timing Resistor RT 9 18 50 9 18 50 kΩ Timing Capacitor CT 100 680 106 100 680 106 pF Oscillator Frequency fOSC 1 100 700 1 100 700 kHz Zener Current IZ - - 5 - - 5 mA Operating Temp. TOP -30 25 85 -30 25 75 °C Comparator Input Voltage 4 MB3769A ■ ELECTRICAL CHARACTERISTICS (VCC=15V, TA=25°C) Value Parameter Output Voltage Unit Min Typ Max 4.9 5.0 5.1 V IREF = 1 mA ∆ VRIN 12 V ≤ VCC ≤ 18 V - 2 15 mV ∆ VRLD 1 mA ≤ IREF ≤10 mA - -1 -15 mV ∆ VRTEMP -30 °C ≤ TA ≤ 85 °C - ±200 ±750 µV/ °C Short Circuit Output Current ISC VREF = 0 V 15 40 - mA Oscillator Frequency fOSC RT=18 kΩ CT=680 pF 90 100 110 kHz Voltage Stability ∆ fOSCIN 12 V ≤ VCC ≤ 18 V - ±0.03 - % Temp. Stability ∆ fOSC /∆ T -30 °C ≤ TA ≤ 85 °C - ±2 - % - 2 10 µA Input Bias Current Max. Duty Cycle Dead -time Duty Cycle Set Control 0% Duty Section Input Cycle Threshold Max. Duty Voltage Cycle Error Amplifier Section Condition VREF Input Regulation Reference Load Regulation Section Temp. Stability Oscillator Section Symbol ID Dmax Vd = 1.5 V 75 80 85 % Dset Vd = 0.5 VREF 45 50 55 % VDO - - 3.5 3.8 V VDM - 1.55 1.85 - V 4.5 - - V Discharge Voltage VDH VCC= 7 V, IDTC= -0.3 mA Input Offset Voltage VIO (OP) V3 = 2.5 V - ±2 ±10 mV Input Offset Current IIO (OP) V3 = 2.5 V - ±30 ±300 nA Input Bias Current IIR (OP) V3 = 2.5 V -1 -0.3 - µA Common-Mode Input Voltage VCM (OP) 12 V ≤ VCC ≤ 18 V -0.2 - VCC -3 V Voltage Gain AV (OP) 0.5 V ≤ V3 ≤ 4 V 70 90 - dB Band Width BW AV = 0dB - 8 - MHz Slew Rate SR RL = 10 kΩ, AV = 0dB - 6 - V/µs Common-Mode Rejection Rate CMR VIN = 0 to 10 V 65 80 - dB “H” Level Output Voltage VOH I3 = -2 mA 4.0 4.6 - V “L” Level Output Voltage VOL I3 = 0.3 mA - 0.1 0.5 V 5 MB3769A ■ ELECTRICAL CHARACTERISTICS (Continued) (VCC=15V, TA=25°C) Value Parameter Current Comparator PWM Comparator Section Output Section Over Voltage Detector Under Voltage Out Stop Supply Current * : VCC = 8V 6 Symbol Condition Unit Min Typ Max Input Offset Voltage VIO (C) VIN = 1 V - ±5 ±15 mV Input Bias Current IIB (C) VIN = 1 V -5 -1 - µA Common-Mode Input VoltVCM (C) age - 0 - 2.5 V Voltage Gain AV (C) - - 200 - V/V Response Time td 50 mV over drive - 120 250 ns 0% Duty Cycle VOPO Max. Duty Cycle VOPM “H” Level Output Voltage RT = 18 kΩ CT = 680 pF - 3.5 3.8 V 1.55 1.85 - V VH IOUT = -100 mA 12.5 13.5 - V “L” Level Output Voltage VL IOUT = 100 mA - 1.1 1.3 V Rise Time tr CL = 1000 pF, RL = ∞ - 60 120 ns Fall Time tf CL = 1000 pF, RL = ∞ - 30 80 ns Threshold Voltage VOVP - 2.4 2.5 2.6 V Input Current IIOVP VIN = 0 V -1.0 -0.2 - µA VCC Reset VCC RST - 2.0 3.0 4.5 V Off to On VTHH - 9.2 10.0 10.8 V On to Off VTHL - 7.2 8.0 8.8 V Standby * ISTB RT = 18 kΩ 4 pin Open - 1.5 2.0 mA Operating ICC RT = 18 kW - 8.0 12.0 mA Zener Voltage VZ IZ = 1 mA - 15.4 - V Zener Current IZ V11-7 = 1 V - 0.03 - mA MB3769A Fig. 2 - MB3769A Test Circuit 1.0 V 15.0 V OUTPUT 10 kΩ 16 +IN (C) 15 14 -IN (C) VREF 13 12 11 10 OVP VCC VZ VH COMP in 9 OUT MB3769A +IN (OP) 1 -IN (OP) FB DTC 3 4 2 CT RT GND VL 5 6 7 8 680 pF VFB 1000 pF 18 kΩ VDTC TEST INPUT <tr, tf, td> 3.5 V typ. Voltage at CT 1.5 V typ. 1.05 V tr of COMP-in should be within 20 ns. 1.0 V COMP in 0.95 V 90% 50% OUTPUT 10% tr tf td 7 MB3769A Fig. 3 - MB3769A Operating Timing Soft Start Operation Dead-Time Input Voltage Quick Shutdown Operation 3.5 V 1.85V Triangle Wave Form Error Amp. Output 1.5 V PWM Comparator Output Output Wave Form Comp. Current -in Wave Form Comp. Current +in Wave Form (1 V) Comp. Current Latch Output 2.5 V Voltage at OVP OVP Latch Power Supply Voltage (15 V) 10 V (typ.) 0V 8V (typ.) Over Current Detector Standby Mode Over Voltage Detector Latch OFF 8 3V Over Voltage Detector Standby Mode MB3769A ■ FUNCTIONS 1. Error Amplifier The error amplifier detects the output voltage of the switching regulator. The error amplifier uses a high-speed operational amplifier with an 8 MHz bandwidth (typical) and 6 V/ms slew rate (typical). For ease of use, the common mode input voltage ranges from -0.2 V to VCC-3 V. Figure 4 shows the equivalent circuit. Fig. 4 - MB3769A Equivalent Circuit Differential Amp. VCC VREF To PWM Comp. -IN (OP) 150 Ω +IN (OP) 700 µA GND Protection element 2. Overcurrent Detection Comparator There are two methods for protection of the output transistor of this device from overcurrents; one restricts the transistor’s ontime if an overcurrent that flows through the output transistor is detected from an average output current, and the other detects an overcurrent in the external transistor (FET) and shuts the output down instantaneously. Using average output currents, the peak current of the external transistor (FET) cannot be detected, so an output transistor with a large safe operation area (SOA) margin is required. For the method of detecting overcurrents in the external transistor (FET), the output transistor can be protected against a shorted filter capacitor or power-on surge current. The MB3769A uses dynamic current limiting to detect overcurrents in the output transistor (FET). A high-speed comparator and flip-flop are built-in. To detect overcurrents, compare the voltage at +IN(C) of current detection resistor connected the source of the output transistor (FET), with the reference voltage (connected to -IN(C) ) using a comparator. To prevent output oscillation during overcurrent, flip-flop circuit protects against double pulses occurring within a cycle. The output of overcurrent detector is ORed with other signals at the PWM comparator. See the example Application Example for details on use. Figure 5 shows the equivalent circuit of the over-current detection comparator. 9 MB3769A Fig. 5 - MB3769A Equivalent Circuit Over Current Detection Comparator VREF To PWM Comp. -IN (C) +IN (C) Protection element 3. DTC: Dead Time Control (Soft-Start and Quick Shutdown) The dead time control terminal and the error amplifier output are connected to the PWM comparator. The maximum duty cycle for VDTC (voltage applied to pin 4) is obtained from the following formula (approximate value at low frequency): Duty Cycle = (3.5 - VDTC) x 50 (%) [0% ≤ duty cycle ≤ DMAX (80%) ] The dead time control terminal is used to provide soft start. In Figure 6, the DTC terminal is connected to the VREF terminal through R and C. Because capacitor C does not charge instantaneously when the power is turned on, the output transistor is kept turned off. The DTC input voltage and the output pulse width increase gradually according to the RC time constant so that the control system operates safely. Fig. 6 - MB3769A Soft Start Function VREF VREF C C R1 DTC DTC R2 R Soft Start Soft Start + DTC The quick shutdown function prevents soft start malfunction when the power is turned off and on quickly. After the power is shut down, soft start is disabled because the DTC terminal has low electric potential from the beginning if the power is turned on again before the capacitor is discharged. The MB3769A prevents this by turning on the discharge transistor to quickly discharge the capacitor in the stand-by mode. 10 MB3769A 4. Triangular Wave Oscillator The oscillation frequency is expressed by the following formula: fOSC ~ 1 0.8 x CT x RT + 0.0002 ms [kHz] CT :µF RT :kΩ For master/slave synchronized operation of several MB3769As, the CT and RT terminals of the master MB3769A are connected in the usual way and the CT terminals of the master and slave device (s) are connected together. The slave MB3769A’s RT terminal is connected to it’s VREF terminal to disable the slave’s oscillator. In this case, set 50/n kΩ (n is the number of master and slave ICs) to the upper limit of RT so that internal bias currents do not stop the master oscillation. Fig. 7 - MB3769A Synchronized Operation master RT slave CT VREF RT CT 5. Overvoltage Detector The overvoltage detection circuit shuts the system power down if the switching regulator’s output voltage is abnormal or if abnormal voltage is appeared. The reference voltage is 2.5 V (VREF /2). The system power is shut down if the voltage at pin 13 rises above 2.5 V. The output is kept shut down by the latching circuit until the power supply is turned off (see Figure 3). 6. Stand-by Mode and Under-Voltage Lockout (UVLO) Generally, VGS > 6 to 8 V is required to use power MOSFET for switching. UVLO is set so that output is on at VCC ≥ 10 V (standard) when the power is turned on and is off at VCC ≤ 8 V (standard) when the power is turned off. In the stand-by mode, the power supply current is limited to 2 mA or less when the output is inhibited by the UVLO circuit. When the MB3769A is operated from the 100 VAC line, the power supply current is supplied through resistor R (Figure 8). That is, the IC power supply current is supplied by the AC line through resistor R until operation starts. Current is then supplied from the transformer tertiary winding, eliminating the need for a second power supply. Two volts (typical) of hysteresis are provided for return from operation mode to stand-by mode not to return to stand-by mode until output power is turned on or to avoid malfunction due to noise. 11 MB3769A Fig. 8 - MB3769A Primary Control R C MB3769A 7. Output Section Because the output terminal (pin 9) carries a large current, the collector and emitter of the output transistor are brought out to the VH and VL terminals. In principle, VH is connected to VCC and VL is connected to GND, but VH can be supplied from another power supply (4 to 18 V). Note that VL and GND should be connected as close to the IC package as possible. A capacitor of 0.1 µF or more is inserted between VH and VL (see Figure 9). Fig. 9 - MB3769A Typical Connection Circuit Of Output 12 10 9 7 8 ≥ 0.1 µF 12 MB3769A ■ APPLICATION EXAMPLE Fig. 10 - MB3769A DC - DC Convertor 12 to 18 V 5V 1A 3.6 kΩ 3.3 kΩ 0.1 µF 10 kΩ 330 pF 100 kΩ 1+IN (OP) +IN (C) 16 2-IN (OP) IN (C) 15 2.4 kΩ 20 kΩ VREF 14 3FB 5CT OVP 13 MB3769A VCC 12 6RT VZ 11 7GND VH 10 4DTC OUT 9 8VL R S 220 pF C 51 kΩ 10 kΩ 5.1 kΩ 18 kΩ 1Ω Overcurrent Protection Circuit The waveform at the output FET source terminal is shown in Figure 11. The RC time constant must be chosen so that the voltage glitch in the waveform does not cause erroneous overcurrent detection. This time constant is should be from 5 to 100 ns. A detection current value depends on R or C because a waveform is weakened. To keep this glitch as small as possible, the rectifiers on the transformer secondary winding must be the fast-recovery type. Fig. 11 - MB3769A Output FET Source Point Glitch Point S waveform 13 MB3769A Fig. 12 -Primary Control 100 VAC R + 1 +IN(OP) +IN(C) 16 47 kΩ 2 -IN(OP) -IN(C) 15 22 kΩ 3 FB VREF 14 4 DTC OVP 13 5 CT VCC 12 6 RT VZ 11 7 GND VH 10 + 4.7 µF 22 kΩ 680 18 pF kΩ 15 V *:The resistance (22 Ω) * 22 Ω 10 kΩ 15 kΩ 9 8 as an output current limiter at pin 9 is required when driving the FET which is more than 1000 pF (CGS). Fig. 13 -Secondly Control 0V Secondly power supply 5.1 kΩ 12 V 43 kΩ 10 kΩ 39 kΩ 1000 27 pF kΩ 1 +IN(OP) +IN(C) 16 51 kΩ 2 -IN(OP) -IN(C) 15 3 FB VREF 14 4 DTC OVP 13 5 CT VCC 12 6 RT VZ 11 7 GND VH 10 8 VL 10 kΩ 14 680 pF 18 kΩ OUT 9 MB3769A ■ SHORT PROTECTION CIRCUIT The system power can be shut down to protect the output against intermittent short-circuits or continuous overloads. This protection circuit can be configured using the OVP input as shown in Figure 14. Fig. 14 -Case I. (Over Protection Input) Primary Mode 15 kΩ IN-B 8 3 8.2 kΩ IN-A PC2 4 MB3761 1 9 V0 (5V output) PC1 OUT-B 500 Ω HYS-A 6 5 500 Ω 6.8 kΩ MB3769A 14 20 kΩ PC2 13 7 1 µF 10 kΩ PC1 100 kΩ Fig. 15 -Case II. (Over Protection Input) Secondly Mode V0 (5V output) 14 VREF MB3769A 20 kΩ 15 kΩ IN-B 8 13 6 OUT-B 3 OVP MB3761 8.2 kΩ IN-A 1 2 5 6.8 kΩ HYS-A 1 µF 200 kΩ 15 MB3769A ■ HOW TO SYNCHRONIZE WITH OUTSIDE CLOCK The MB3769A oscillator circuit is shown in Figure 16. CT charge and discharge currents are expressed by the following formula: 5V ICT = ±2 x I1 = ± RT Fig. 16 -Oscillator Circuit VREF 500 Ω 1 kΩ 500 Ω + - I1 2 x I1 2 x I1 S 3.5 V Q R ICT RT - + CT 6 5 (4 x I1) + 2.5 V 300 Ω 1.5 V 150Ω This circuit shows that if the voltage at the CT terminal is set to 1.5 V or less, one oscillation cycle ends and the next cycle starts. An example of an external synchronous clock circuit is shown in Figure 17. Fig. 17 -Typical Connection of Synchronized Outside Clock Circuit tcycle ex. MB74HC04 5 VP MB3769A 6 R(5.1 k Ω) RT CT VP clamp circuit (VL) tP tcycle = 2.5 µs (fEXT = 400 kHz) tP = 0.5 µs RT = 11 k Ω The Figure 18 shows the CT terminal waveform. VTH may be near 2.5 V. In this case, the maximum duty cycle is restricted as shown in the formula below if tP’ = 0. Fig. 18 -Voltage Waveform at CT VCT Dmax= (3.5 - 1.85) + (3.5 - VTH) (3.5 - VL ) + (3.5 - VTH ) 3.5 V VTH ( .. 2.5 V) 1.85 ≤ 59% (VL = 0 V: No clamp circuit) VL When VTH = 2.5 V, CT can be provided by followings. tcycle - tP = 16 1 fOSC x (3.5 - VL) + (3.5 - VTH) fOSC(3.5 - 1.5 ) x 2 tP’ MB3769A fOSC ~ CT ~ 1 0.8 x CT x RT 1 x 0.8 x RT 4 4.5 - VL (tcycle - tP ) [pF] (RT: kΩ, tcycle, tP: ns) Make VL high for a large duty cycle for the clamp circuit. The circuits below can be used because the clamp voltage must be much lower than 1.5 V. Fig. 19 -Clamp Circuit VREF R1 (4.7 kΩ) VREF 8 (1.2 V) 3 (1.2 V) 0.1 µF A R2 (1.2 kΩ) 820 Ω 0.1 µF MB3761 4 5 B In circuit A, R1 and R2 must be determined considering the effects of tP, R, or RT. The transistor saturation voltage must be very small (<0.15 V) for any clamp circuit, so a transistor with a very small VCE (sat) should be used. 17 MB3769A ■ SYNCHRONIZED OUTSIDE CLOCK CIRCUIT Fig. 20 5V 1.No Clamp Circuit (Connect with GND) 1V VP (5 V/div) CT = 150 pF + Prove Capacitor (~ 15 pF) RT = 11 kΩ 5 pin CT (1 V/div) MB74HC04 CT 150 pF VP 5.1 kΩ GND Level (CT) OUT (10 V/div) 10 V 500 nS Fig. 21 5V 2.Clamp Circuit A (Dividing Resistor) 1V VP (5 V/div) CT = 220 pF + Prove capacitor (~ 15 pF) RT = 11 kΩ CT (1 V/div) 5 pin CT 220 pF GND Level (CT) MB74HC04 VP 5.1 kΩ VREF 4.7 kΩ OUT (10 V/div) 10 V 0.1 µF 500 nS 1.2 kΩ Fig. 22 5V 3.Clamp Circuit B (Apply MB3761) 1V VP (5 V/div) CT (1 V/div) CT = 220 pF + Prove capacitor (~ 15 pF) RT = 11 kΩ 5 pin CT 220 pF MB74HC04 VP 5.1 kΩ VREF GND Level (CT) 820 Ω OUT (10 V/div) 10 V 18 500 nS 0.1 µF 8 3 MB3761 4 5 MB3769A Fig. 23 -Test Circuit 15 V (VCC) 12 14 2 15 3 2.5 V 10 1 2.4 kΩ 2.4 kΩ MB3769A 16 4 5 9 OUT 6 11 kΩ 7 8 13 19 MB3769A ■ TYPICAL PERFORMANCE CHARACTERISTICS OVP operating V13 = 5 V Normal operating V13 = 0 V 10.0 8.0 OVP operating 6.0 Fig. 25 -Standby Current vs.Temp. 2 4.0 2.0 0.0 0.0 4.0 8.0 12.0 16.0 Standly Current ISTB (mA) Power Supply Current ICC (mA) Fig. 24 -Power Supply Current vs. Power Supply Voltage (Low Voltage stop of VCC) 20.0 1 0 -30 Power Supply Voltage VCC (V) Fig. 26 -Reference Voltage vs. Temp. ±750 µV/C 5.0 4.9 0 -30 “H” level Output Voltage VOH (V) 20 25 50 Temp. TA (°C) VCC = 15 V TA = 25 °C 2 1 0 0.2 0.4 0.6 “L” level Output Current IOL (mA) 0 25 50 Temp. TA (°C) 5 85 VCC = 15 V TA = 25 °C 4 3 2 1 2 85 3 Fig. 28 -“H” level Output Voltage vs. “H” level Output Current 0 0 Fig. 27 -“L” level Output Voltage vs. “L” level Output Current VCC = 15 V IREF = 1 mA “L” level Output Voltage VOL (V) Reference Voltage VREF (V) 5.1 VCC = 8 V 4 6 8 “H” level Output Current IOH (mA) 10 0.8 MB3769A Fig. 29 -Oscillator Frequency vs. RT, CT 700 500 CT = 100 pF 400 200 CT = 680 pF CT = 220 pF 100 90 80 70 CT = 1000 pF 60 Fig. 30 -“H”, “L” level Output Voltage vs. Oscillator Frequency 4 VH VCC = 15 V TA = 25 °C 3 VH VL 2 VL 1 0 20 k 50 k 100 k 200 k 500 k 1M Frequency fOSC (Hz) Fig. 32 -Oscillator Frequency vs. Temp. VCC = 15 V 50 40 30 CT = 2200 pF 20 7 8 9 10 20 30 40 50 60 70 RT (kΩ) Oscillator Frequency fOSC (%) Oscillator Frequency fOSC (kHz) 300 “H”, “L” level Output Voltage VH, VL (V) TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 100 fOSC = 200 kHz 100 kHz 2 300 kHz 500 kHz 0 -2 Target fOSC = 100 kHz ±2 % typ. 0 25 50 85 Temp. TA (°C) VCC = 15 V CT = 1000 pF TA = 25 °C 80 4 -4 -30 Fig. 31 -Duty Cycle vs. Dead Time Control Voltage Fig. 33 -Dead Time Control Voltage vs. Current(Standby Mode) fOSC = 500 kHz 5.0 60 Duty Cycle (%) Dead Time Control Voltage VDTC (V) ■ 40 20 4.0 VCC = 7 V TA = 25 °C 3.0 2.0 1.0 0 0 1 2 3 4 Dead Time Control Voltage VDTC (V) 5 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 Dead Time Control Current IDTC (mA) 21 MB3769A ■ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Fig. 34 -Gain/Phase vs. Frequency (Set Gv = 60 dB) VCC = 15 V TA = 25 °C Gain (dB) 40 Fig. 35 -Duty cycle vs. Temp. -180 VCC = 15 V CL = 1000 pF VDTC = 2.5 V -240 Phase 20 -300 Gain 0 55 -360 Phase (deg) Duty Cycle (%) 60 fOSC = 200 kHz 50 fOSC = 500 kHz 10 k 100 k 1M 10 M 45 0 -30 Frequency f (Hz) 0 25 50 85 Temp. TA (°C) VCC = 15 V TA = 25 °C 1.5 Fig. 38 -tr/tf of Output and td of Comparator vs. Temp. 160 140 0.5 td 120 0 0 100 200 300 400 500 “L” level Output Current IOL (mA) 600 “H” level Output Voltage VOH (V) Fig. 37 -“H” level Output Voltage vs. “H” level Output Current 22 VCC = 15 V CL = 1000 pF 1.0 14.0 VCC = 15 V TA = 25 °C tr/tf/td (ns) “L” level Output Voltage VOL (V) Fig. 36 -“L” level Output Voltage vs. “L” level Output Current 100 80 tr 60 40 13.5 tf 20 13.0 0 -30 12.5 0 0 100 200 300 400 500 “H” level Output Current IOH (mA) 600 0 -25 50 Temp. TA (°C) 85 MB3769A TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Fig. 39 -OVP Latch Standby Power Supply Current vs. Temp. 4 3 2 0 20 40 60 80 100 Temp. TA (°C) OVP Supply Voltage Reset (V) VCC = 8 V 4 pin open 13 pin = 3 V 5 0 -40 -20 Fig. 40 -OVP Supply Voltage Reset vs. Temp. 5 6 Standby Power Supply Current (mA) ■ 4 3 2 1 0 -40 -20 0 20 40 60 80 100 Temp. TA (°C) 23 MB3769A 16-LEAD PLASTIC DUAL IN-LINE PACKAGE (CASE No.: DIP-16P-M04) 15°MAX +0.20 .770 +.008 (19.55 ) -0.30 -.012 INDEX-1 .244±.010 (6.20±0.25) .300(7.62) TYP INDEX-2 .039 +.012 -0 (0.99 +0.30 ) -0 .060 +.012 -0 (1.52 +0.30 ) -0 .010±.002 (0.25±0.05) .172(4.36)MAX .118(3.00)MIN .100(2.54) TYP .050(1.27) MAX 1990 FUJITSU LIMITED D160335-2C-2 24 .018±.003 (0.46±0.08) .020(0.51)MIN Dimensions in inches (millimeters) MB3769A 16-LEAD PLASTIC FLAT PACKAGE (CASE No.: FPT-16P-M06) .089(2.25)MAX (MOUNTING HEIGHT) .002(0.05)MIN (STAND OFF HEIGHT) +.010 +0.25 (10.15 ) .400 -.008 -0.20 .307±.016 (7.80±0.40) INDEX “B” .050(1.27) TYP .018±.004 (0.45±0.10) “A” .004(0.10) .350(8.89) REF .209±.012 (5.30±0.30) ∅.005(0.13) +0.40 +.016 (6.80 -0.20 ) -.008 .020±.008 (0.50±0.20) +.002 (0.15+0.05 ) .006 -0.02 -.001 M Details of “A” part Details of “B” part .016(0.40) .006(0.15) .008(0.20) .008(0.20) .007(0.18) MAX .027(0.68) MAX 1991 FUJITSU LIMITED F16015S-2C .268 .007(0.18) MAX .027(0.68) MAX Dimensions in inches (millimeters) 25 MB3769A FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 1015, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211, Japan Tel: (044) 754-3753 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED No. 51 Bras Basah Road, Plaza By The Park, #06-04 to #06-07 Singapore 189554 Tel: 336-1600 Fax: 336-1609 All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for construction purposes is not necessarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. The information contained in this document are not intended for use with equipments which require extremely high reliability such as aerospace equipments, undersea repeaters, nuclear control systems or medical equipments for life support. F9601 FUJITSU LIMITED Printed in Japan