CET CED83A3G N-channel enhancement mode field effect transistor Datasheet

CED83A3G/CEU83A3G
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
30V, 93A, RDS(ON) = 4.8mΩ @VGS = 10V.
RDS(ON) = 7.4mΩ @VGS = 4.5V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
D
Lead free product is acquired.
TO-251 & TO-252 package.
G
D
G
S
CEU SERIES
TO-252(D-PAK)
ABSOLUTE MAXIMUM RATINGS
Parameter
G
D
S
CED SERIES
TO-251(I-PAK)
Tc = 25 C unless otherwise noted
Symbol
Limit
30
Units
V
VGS
±20
V
ID
93
A
IDM
372
A
75
W
Drain-Source Voltage
VDS
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
S
a
Maximum Power Dissipation @ TC = 25 C
PD
- Derate above 25 C
Operating and Store Temperature Range
0.5
W/ C
TJ,Tstg
-55 to 175
C
Thermal Characteristics
Symbol
Limit
Units
Thermal Resistance, Junction-to-Case
Parameter
RθJC
2
C/W
Thermal Resistance, Junction-to-Ambient
RθJA
62.5
C/W
Rev 1. 2010.Oct
http://www.cetsemi.com
Details are subject to change without notice .
1
CED83A3G/CEU83A3G
Electrical Characteristics
Parameter
Tc = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
30
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 30V, VGS = 0V
1
µA
IGSSF
VGS = 20V, VDS = 0V
100
nA
IGSSR
VGS = -20V, VDS = 0V
-100
nA
Off Characteristics
V
On Characteristics b
Gate Threshold Voltage
Static Drain-Source
On-Resistance
VGS(th)
RDS(on)
VGS = VDS, ID = 250µA
3
V
VGS = 10V, ID = 30A
1
3.8
4.8
mΩ
VGS = 4.5V, ID = 20A
5.4
7.4
mΩ
Dynamic Characteristics c
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDS = 15V, VGS = 0V,
f = 1.0 MHz
2855
pF
510
pF
390
pF
Switching Characteristics c
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 15V, ID = 40A,
VGS= 4.5V, RGEN= 4.7Ω
31
62
ns
26
52
ns
ns
45
90
Turn-Off Fall Time
tf
24
48
ns
Total Gate Charge
Qg
37
48.1
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 15V, ID = 40A,
VGS = 5V
7
nC
17
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
IS
Drain-Source Diode Forward Voltage b
VSD
VGS = 0V, IS = 50A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 0.1mH, IAS =55A, VDD = 24V, RG = 25Ω, Starting TJ = 25 C
2
50
A
1.2
V
CED83A3G/CEU83A3G
25
150
25 C
20
ID, Drain Current (A)
ID, Drain Current (A)
VGS=10,8,6,4V
15
10
VGS=3V
5
0
0
0.2
0.4
0.6
0.8
0
-55 C
1.5
3
4.5
6
7.5
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
Ciss
1800
1200
Coss
600
Crss
0
5
10
15
20
25
2.2
1.9
ID=30A
VGS=10V
1.6
1.3
1.0
0.7
0.4
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
ID=250µA
1.1
1.0
0.9
0.8
0.7
0.6
-50
TJ=125 C
Figure 1. Output Characteristics
IS, Source-drain current (A)
C, Capacitance (pF)
VTH, Normalized
Gate-Source Threshold Voltage
30
VGS, Gate-to-Source Voltage (V)
2400
1.2
60
VDS, Drain-to-Source Voltage (V)
3000
1.3
90
0
1
3600
0
120
-25
0
25
50
75
100
125
150
VGS=0V
10
2
10
1
10
0
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
5
10
VDS=15V
ID=40A
3
2
1
0
0
3
RDS(ON)Limit
4
ID, Drain Current (A)
VGS, Gate to Source Voltage (V)
CED83A3G/CEU83A3G
10
20
30
40
10
2
10
1
10
50
100ms
1ms
10ms
DC
TC=25 C
TJ=150 C
Single Pulse
0
10
-1
10
0
10
1
10
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
RL
V IN
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
Figure 9. Switching Test Circuit
10
0
D=0.5
0.2
10
-1
PDM
0.1
t1
0.05
0.02
0.01
Single Pulse
10
-2
10
-5
t2
1. RθJA (t)=r (t) * RθJA
2. RθJA=See Datasheet
3. TJM-TA = P* RθJC (t)
4. Duty Cycle, D=t1/t2
10
-4
10
-3
10
-2
10
-1
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
0
10
1
2
Similar pages