PRELIMINARY Data Sheet No. PD60249 revB IRS2110(-1,-2,S)PbF IRS2113(-1,-2,S)PbF HIGH AND LOW SIDE DRIVER Features • Floating channel designed for bootstrap operation Product Summary • Fully operational to +500 V or +600 V VOFFSET (IRS2110) 500 V max. • Tolerant to negative transient voltage, dV/dt immune (IRS2113) 600 V max. • Gate drive supply range from 10 V to 20 V IO+/2 A/2 A • Undervoltage lockout for both channels • 3.3 V logic compatible VOUT 10 V - 20 V • Separate logic supply range from 3.3 V to 20 V ton/off (typ.) 130 ns & 120 ns • Logic and power ground ±5V offset • CMOS Schmitt-triggered inputs with pull-down Delay Matching (IRS2110) 10 ns max. • Cycle by cycle edge-triggered shutdown logic (IRS2113) 20 ns max. • Matched propagation delay for both channels Packages • Outputs in phase with inputs Description The IRS2110/IRS2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 V or 600 V. 14-Lead PDIP IRS2110 and IRS2113 16-Lead PDIP (w/o leads 4 & 5) IRS2110-2 and IRS2113-2 14-Lead PDIP (w/o lead 4) IRS2110-1 and IRS2113-1 Typical Connection 16-Lead SOIC IRS2110S and IRS2113S (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35. Symbol Definition VB High side floating supply voltage VS Min. Max. (IRS2110) -0.3 520 (Note 1) (IRS2113) -0.3 620 (Note 1) High side floating supply offset voltage VB - 20 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VCC Low side fixed supply voltage -0.3 20 (Note 1) VLO Low side output voltage -0.3 VCC + 0.3 VDD Logic supply voltage -0.3 VSS+20 (Note 1) VSS Logic supply offset voltage VCC - 20 VCC + 0.3 VIN Logic input voltage (HIN, LIN, & SD) VSS - 0.3 VDD + 0.3 — 50 dVs/dt PD RTHJA Allowable offset supply voltage transient (Fig. 2) Package power dissipation @ TA ≤ +25 °C Thermal resistance, junction to ambient (14 lead DIP) — 1.6 (16 lead SOIC) — 1.25 (14 lead DIP) — 75 (16 lead SOIC) — 100 150 TJ Junction temperature — TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 Units V V/ns W °C/W °C Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply. Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential. Typical ratings at other bias conditions are shown in Figs. 36 and 37. Symbol VB VS Definition High side floating supply absolute voltage High side floating supply offset voltage Min. Max. VS + 10 VS + 20 (IRS2110) Note 2 500 (IRS2113) Note 2 600 VB VHO High side floating output voltage VS VCC Low side fixed supply voltage 10 20 VLO Low side output voltage 0 VCC VDD Logic supply voltage VSS Logic supply offset voltage VIN TA VSS + 3 VSS + 20 -5 (Note 3) 5 Logic input voltage (HIN, LIN & SD) VSS VDD Ambient temperature -40 125 Units V °C Note 2: Logic operational for VS of -4 V to +500 V. Logic state held for VS of -4 V to -VBS. (Refer to the Design Tip DT97-3) Note 3: When VDD < 5 V, the minimum VSS offset is limited to -VDD. www.irf.com 2 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, CL = 1000 pF, TA = 25 °C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol Definition Figure Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay toff Turn-off propagation delay 8 — 120 150 tsd Shutdown propagation delay 9 — 130 160 tr Turn-on rise time 10 — 25 35 tf Turn-off fall time 11 — 17 25 — — — — — — 10 20 MT Delay matching, HS & LS turn-on/off 7 (IRS2110) (IRS2113) — 130 160 VS = 0 V VS = 500 V/600 V ns Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15 V, TA = 25 °C and VSS = COM unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Figure Min. Typ. Max. Units Test Conditions VIH Logic “1” input voltage 12 9.5 — — VIL Logic “0” input voltage 13 — — 6.0 VOH High level output voltage, VBIAS - VO 14 — — 1.2 VOL Low level output voltage, VO 15 — — 0.15 IO = 20 mA ILK Offset supply leakage current 16 — — 50 VB=VS = 500 V/600 V IQBS Quiescent VBS supply current 17 — 125 230 IQCC Quiescent VCC supply current 18 — 180 340 IQDD Quiescent VDD supply current 19 — 15 30 IIN+ Logic “1” input bias current 20 — 20 40 VIN = VDD IIN- Logic “0” input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold 21 — — 1.0 VIN = 0 V 22 7.5 8.6 9.7 23 7.0 8.2 9.4 24 7.4 8.5 9.6 25 7.0 8.2 9.4 IO+ Output high short circuit pulsed current 26 2.0 2.5 — IO- Output low short circuit pulsed current 27 2.0 2.5 — VBSUV+ VBSUVVCCUV+ VCCUV- V µA VIN = 0 V or VDD V A www.irf.com IO = 0 A VO = 0 V, VIN = VDD PW ≤ 10 µs VO = 15 V, VIN = 0V PW ≤ 10 µs 3 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Functional Block Diagram Lead Definitions Symbol Description VDD HIN SD LIN VSS VB HO VS VCC LO COM www.irf.com Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return 4 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IRS2110/IRS2113 IRS2110S/IRS2113S 14 Lead PDIP w/o lead 4 16 Lead PDIP w/o leads 4 & 5 IRS2110-1/IRS2113-1 IRS2110-2/IRS2113-2 Part Number www.irf.com 5 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY HV = 10 to 500V/600V Vcc =15V 10KF6 10 µF 0.1 µF 9 3 10 5 7 11 12 1 13 + 200 µH 0.1 µF 6 10KF6 HO OUTPUT MONITOR 100µF dVS >50 V/ns dt 10KF6 2 IRF820 Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit Vcc =15V 10 µF 0.1 µF 9 3 5 7 10 HIN SD 0.1 µF 6 11 CL 1 LO 12 LIN HO VB + 10 15V µF VS (0 to 500V/600V) 2 Figure 3. Switching Time Test Circuit 10 µF CL 13 ! ! Figure 4. Switching Time Waveform Definition "# ! Figure 5. Shutdown Waveform Definitions www.irf.com Figure 6. Delay Matching Waveform Definitions 6 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 250 Turn-on Delay Time (ns) Turn-On Delay Time (ns) Turn-On (ns) Turn-onDelay DelayTime Time (ns 250 200 150 Max. 100 Typ. 50 150 -25 0 25 50 75 100 Typ. 100 50 0 0 -50 Max. 200 10 125 12 14 16 18 20 V B IAS Supply V oltage (V ) o Temperature( C) Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. Supply Voltage 250 250 Turn-On Delay Time (ns) M ax. Turn-Off Time Turn-Off Time (ns)(ns) 200 Typ. 150 100 50 200 150 Max. 100 Typ. 50 0 -50 0 0 2 4 6 8 10 12 14 16 18 20 V DD Supply Voltage (V) Figure 7C. Turn-On Time vs. V DD Supply Voltage 0 25 50 75 100 125 o Temperature( C) Figure 8A. Turn-Off Time vs. Temperature 250 Turn-Off Delay Time Turn-Off Delay Time (ns) (ns) 250 Turn-Off Time (ns) Turn-Off (ns) -25 200 Max. 150 Typ. 100 50 0 10 12 14 16 18 V BIAS Supply Voltage (V) Figure 8B. Turn-Off Time vs. Supply Voltage www.irf.com 20 M ax. 200 150 Typ. 100 50 0 0 2 4 6 8 10 12 14 16 18 20 VDD Supply Voltage (V) V S l V lt (V) Figure 8C. Turn-Off Time vs. VDD Supply Voltage 7 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 250 SDSD Propagation Delay (ns) Propagation delay (ns SDSD Propagation Delay (ns)(ns Propagation Delay 250 200 150 Max. 100 Typ. 50 0 -50 -25 0 25 50 75 100 200 Max. 150 Typ. 100 50 0 10 125 12 14 16 18 20 V BIAS Supply Voltage (V) Temperature (oC) Figure 9A. Shutdown Time vs. Temperature Figure 9B. Shutdown Time vs. Supply Voltage 250 100 200 Turn-On Rise Time (ns) Shutdown Delay Time (ns) M ax. 150 Typ. 100 50 80 60 40 M ax. Typ. 20 0 0 2 4 0 6 8 10 12 14 16 18 20 V DD Supply Voltage (V) -50 0 25 50 75 100 125 100 125 Temperature (o C ) Figure 10A. Turn-On Rise Time vs. Temperature Figure 9C. Shutdown Time vs. V DD Supply Voltage 50 Turn-Off Fall Time (ns) 100 80 Turn-Off Fall Time (ns) Turn-On Rise Time (ns) Turn-On Rise Time (ns) -25 60 Max. 40 Typ. 20 0 40 30 Max. 20 Typ. 10 0 10 12 14 16 18 VBIAS Supply Voltage (V) Figure 10B. Turn-On Rise Time vs. Voltage www.irf.com 20 -50 -25 0 25 50 75 Temperature (°C) Figure 11A. Turn-Off Fall Time vs. Temperature 8 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 50 Logic “1”Logic Input Threshold "1" Input Threshold (V) (V) 15.0 Turn-OffTurn-Off FallFall Time (ns) Time (ns) 40 30 20 Max. Typ. 10 0 10 12 14 16 18 12.0 20 Max Min. 9.0 6.0 3.0 0.0 -50 -25 0 25 VBIAS Supply Voltage (V) 15 12 Max. 9 6 3 0 2 4 6 8 10 12 14 16 18 9.0 6.0 Max. Min. 3.0 0.0 20 -50 -25 0 9 Min. 6 3 0 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Figure 13B. Logic “0” Input Threshold vs. Voltage www.irf.com 50 75 100 125 Figure 13A. Logic “0” Input Threshold vs. Temperature High Level Output Voltage (V) High Level Output Voltage (V) Input Threshold (V) LogicLogic “0”"0"Input Threshold (V) 12 6 25 Temperature (°C) 15 4 125 12.0 Figure 12B. Logic “1” Input Threshold vs. Voltage 2 100 15.0 VDD Logic Supply Voltage (V) 0 75 Figure 12A. Logic “1” Input Threshold vs. Temperature Input Threshold (V) LogicLogic “0”"0"Input Threshold (V) Logic Logic “1” "Input Threshold 1" Input Threshold (V) (V) Figure 11B. Turn-Off Fall Time vs. Voltage 0 50 Temperature (°C) 5.00 4.00 3.00 2.00 Max. 1.00 0.00 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 14A. High Level Output vs. Temperature 9 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 0.20 Low Level Outout Voltage (V) High Level Ouput Voltage (V) 5.00 4.00 3.00 2.00 Max. 1.00 0.00 10 12 14 16 18 20 0.16 Max. 0.12 0.08 0.04 0.00 -50 -25 0 25 50 75 Temperature (oC) VBIAS Supply Voltage (V) 0.20 0.16 Max. 0.12 0.08 0.04 0.00 10 12 14 16 18 20 500 400 300 200 100 Max. 0 -50 -25 0 25 50 75 100 125 Temperature (oC) VCC Supply Voltage (V) Figure 15B. Low Level Output vs. Supply Voltage Figure 16A. Offset Supply Current vs. Temperature 500 500 400 VBS Supply Current (µA) Offset Supply Leakage Current (µA) 125 Figure 15A. Low Level Output vs. Temperature Offset Supply Leakage Current (µA) Low Level Outout Voltage (V) Figure 14B. High Level Output vs. Voltage 100 300 200 100 Max. 0 400 300 Max. 200 Typ. 100 0 0 100 200 300 400 500 VB Boost Voltage (V) Figure 16B. Offset Supply Current vs. Voltage www.irf.com 600 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 17A. VBS Supply Current vs. Temperature 10 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF 500 625 400 500 V VCC Supply Current Current (µA) (µA) CC Supply VBS Supply Current Current (µA) (µA) V BS Supply PRELIMINARY 300 200 Max. 100 Typ. 375 Max. 250 Typ. 125 0 0 10 12 14 16 18 -50 20 -25 0 625 75 100 125 100 VDD Supply Current (µA) VVCC Supply Current Current (µA) (µA) CC Supply 50 Figure 18A. VCC Supply Current vs. Temperature Figure 17B. VBS Supply Current vs. Voltage 500 375 250 Max. 125 Typ. 0 80 60 40 Max. 20 Typ. 0 10 12 14 16 18 20 -50 -25 Figure 18B. VCC Supply Current vs. Voltage 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Figure 19B. VDD Supply Current vs. V DD Voltage www.irf.com 25 50 75 100 125 100 125 Figure 19A. VDD Supply Current vs. Temperature Logic “1” Input Bias Current (µA) 60 0 Temperature (oC) VCC Fixed Supply Voltage (V) VDDSupply Supply Current (µA) (µA) VDD Current 25 Temperature (oC) VBS Floating Supply Voltage (V) 100 80 60 40 Max. 20 Typ. 0 -50 -25 0 25 50 75 Temperature (oC) Figure 20A. Logic “1” Input Current vs. Temperature 11 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 Logic “0” Input Bias Current (µA) Logic “1”Logic Input Bias (µA) “1” Input BiasCurrent Current (µA) PRELIMINARY 5.00 4.00 3.00 2.00 Max. 1.00 0.00 -50 -25 0 5 4 3 2 1 0 2 4 6 8 10 12 100 125 14 16 18 20 10.0 Max. 9.0 Typ. 8.0 Min. 7.0 6.0 -50 -25 0 25 50 75 100 125 Temperature (oC) Figure 21B. Logic “0” Input Current vs. V DD Voltage Figure 22. VBS Undervoltage (+) vs. Temperature 11.0 11.0 VCC Undervoltage Lockout + (V) VBS Undervoltage Lockout - (V) 75 11.0 VDD Logic Supply Voltage (V) 10.0 Max. 9.0 Typ. 8.0 7.0 50 Figure 21A. Logic “0” Input Current vs. Temperature VBS Undervoltage Lockout + (V) Logic “0” Input Bias Current Logic “0” Input Bias Current (µA) (µA) Figure 20B. Logic “1” Input Current vs. V DD Voltage 0 25 Temperature (oC) VDD Logic Supply Voltage (V) Min. 6.0 -50 -25 0 25 50 75 100 125 10.0 Max. 9.0 Typ. 8.0 Min. 7.0 6.0 -50 Temperature (oC) Figure 23. VBS Undervoltage (-) vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com -25 0 25 50 75 100 125 Temperature (oC) Figure 24. VCC Undervoltage (+) vs. Temperature 12 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 5.00 Output Output Source SourceCurrent Current (A) (A) VCC Undervoltage Lockout - (V) 11.0 10.0 Max. 9.0 Typ. 8.0 7.0 Min. -25 0 25 50 75 100 3.00 Typ. Min. 2.00 1.00 0.00 -50 6.0 -50 4.00 125 -25 0 4.00 3.00 2.00 Typ. Min. 0.00 10 100 125 12 14 16 18 4.00 3.00 Typ. Min. 2.00 1.00 0.00 -50 20 -25 0 VBIAS Supply Voltage (V) 25 50 75 320V Junction Temperature (oC) 150 4.00 3.00 2.00 Typ. Min. 0.00 12 14 16 125 Figure 27A. Output Sink Current vs. Temperature 5.00 10 100 Temperature (oC) Figure 26B. Output Source Current vs. Voltage Output Sink Current (A) Output Sink Current (A) 75 5.00 Output Sink Current (A) Output Sink Current (A) Output Output Source SourceCurrent Current (A) (A) 5.00 1.00 50 Figure 26A. Output Source Current vs. Temperature Figure 25. VCC Undervoltage (-) vs. Temperature 1.00 25 Temperature (°C) Temperature (oC) Temperature (°C)o Temperature ( C) 18 VBIAS Supply Voltage (V) Figure 27B. Output Sink Current vs. Voltage 20 125 140V 100 75 10V 50 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 28. IRS2110/IRS2113 TJ vs. Frequency (IRFBC20) RGATE = 33 Ω, VCC = 15 V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 13 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 320V 125 140V 100 75 10V 50 25 0 1E+2 1E+3 1E+4 1E+5 10V 75 50 25 75 50 25 1E+5 Junction Temperature (oC) 10V 1E+4 100 10V 75 50 25 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 32. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC20) RGATE = 33 Ω, VCC = 15 V 140V 125 100 10V 75 50 25 1E+5 1E+6 Frequency (kHz) Figure 33. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC30) RGATE = 22 Ω, VCC = 15 V 320V 140V 150 Junction Temperature (oC) 320V 150 1E+4 140V 125 0 1E+2 1E+6 Figure 31. IRS2110/IRS2113 TJ vs. Frequency (IRFPE50) RGATE = 10 Ω, VCC = 15 V 1E+3 1E+6 320V Frequency (kHz) Junction Temperature (oC) 1E+5 150 100 www.irf.com 1E+4 140V 125 0 1E+2 1E+3 Figure 30. IRS2110/IRS2113 TJ vs. Frequency (IRFBC40) RGATE = 15 Ω, VCC = 15 V 320V 150 Junction Temperature (oC) 100 Frequency (kHz) Figure 29. IRS2110/IRS2113 TJ vs. Frequency (IRFBC30) RGATE = 22 Ω, VCC = 15 V 1E+3 140V 125 0 1E+2 1E+6 Frequency (kHz) 0 1E+2 320V 150 Junction Temperature (oC) o Junction Temperature p ( ) ( C) 150 125 10V 100 75 50 25 0 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) Figure 34. IRS2110S/IRS2113S TJ vs. Frequency (IRFBC40) RGATE = 15 Ω, VCC = 15 V 14 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 320V 140V 10V 125 100 75 50 25 0 1E+2 -2.0 Typ. -4.0 -6.0 -8.0 -10.0 1E+3 1E+4 1E+5 1E+6 Frequency (kHz) 10 12 14 16 18 20 VBS Floating Supply Voltage (V) Figure 35. IRS2110S/IRS2113S TJ vs. Frequency (IRFPE50) RGATE = 10 Ω, VCC = 15 V VSS Logic Supply Offset Voltage (V) 0.0 VS Offset Supply Voltage (V) Junction Temperature (oC) p ( ) 150 Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage 20.0 16.0 12.0 8.0 Typ. 4.0 0.0 10 12 14 16 18 20 VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage www.irf.com 15 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Case Outlines 14-Lead PDIP 14-Lead PDIP w/o Lead 4 www.irf.com 01-6010 01-3002 03 (MS-001AC) 01-6010 01-3008 02 (MS-001AC) 16 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY 16 Lead PDIP w/o Leads 4 & 5 16-Lead SOIC (wide body) www.irf.com 01-6015 01-3010 02 01 6015 01-3014 03 (MS-013AA) 17 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY Tape & Reel 16-Lead SOIC LOAD ED TA PE FEED DIRECTION A B H D F C N OT E : CO NTROLLING D IM ENSION IN MM E G C A R R I E R T A P E D IM E N S I O N F O R 1 6 S O IC W M e tr ic Im p e ri al Co d e M in M ax M in M ax A 1 1 .9 0 1 2. 10 0. 46 8 0 .4 7 6 B 3 .9 0 4 .1 0 0. 15 3 0 .1 6 1 C 1 5 .7 0 1 6. 30 0. 61 8 0 .6 4 1 D 7 .4 0 7 .6 0 0. 29 1 0 .2 9 9 E 1 0 .8 0 1 1. 00 0. 42 5 0 .4 3 3 F 1 0 .6 0 1 0. 80 0. 41 7 0 .4 2 5 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1 .6 0 0. 05 9 0 .0 6 2 F D C B A E G H R E E L D IM E N S I O N S F O R 1 6 S O IC W M e tr ic Im p e ri al Co d e M in M ax M in M ax A 32 9. 60 3 3 0 .2 5 1 2 .9 7 6 1 3 .0 0 1 B 2 0 .9 5 2 1. 45 0. 82 4 0 .8 4 4 C 1 2 .8 0 1 3. 20 0. 50 3 0 .5 1 9 D 1 .9 5 2 .4 5 0. 76 7 0 .0 9 6 E 9 8 .0 0 1 0 2 .0 0 3. 85 8 4 .0 1 5 F n /a 2 2. 40 n /a 0 .8 8 1 G 1 8 .5 0 2 1. 10 0. 72 8 0 .8 3 0 H 1 6 .4 0 1 8. 40 0. 64 5 0 .7 2 4 www.irf.com 18 IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF PRELIMINARY LEADFREE PART MARKING INFORMATION Part number Date code S IRxxxxxx YWW? Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released IR logo ?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 14-Lead PDIP IRS2110PbF 14-Lead PDIP IRS2110-1PbF 14-Lead PDIP IRS2113PbF 14-Lead PDIP IRS2113-1PbF 16-Lead PDIP IRS2110-2PbF 16-Lead PDIP IRS2113-2PbF 16-Lead SOIC IRS2110SPbF 16-Lead SOIC IRS2113SPbF 16-Lead SOIC Tape & Reel IRS2110STRPbF 16-Lead SOIC Tape & Reel IRS2113STRPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice 5/11/2006 www.irf.com 19