IDT IDT74FCT574AL Fast cmos octal d registers (3-state) Datasheet

IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
D REGISTERS (3-STATE)
IDT54/74FCT574/A/C
FEATURES:
DESCRIPTION:
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The FCT574 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the OE input is high, the
outputs are in the high-impedance state.
IDT54/74FCT574 equivalent to FAST™ speed and drive
IDT54/74FCT574A up to 30% faster than FAST
IDT54/74FCT574C up to 50% faster than FAST
IOL = 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
Edge triggered master/slave, D-type flip-flops
Buffered common clock and buffered common three-state control
Military product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
• Commercial: SOIC
• Military: CERDIP, LCC, CERPACK
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT574 has non-inverting outputs with respect to the data at the D
inputs.
FUNCTIONAL BLOCK DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
CP
D
CP
D
CP
CP
D
D
CP
D
CP
D
CP
D
CP
D
CP
Q
Q
Q
Q
Q
Q
Q
Q
O0
O1
O2
O3
O4
O5
O6
O7
OE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JUNE 2000
1
c
1999 Integrated Device Technology, Inc.
DSC-5428/-
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
3
18
O1
D2
4
D3
5
D4
6
D5
17
O2
16
O3
15
O4
7
14
O5
D6
8
13
O6
D7
9
12
O7
10
11
CP
GND
D20-1
SO 20-2
E20-1
D2
4
D3
5
D4
6
D5
7
D6
8
3
2
L20-2
9
10
Commercial
–0.5 to +7
Military
–0.5 to +7
Unit
V
–0.5 to VCC
–0.5 to VCC
V
0 to +70
–55 to +125
°C
–55 to +125
–65 to +135
°C
TSTG
Temperature Under
Bias
Storage Temperature
–55 to +125
–65 to +150
°C
PT
Power Dissipation
0.5
0.5
W
IOUT
DC Output Current
120
120
mA
TBIAS
12
13
O1
17
O2
16
O3
15
O4
14
O5
PIN DESCRIPTION
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
TA
11
18
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
VTERM(3)
19
1
CERDIP/ SOIC/ CERPACK
TOP VIEW
Symbol
VTERM(2)
20
O0
D1
O6
O0
V CC
19
O7
2
OE
D0
INDEX
CP
V CC
D0
20
GND
1
D7
OE
D1
PIN CONFIGURATION
Pin Names
DN
CP
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Max.
10
Unit
pF
COUT
Output
Capacitance
VOUT = 0V
8
12
pF
(1)
8-link
NOTE:
1. This parameter is measured at characterization but not tested.
2
Outputs Internal
Function
OE
CP
DN
ON
QN
Hi-Z
H
H
L
L
H
H
L
H
↑
↑
↑
↑
X
X
L
H
L
H
Z
Z
L
H
Z
Z
NC
NC
H
L
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
NC = No Change
↑ = LOW-to-HIGH transition
2. Input and VCC terminals only.
Typ.
6
Active LOW 3-state Output Enable Input
Load Register
3. Outputs and I/O terminals only.
Conditions
VIN = 0V
OE
Inputs
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed VCC by +.5V unless otherwise noted.
Parameter(1)
Input Capacitance
ON
Clock Pulse for the register. Enters data on LOW-to-HIGH
transition.
3-State Outputs (true)
FUNCTION TABLE
8-link
Symbol
CIN
Description
D Flip-Flop Data Inputs
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
VIL
Input LOW Level
Guaranteed Logic LOW Level
II H
Input HIGH Current
VCC = Max.
II L
IOZH
VI = VCC
Input LOW Current
Off State (High Impedance)
VCC = Max.
Output Current
IOZL
Min.
2
Typ.(2)
—
Max.
—
Unit
V
—
—
0.8
V
—
—
5
µA
VI = 2.7V
—
—
5(4)
VI = 0.5V
—
—
–5(4)
VI = GND
—
—
–5
VO = VCC
—
—
10
VO = 2.7V
—
—
10(4)
VO = 0.5V
—
—
–10(4)
VO = GND
—
—
–10
µA
VIK
Clamp Diode Voltage
VCC = Min., IN = –18mA
—
–0.7
–1.2
V
IOS
Short Circuit Current
VCC = Max.(3), VO = GND
–60
–120
—
mA
VOH
Output HIGH Voltage
VCC = 3V, VIN = VLC or VHC, IOH = –32µ A
VHC
VCC
—
V
VCC = Min.
IOH = –300µ A
VHC
VCC
—
VIN = VIH or VIL
IOH = –12mA MIL.
2.4
4.3
—
IOH = –15mA COM'L.
2.4
4.3
—
VCC = 3V, VIN = VLC or VHC, IOL = 300µ A
—
GND
VLC
VCC = Min.
IOL = 300µ A
—
GND
VLC(4)
VIN = VIH or VIL
IOL = 32mA MIL.
—
0.3
0.5
IOL = 48mA COM'L.
—
0.3
0.5
VOL
Output LOW Voltage
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
3
V
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol
ICC
Test Conditions(1)
Parameter
Quiescent Power Supply Current
VCC = Max.
VIN ≥ VHC; VIN ≤ VLC
VCC = Max.
VIN = 3.4V(3)
Min.
Typ.(2)
Max.
Unit
—
0.2
1.5
mA
—
0.5
2
mA
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
One Input Toggling
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
—
0.15
0.25
mA/
MHz
IC
Total Power Supply Current(6)
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
1.7
4
mA
VIN = 3.4V
VIN = GND
—
2.2
6
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
Eight Bits Toggling
fi = 2.5MHz
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
4
7.8(5)
VIN = 3.4V
VIN = GND
—
6.2
16.8(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
54/74FCT574
Com'l.
Mil.
Symbol
tPLH
tPHL
Parameter
Propagation Delay
CP to ON
tPZH
tPZL
tPHZ
tPLZ
tSU
Output Enable Time
tH
tW
Output Disable Time
Set-up Time HIGH
or LOW, DN to CP
Hold Time HIGH
or LOW, DN to CP
CP Pulse Width
HIGH or LOW
Conditions(1)
CL = 50pF
RL = 500Ω
54/74FCT574A
Com'l.
Mil.
54/74FCT574C
Com'l.
Mil.
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.
Unit
2
10
2
11
2
6.5
2
7.2
2
5.2
2
6.2
ns
1.5
12.5
1.5
14
1.5
6.5
1.5
7.5
1.5
5.5
1.5
6.2
ns
1.5
8
1.5
8
1.5
5.5
1.5
6.5
1.5
5
1.5
5.7
ns
2
—
2
—
2
—
2
—
2
—
2
—
ns
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
7
—
7
—
5
—
6
—
5
—
6
—
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
V CC
Test
7.0V
Switch
Open Drain
500 Ω
Disable Low
V OUT
V IN
Pulse
Generator
D.U.T.
All Other Tests
50pF
R
Closed
Enable Low
T
C
Open
8-link
500 Ω
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
L
O ctal lin k
PULSE WIDTH
SET-UP, HOLD, AND RELEASE TIMES
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
tH
t SU
TIM ING
INPUT
ASYNCHRONOUS C ONTROL
PRES ET
CLEAR
ETC.
SYNCHRO NOUS CONTRO L
PRES ET
CLEAR
CLOCK ENABLE
ETC.
t REM
t SU
LO W -HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW -HIGH
PULSE
1.5V
3V
1.5V
0V
tH
O ctal lin k
O ctal lin k
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENAB LE
SAM E PHASE
INPUT TRANSITION
t PLH
t PH L
OUTPUT
t PLH
OPPOSITE P HASE
INPUT TRANSITION
t PH L
3V
1.5V
0V
DISA BLE
3V
CO NTROL
INPUT
1.5V
t PZL
V OH
1.5V
V OL
OUTPUT
NO RM A LLY
LO W
3V
1.5V
0V
SW ITCH
CLOSE D
O ctal lin k
SW ITCH
OPEN
3.5V
3.5V
1.5V
0.3V
t PZH
OUTPUT
NO RM A LLY
HIGH
0V
t PLZ
V OL
t PHZ
0.3V
V OH
1.5V
0V
0V
O ctal lin k
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; Zo ≤ 50Ω; tF ≤ 2.5ns;
tR ≤ 2.5ns.
6
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
Temp. Range
FCT
XXXX
XX
X
Device Type
Package
Process
Blank
B
Comm ercial
M IL-STD-883, Class B
SO
Comm ercial Options
Sm all Outline IC (SO 20-2)
D
E
L
Military O ptions
CERDIP (D20-1)
CERPACK (E20-1)
Leadless Chip Carrier (L20-2)
574
574A
574C
Fast CMOS Octal D Register (3-State)
54
74
– 55°C to +125°C
– 40°C to +85°C
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7
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