Mitsubishi M52342FP Pll-split vif/sif ic Datasheet

MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M52342FP is IF signal-processing IC for VCRs and TVs. It
enable the PLL detection system despite size as small as that of
conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF
limiter, FM detector, QIF AGC and EQ AMP.
FEATURES
•
•
•
•
1
24 EQ F/B
AFT OUT
2
23 APC FILTER
RF AGC OUT
3
22 VIDEO OUT
VIF IN
4
21 Vreg. OUT
VIF IN
5
20 Vreg. OUT
Video detection output is 2VP-P. It has built-in EQ AMP.
The package is a 24-pin flat package, suitable for space saving.
The video detector uses PLL for full synchronous detection
circuit. It produces excellent characteristics of DG, DP, 920kHz
beat, and cross color.
Dynamic AGC realizes high speed response with only single
filter.
Video IF and sound IF signal processings are separated from
each other. VCO output is used to obtain intercarrier. This PLLSPLIT method and built-in QIF AGC provide good sound
sensitivity and reduces buzz.
As AFT output voltage uses the APC output voltage, VCO coil is
not used.
Audio FM demodulation uses PLL system, so it has wide
frequency range with no external parts and no adjustment.
GND
6
GND
7
GND
8
QIF DET IN
9
M52342FP
•
•
•
RF AGC DELAY
19 VCO COIL
18 VCO COIL
17 Vcc
16 Vcc
IF AGC FILTER 10
15 QIF OUT
14 AFT SW/NPSW
NFB 11
AUDIO OUT 12
13 LIMITER IN
Outline 24P2N-A
APPLICATION
TV sets, VCR tuners
RECOMMENDED OPERATING CONDITION
In case of VCC and Vreg. out short
Supply voltage range....................................................4.75 to 5.25V
Recommended supply voltage...................................................5.0V
Incase of Vreg. out open
Supply voltage range......................................................8.5 to 12.5V
BLOCK DIAGRAM
EQ F/B
24
APC FILTER
Vreg. OUT
VCO COIL
VIDEO OUT
VCO COIL
Vreg. OUT
20
18
23
21
19
22
Vcc
Vcc
17
16
QIF OUT
LIMITER IN
AFT SW/NPSW
15
14
13
Vcc REG
VCO
Inter
LIM AMP
Split
AFT
QIF DET
EQ
AMP
VIDEO
DET
QIF AGC
APC
FM DET
QIF AMP
RF AGC
IF AGC
VIF AMP
1
2
3
4
RF AGC DELAY
RF AGC OUT
AFT OUT
VIF IN
1
AF AMP
5
6
7
8
VIF IN
GND
GND
GND
9
10
11
IF AGC FILTER
NFB
QIF DET IN
12
AUDIO OUT
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ABSOLUTE MAXIMUM RATINGS (Ta=25°C, surge protection capacitance 200pF resistance 0 Ω, unless otherwise noted)
Symbol
Parameter
VCC
Supply voltage1
Condition
VCC and Vreg. out is not connected to each
other.
Vreg.
OUT
Supply voltage Vreg. OUT
VCC and Vreg. out is not connected to each
other.
Pd
Topr
Tstg
Surge
Power dissipation
Operating temperature
Storage temperature
Surge voltage resistance
Ratings
Unit
13.2
V
6.0
V
1524
-20 to +75
-40 to +150
±200
mW
°C
°C
V
AMBIENT OPERATING CONDITION (Ta=25°C, unless otherwise noted)
Supply voltage
Supply voltage range
Recommended supply
voltage
4.75 to 5.25V
5.0V
8.5 to 12.5V
−
In case of VCC and
Vreg. out short
In case of Vreg. out
open
ELECTRICAL CHARACTERISTICS (VCC=5V, Ta=25°C, unless otherwise noted)
Symbol
Parameter
Test
circuit
Test
point
Input
point
Input
SG
Measurement condition
switches set to
position 1 unless
V7 V8 V12 otherwise indicated
Limits
External
power supply
Unit
Min.
Typ.
Max.
33
46
59
mA
33
46
59
mA
4.60
4.95
5.30
V
3.2
1.8
51
3.5
2.1
56
3.8
2.4
−
V
VP-P
dB
VIF section
ICC1
Circuit current1
VCC=5V
1
A
VIF IN
SG1
−
−
5
ICC2
Circuit current2
VCC=12V
1
A
VIF IN
SG1
−
−
5
VCC2
Vreg voltage
1
TP17
−
−
−
−
5
V18
Vo det
Video S/N
Video output DC voltage
Video output voltage
Video S/N
1
1
1
TP18A
−
TP18A VIF IN
TP18B VIF IN
−
SG1
SG2
−
−
−
0
−
−
−
−
−
BW
Video band width
1
TP18A VIF IN
SG3
−
Vari
able
−
7.0
9.0
−
MHz
VIN MIN
Input sensitivity
Maximum allowable
input
AGC control range input
IF AGC voltage
1
TP18A VIF IN
SG4
−
−
−
−
48
52
dBµ
1
TP18A VIF IN
SG5
−
−
−
101
105
−
dBµ
VIN MAX
GR
V8
V8H
V8L
Maximum IF AGC
voltage
Minimum IF AGC
voltage
VCC=5V
SW17=1, SW14=2
VCC=12V
SW14=SW17=2
VCC=12V
SW7=2
SW8=2
SW18=2
SW8=2
−
−
−
−
1
TP8
VIF IN
SG6
−
−
−
−
−
−
50
2.9
57
3.2
−
3.5
dB
V
1
TP8
−
−
−
−
−
4.0
4.4
−
V
1
TP8
VIF IN
SG7
−
−
−
2.2
2.4
2.6
V
−
−
−
V
V3H
Maximum RF AGC
voltage
1
TP3
VIF IN
SG6
−
−
−
(VCC=9V)
(VCC=12V)
4.2
8.0
11.0
4.7
8.9
11.9
V3L
Minimum RF AGC
voltage
1
TP3
VIF IN
SG7
−
−
−
(VCC=9V)
(VCC=12V)
−
−
−
0.1
0.2
0.2
0.5
0.7
0.7
V
V3
RF AGC operation
voltage
1
TP3
VIF IN
SG8
−
−
−
89
92
95
dBµ
CL-U
CL-L
CL-T
µ
Capture range U
Capture range L
Capture range T
AFT sensitivity
1
1
1
1
TP18A VIF IN SG9
TP18A VIF IN SG9
−
−
−
TP2 VIF IN SG10
−
−
−
−
− −
− −
− −
− 3.3
1.0
1.8
3.1
20
1.7
2.4
4.1
30
−
−
−
60
MHz
MHz
MHz
mV/kHz
2
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ELECTRICAL CHARACTERISTICS (cont.)
Symbol
Test
circuit
Parameter
Test
point
Input
point
Measurement condition
switches set to
position 1 unless
V7 V8 V12 otherwise indicated
Limits
External
power supply
Min.
3.85
7.7
10.7
−
−
−
2.2
4.1
5.5
2.2
4.1
5.5
Typ.
4.15
8.1
11.1
0.7
0.7
0.7
2.5
4.5
6.0
2.5
4.5
6.0
35
40
V2H
AFT maximum voltage
1
TP2
VIF IN SG10
−
− 3.3 (VCC=9V)
(VCC=12V)
V2L
AFT minimum voltage
1
TP2
VIF IN SG10
−
− 3.3 (VCC=9V)
(VCC=12V)
AFT def1
AFT defeat 1
1
TP2
VIF IN SG10
−
−
AFT def2
AFT defeat 2
1
TP2
VIF IN SG10
−
IM
Inter modulation
1
TP18A VIF IN SG11
− 4.6 (VCC=9V)
(VCC=12V)
Vari −
− able
SW8=2
DG
DP
V18
SYNC
RINV
CINV
SIF section
Differential gain
Differential phase
1
1
TP18A VIF IN SG12
TP18A VIF IN SG12
−
−
−
−
−
−
−
−
Sync. tip level
1
TP18A VIF IN
−
−
−
VIF input resister
VIF input capacitance
2
2
TP4
TP4
QIF1
QIF output 1
1
TP13
QIF2
QIF output 2
1
TP13
Vos
V1
VoAF1
VoAF2
THD AF2
SIF detection output
AF output DC voltage
AF output (4.5MHz)
AF output (5.5MHz)
AF output distortion
(4.5MHz)
AF output distortion
(5.5MHz)
LIM1
LIM2
VIF IN
QIF IN
VIF IN
QIF IN
VIF IN
SIF IN
SIF IN
SIF IN
SG2
1
1
1
1
TP13
TP10
TP10
TP10
SG2
SG13
SG2
SG14
SG15
SG20
SG16
SG21
1
1.65
(VCC=9V)
(VCC=12V)
Unit
Max.
−
−
−
1.2
1.2
1.2
2.8
4.9
6.5
2.8
4.9
6.5
−
V
V
V
V
dB
2
2
5
5
%
deg
0.85
1.15
1.45
V
−
−
1.2
5
−
−
kΩ
pF
−
−
−
94
100
106
dBµ
−
−
−
94
100
106
dBµ
0
−
−
−
−
−
−
−
5
5
5
0
94
1.6
400
320
100
2.2
560
450
106
2.8
800
630
dBµ
V
mVrms
mVrms
TP10 SIF IN SG16
−
−
5
−
0.2
0.9
%
1
TP10 SIF IN SG21
−
−
0
−
0.2
0.9
%
Limiting sensitivity
(4.5MHz)
1
TP10 SIF IN
SG17
SG19
−
−
5
−
42
55
dBµ
Limiting sensitivity
(5.5MHz)
1
TP10 SIF IN
−
−
0
−
42
55
dBµ
AMR1
AM rejection (4.5MHz)
AMR2
AM rejection (5.5MHz)
AF S/N 1 AF S/N (4.5MHz)
AF S/N 2 AF S/N (5.5MHz)
RINS
SIF input resistance
CINS
SIF input capacitance
Control section
1
1
1
1
2
2
TP10
TP10
TP10
TP10
TP7
TP7
SIF IN
SIF IN
SIF IN
SIF IN
SG22
SG24
SG18
SG23
SG20
SG25
−
−
−
−
−
−
−
−
5
0
5
0
55
55
55
55
−
−
62
64
62
64
1.5
4
−
−
−
−
−
−
dB
dB
dB
dB
kΩ
pF
QIF control
1
TP7
−
−
Vari
able
−
−
−
0.7
1.0
V
THD AF1
CQIF
PIN12 VOLTAGE CONTROL
Pin12 voltage (V)
0 to 0.6
0 to 2.3
1.0 to 2.3
2.7 to 4.0
2.7 to 5.0
4.4 to 5.0
3
Input
SG
AF
PAL
NTSC
AFT
NORMAL
DEFEAT
NORMAL
DEFEAT
SW7=2
SW7=2
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
ELECTRICAL CHARACTERISTICS TEST METHOD
Video S/N
Input SG2 into VIF IN and measure the video out (Pin 18) noise in
r.m.s at TP18B through a 5MHz (-3dB) L.P.F.
S/N=20 log
0.7×Vo det
NOISE
V3 RF AGC operating voltage
Input SG8 into VIF IN, and gradually reduce Vi and then measure
the input level when RF AGC output TP3 reaches 1/2 V CC, as
shown below.
TP3
Voltage
(dB)
V3H
BW Video band width
1. Measure the 1MHz component level of EQ output TP18A with a
1/2VCC
spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF
IN. At that time, measure the voltage at TP8 with SW8, set to
position 2, and then fix V8 at that voltage.
2. Reduce f2 and measure the value of (f2-f0) when the (f2-f0)
V3L
component level reaches -3dB from the 1MHz component level
Vi
as shown below.
TP18
Vi (dBµ)
CL-U Capture range
1. Increase the frequency of SG9 until the VCO is out of lockedoscillation.
2. Decrease the frequency of SG9 and measure the frequency fU
when the VCO locks.
-3dB
CL-U=fU-58.75 (MHz)
CL-L Capture range
1. Decrease the frequency of SG9 until the VCO is out of lockedoscillation.
1MHz
BW
( f2 - f0 )
2. Increase the frequency of SG9 and measure the frequency fL
when the VCO locks.
CL-L=58.75-fL (MHz)
VIN MIN Input sensitivity
Input SG4 (Vi=90dBµ) into VIF IN, and then gradually reduce Vi and
measure the input level when the 20kHz component of EQ output
CL-T Capture range
CL-T=CL-U+CL-L (MHz)
TP18A reaches -3dB from Vo det level.
µ AFT sensitivity, V2H Maximum AFT voltage, V2L Minimum AFT
VIN MAX Maximum allowable input
1. Input SG5 (Vi=90dBµ) into VIF IN, and measure the level of the
20kHz component of EQ output.
2. Gradually increase the Vi of SG and measure the input level
when the output reaches -3dB.
voltage
1. Input SG10 into VIF IN , and set the frequency of SG10 so that
the voltage of AFT output TP2 is 3V. This frequency is named
f(3).
2. Set the frequency of SG10 so that the AFT output voltage is 2V.
This frequency is named f (2)
GR AGC control range
GR=VIN MAX-VIN MIN (dB)
4
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
3. IN the graph, maximum and minimum DC voltage are V 2H and
V2L, respectively.
AF S/N
1. Input SG20 (SG25) into SIF input, and measure the output noise
level of AF output TP1. This level is named VN.
TP2
Voltage
2. S/N is;
S/N=20log
3V
VoAF (mVr.m.s)
VN (mVr.m.s)
(dB)
CQIF QIF control
Lower the voltage of V7, and measure the voltage of V7 when DC
V2H
2V
voltage of TP13 begins to change.
V2L
f (3)
f (2)
f (MHz)
THE NOTE IN THE SYSTEM SETUP
M52342FP has 2 power supply pins of Vcc (pin 14) and Vreg. OUT
(pin 17). Pin 14 is for AFT output, RF AGC output circuits and 5V
regulated power circuit and Pin 17 is for the other circuit blocks.
µ=
1000 (mV)
f (2) - f (3) (kHz)
In case M52342FP is used together with other ICs like VIF
(mV/kHz)
operating at more than 5V, the same supply voltage as that of
IM Intermodulation
1. Input SG11 into VIF IN, and measure EQ output TP18A with an
connected ICs is applied to VCC and Vreg. Out is opened. The other
circuit blocks, connected to Vreg. OUT are powered by internal 5V
regulated power supply.
oscilloscope.
2. Adjust AGC filter voltage V8 so that the minimum DC level of the
In case the connecting ICs are operated at 5V, 5V is supplied to
both VCC and Vreg.OUT.
output waveform is 1.0V.
3. At this time, measure, TP18A with a spectrum analyzer.
The intermodulation is defined as a difference between 920kHz
LOGIC TABLE
and 3.58MHz frequency components.
AF
LIM Limiting sensitivity
1. Input SG17 (SG22) into SIF input, and measure the 400Hz
component level of AF output TP10.
2. Input SG19 (SG24) into SIF input, and measure the 400Hz
component level of AF output TP10.
3. The input limiting sensitivity is defined as the input level when a
difference between each 400Hz components of audio output
(TP10) is 30dB, as shown below.
Audio output
(mVrms)
Audio output while
SG17 (SG22) is input
30dB
Audio output while
SG19 (SG24) is input
(dBµ)
SIF input
AMR AM Rejection
1. Input SG18 (SG23) into SIF input, and measure the output level
of AF output TP10. This level is named VAM.
2. AMR is;
AMR=20log
5
VoAF (mVr.m.s)
VAM (mVr.m.s)
(dB)
10k “H”
10k “L”
20k “H”
20k “L”
20k “H”
20k “L”
NTSC
PAL
AFT
DEFEAT
NORMAL
DEFEAT
NORMAL
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
SG No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Signals (50Ω termination)
f0=58.75MHz AM20kHz 77.8% 90dBµ
f0=58.75MHz 90dBµ CW
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=Frequency variable 70dBµ CW (Mixed signal)
f0=58.75MHz AM20kHz 77.8% level variable
f0=58.75MHz AM20kHz 14.0% level variable
f0=58.75MHz 80dBµ CW
f0=58.75MHz 110dBµ CW
f0=58.75MHz CW level variable
f0=Variable AM20kHz 77.8% 90dBµ
f0=Variable 90dBµ CW
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=55.17MHz 80dBµ CW (Mixed signal)
f3=54.25MHz 80dBµ CW (Mixed signal)
f0=58.75MHz 87.5%
TV modulation ten-step waveform
Sync tip level 90dBµ
f1=54.25MHz 95dBµ CW
TYPICAL CHARACTERISTICS
THERMAL DERATING (MAXIMUM RATING)
1750
POWER DISSIPATION Pd (mW)
INPUT SIGNAL
1524
1500
1250
914
1000
750
500
250
0
-20
0
25
50
75
100
125
150
AMBIENT TEMPERATURE Ta (°C)
f1=54.25MHz 75dBµ CW
f1=58.75MHz 90dBµ CW (Mixed signal)
f2=54.25MHz 70dBµ CW (Mixed signal)
f0=4.5MHz 90dBµ FM400Hz±25kHz dev
f0=4.5MHz FM400Hz±25kHz dev level variable
f0=4.5MHz 90dBµ AM400Hz 30%
f0=4.5MHz CW level variable
f0=4.5MHz 90dBµ CW
f0=5.5MHz 90dBµ FM400Hz±50kHz dev
f0=5.5MHz FM400Hz±50kHz dev level variable
f0=5.5MHz 90dBµ AM400Hz 30%
f0=5.5MHz CW level variable
f0=5.5MHz 90dBµ CW
6
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
TYPICAL APPLICATION EXAMPLE (for 38.9MHz SPLIT)
18µ
47µ
300
ON
VCC
8.5 to 12V
OFF
GND
10k
180
1k
150
22p 47µ
0.47µ
100µ
VCO COIL 5531
33µ
0.01µ
62
82p
1k
SFE 5.5MD
0.01µ
10k
1p
OFF
220k
10p
ON
20k
23
24
21
22
20
19
18
17
15
16
14
13
Vcc REG
VCO
Inter
LIM AMP
Split
AFT
QIF DET
EQ
AMP
VIDEO
DET
QIF AGC
APC
FM DET
QIF AMP
RF AGC
IF AGC
AF AMP
VIF AMP
2
1
4
3
5
0.01µ
36k
6
8
10
9
0.56µ
1k
0.01µ
11
12
2.4k
0.47µ
39k
15k
7
5.1k
10µ
0.01µ
SAW
150k
0.01µ
150k
0.01µ
390
220µ
0.01µ
3.9k
0.33µ
0.01µ
IF IN
51
910
33
2200p
∗ In case the other components are connected
to the GND area nearby the VCO coil, a leakage
interference to them should be considered.
The bypass capacitors of 33µF and 0.01µF are
grounded as close as possible to the GND pins
(pin 6, 7, 8) so as to minimize the interference.
Units Resistance : Ω
Capacitance : F
7
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 1 (RF AGC DELAY)
An applied voltage to the pin1 is for changing a RF AGC delay point.
VCC
1
Pin 2 (AFT OUTPUT)
VCC (supply to a tuner)
The maximum
outflow current
is 0.2 mA.
Since an AFT output is provided by a high impedance source, the detection
sensitivity can be set by an external resistor.
The muting operation will be on in following two cases;
1) the APC is out of locking,
2) the video output becomes small enough in a weak
electric field.
Tuner
2
The maximum
inflow current
is 0.2mA.
Vcc
[V2]
(in open-loop condition)
Vcc
2
0
[fo]
Pin 3 (RF AGC OUTPUT)
A current mode output is available in the reverse AGC operation.
The fluctuation of a bottom voltage is made small by loading higher impedance for
a deep saturation.
VCC (supply to a tuner)
VCC
(supply voltage to a tuner)
3
The maximum
inflow current
is 1.5mA.
Tuner
(in open-loop condition)
[V3]
0
weak
electric field
strong
electric field
[IF input]
Note: Connecting a nonpolarity capacitor of 1µF between pin1 and pin 3 improves AGC operating speed.
In that case, the capacitors between pin1/pin3 and ground should be removed.
8
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 4, Pin 5 (VIF INPUT)
Bias
5
SAW
It should be designed considering careful impedance matching with the
SAW filter.
4
1.2kΩ
terminal voltage : 1.45V
1.2kΩ
Pin 6, Pin 7, Pin 8 (GND)
6
7
8
They are all ground pins.
Pin 9 (QIF INPUT, INTER SW)
terminal voltage : 2.4V
5kΩ
9
SAW
Bias
The input impedance is 1.5kΩ.
In the intercarrier system application, the intercarrier output is available
in pin 15 by connecting pin 9 to ground.
1.5kΩ
Inter
1.5kΩ
Inter/Split
Pin 10 (IF AGC FILTER)
VCC
In spite of the 1-pin filter configuration, 2-pin filter
characteristics are available by utilizing the dynamic AGC circuit.
[V10]
10
1kΩ
0
weak
electric field
[IF input]
9
strong
electric field
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 11 (AUDIO F/B)
terminal voltage : 2.1V
11
5kΩ
5kΩ
The FM detector can respond to several kinds of SIF signals without an
adjustment and external components by adopting the PLL technique.
It also is in compliance with the multi-SIF by selecting an appropriate
deemphasis and audio output amplifier using the pin14 switch.
The capacitor between pin 11 and 12, which fixes the deemphasis
characteristics, can be determined considering the combination of an
equivalent resistance of the IC and this capacitor itself.
Pin 12 (AF OUTPUT)
In the 4.5MHz application, the internal voltage gain is increased by 6-dB in
comparison with the other applications and then the signals are delivered
through an emitter follower.
12
terminal voltage : 2.2V
Pin 13 (LIMITER INPUT)
terminal voltage : 2.2V
Bias
13
The input impedance is 8kΩ.
8kΩ
8kΩ
Pin 14 (AFT SW, NP SW)
It works as a switch by connecting the resistor to 5V(High)
or GND (Low), alternately.
SIF4.5MHz : H
Others
:L
10kΩ
VCC (5V)
10kΩ
20kΩ
AF AMP
AFT
Pin 14
applied voltage
H
H
4.5MHz
DEFFET
4.4 to 5.0V
H
L
4.5MHz
NORMAL
2.7 to 4.0V
L
H
OTHER
DEFFET
1.0 to 2.3V
L
L
OTHER
NORMAL
0 to 0.6V
2kΩ
14
22kΩ
AFT Defeat :H
AFT ON :L
The terminal voltage is set by the external resistors
because of an open base input.
10
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 15 (QIF OUTPUT / INTER OUTPUT)
terminal voltage : 2.45V
In both the split and intercarrier system, the carrier signal
to SIF provided from pin 15 through an emitter follower.
15
Drive current
: 0.5mA
Pin 16, Pin 17 (VCC)
VCC
The recommended supply voltage is 5V or 9 to 12V.
In the case of 5V supply, these pins should be tied to pin 20
and pin 21.
In the case of 9 to 12V supply, a regulated output of 5V
are available in pin 20 and 21.
16
17
Pin 18, Pin 19 (VCO COIL)
850Ω
850Ω
18
19
466Ω
466Ω
Connecting a tuning coil and capacitor to these pins enables
an oscillation.
The tuning capacitor of about 30pF is recommended.
The oscillation frequency is tuned in f0.
In the actual adjustment, the coil is tuned so that the AFT
voltage is reached to Vcc/2 with f0 as an input.
The printed pattern around these pins should be designed
carefully to prevent an pull-in error of VCO, caused by the leakage
interference from the large signal level oscillator to adjacent pins.
The interconnection also should be designed as short as possible.
Pin 20, Pin 21 (REG OUTPUT)
21
20
12.1kΩ
3.8kΩ
11
It is a regulated 5V output which has current drive
capability of approximately 15mA.
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 22 (VIDEO OUTPUT)
An output amplitude is positive 2VP-P in the case of 87.5%
video modulation.
22
internal
driving current : 3mA
1.1VO-P
Pin 23 (APC FILTER)
In the locked state, the cut-off frequency of the filter is
adjusted effectively by an external resistor so that it will be
in the range of around 30 to 200kHz.
In case the cut-off frequency is lower, the pull-in speed
becomes slow. On the other hand, a higher cut-off frequency
widen the pull-in range and band width, which results
in a degradation in the S/N ratio. So, in the actual TV system
design, the appropriate constant should be chosen for getting
desirable performance considering above conditions.
23
Bias
12kΩ
[V23]
[Pin 23 output]
3.4VO-P
[FM mod. frequency]
fo
[IF input frequency]
100kHz
In the application, an offset between AFT center frequency and VCO free-running frequency, can be improved by connecting a 220kΩ resistor
to Vcc supply (pin 21).
23
220kΩ
C
21
A buzz noise also decreases by connecting a capacitor from
pin 23 to Vcc (pin 21) or GND. This effect utilizes the signal
interference on the printed circuit board. So, the determination
that which connection is effective, to Vcc or GND, is done by a
cut and try method.
The capacitor of less than 680pF, which depends on Q of VCO coil,
is recommended to prevent an APC pull-in range from narrowing.
Taking it into consideration in the actual TV set design.
12
MITSUBISHI ICs (TV)
M52342FP
PLL-SPLIT VIF/SIF IC
Pin 24 (EQ F/B)
Both the external coil and capacitor determine the
frequency response of EQ output.
The series connected resistor is for damping.
16.8kΩ
24
500Ω
3.1kΩ
3.9kΩ
1.1VO-P
In the intercarrier system, the following phenomenon should be considered;
a strong equalization (EQ) enlarge the sound carrier output from pin 22, because the EQ is applied before an audio trap.
In that case, the next two solutions are recommended;
decrease in S level of SAW, avoiding to peak a sound carrier in EQ.
Video
Det.
+
3.17kΩ
500Ω
3.1kΩ
3.75mA
22
24
Video output
(Circuit Diagram of EQ Amp.)
13