Revised August 2001 FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection General Description Features The Fairchild Switch FSTU3125 provides four high-speed CMOS TTL-compatible bus switches. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses undershoot at the I/O and responds by preventing voltage differentials from developing and turning the switch on. ■ Undershoot hardened to −2V (A and B Ports) ■ 4Ω switch connection between two ports ■ Minimal propagation delay through the switch ■ Low lCC ■ Zero bounce in flow-through mode ■ Control inputs compatible with TTL level ■ See application notes AN-5008 and AN-5021 for details on undershoot The device is organized as four 1-bit switches with separate OE inputs. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Ordering Code: Order Number FSTU3125M Package Number M14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FSTU3125QSC MQA16 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide FSTU3125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Descriptions Pin Assignment for SOIC and TSSOP Pin Name Description OE1, OE2, OE3, OE4 Bus Switch Enables 1A, 2A, 3A, 4A Bus A 1B, 2B, 3B, 4B Bus B NC Not Connected Truth Table Inputs Pin Assignment for QSOP © 2001 Fairchild Semiconductor Corporation DS500449 Inputs/Outputs OE A,B L A=B H Z www.fairchildsemi.com FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection June 2001 FSTU3125 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 3) Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (VS) −2.0V to +7.0V Power Supply Operating (VCC) DC Input Voltage (VIN)(Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN < 0V −50 mA Output Voltage (VOUT) DC Output (IOUT) Sink Current 128 mA Input Rise and Fall Time (tr, tf) +/− 100 mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 4.0V to 5.5V Switch Control Input −65°C to +150 °C 0 ns/V to 5 ns/V Switch I/O 0 ns/V to DC Free Air Operating Temperature (TA) −40 °C to +85 °C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VCC (V) Parameter TA = −40 °C to +85 °C Min Typ (Note 4) Max −1.2 VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 II Input Leakage Current 5.5 ±1.0 0 10 5.5 ±1.0 IOZ RON 4.5 OFF-STATE Leakage Current 2.0 Units V Conditions IIN = −18 mA V V µA 0 ≤ VIN ≤ 5.5V VIN = 5.5V µA 0 ≤ A, B ≤ VCC Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64 mA (Note 5) 4.5 4 7 Ω VIN = 0V, IIN = 30 mA 4.5 8 15 Ω VIN = 2.4V, IIN = 15 mA 4.0 11 20 Ω VIN = 2.4V, IIN = 15 mA ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, ∆ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V. VIKU Voltage Undershoot 5.5 −2.0 V IOUT = 0 Other inputs at VCC or GND 0.0 mA ≥ IIN ≥ −50 mA OE = 5.5V Note 4: Typical values are at VCC = 5.0V and TA = +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. 3 www.fairchildsemi.com FSTU3125 Absolute Maximum Ratings(Note 1) FSTU3125 AC Electrical Characteristics TA = −40 °C to +85 °C, CL = 50pF, RU = RD = 500Ω Symbol Parameter VCC = 4.5 – 5.5V Min tPHL, tPLH Propagation Delay Bus to Bus (Note 6) tPZH, tPZL Output Enable Time VCC = 4.0V Max 1.0 Min Units Conditions Max 0.25 0.25 ns 6.1 6.0 ns VI = OPEN Figures 2, 3 VI = 7V for tPZL VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time 1.5 6.4 Figure Number 6.6 VI = 7V for tPLZ ns VI = OPEN for tPHZ Figures 2, 3 Figures 2, 3 Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol (Note 7) Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3 pF VCC = 5.0V CI/O Input/Output Capacitance 5 pF VCC, OE = 5.0V Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. Undershoot Characteristic (Note 8) Symbol VOUTU Parameter Output Voltage During Undershoot Min Typ 2.5 VOH − 0.3 Max Units V Conditions Figure 1 Note 8: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event. FIGURE 1. Device Test Conditions Parameter Value VIN See Waveform V R1 - R2 100K Ω VTRI 11.0 V VCC 5.5 V www.fairchildsemi.com Transient Input Voltage (VIN) Waveform Units 4 FSTU3125 AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500ns FIGURE 2. AC Test Circuit FIGURE 3. AC Waveforms 5 www.fairchildsemi.com FSTU3125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA16 www.fairchildsemi.com 6 FSTU3125 4-Bit Bus Switch with −2V Undershoot Protection Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com