M54HC4040 RAD-HARD 12 STAGE BINARY COUNTER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 70 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 4040 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9204-069 DESCRIPTION The M54HC4040 is an high speed CMOS 12 STAGE BINARY COUNTER fabricated with silicon gate C2MOS technology. DILC-16 FPC-16 ORDER CODES PACKAGE FM EM DILC FPC M54HC4040D M54HC4040K M54HC4040D1 M54HC4040K1 A clear input is used to reset the counter to the all low level state. A high level on CLEAR accomplishes the reset function. A negative transition on the CLOCK input increments the counter by one. For M54HC4040 each division stage has an output; the final frequency is 1/4096 fIN. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION May 2004 Rev. 1 1/11 M54HC4040 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 1: Pin Description PIN N° SYMBOL 9, 7, 6, 5, 3, 2, 4, 13, 12, 14, 15, 1 Q1 to Q12 10 CLOCK 11 8 CLEAR GND VCC 16 NAME AND FUNCTION Parallel Outputs Clock Input (LOW to HIGH, Edge Triggered) Reset Inputs Ground (0V) Positive Supply Voltage Table 2: Truth Table 2/11 CLOCK CLEAR OUTPUT STATE X H ALL OUTPUTS = "L" L NO CHANGE L ADVANCE TO NEXT STATE M54HC4040 Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays Table 3: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 ± 20 V mA IIK DC Input Diode Current IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current Power Dissipation PD Tstg Storage Temperature TL Lead Temperature (10 sec) 300 mW -65 to +150 °C 265 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 3/11 M54HC4040 Table 4: Recommended Operating Conditions Symbol VCC Parameter Supply Voltage Value Unit 2 to 6 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature Input Rise and Fall Time tr, tf -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns Table 5: DC Specifications Test Condition Symbol VIH VIL VOH VOL II ICC 4/11 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 5.68 Unit V V 6.0 IO=-5.2 mA 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA 5.8 5.63 5.60 V M54HC4040 Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (Qn - Qn+1) tPLH tPHL Propagation Delay Time (CLOCK Q1) tPHL fMAX Propagation Delay Time (CLEAR - Qn) Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK) tW(H) Minimum Pulse Width (CLEAR) tREM Minimum Removal Time Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 6.0 30 35 Typ. Max. 30 8 7 20 5 4 48 17 13 56 18 15 15 65 70 40 8 7 70 19 16 75 15 13 50 10 9 145 29 25 140 28 24 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 65 13 11 180 36 31 175 35 30 4.8 24 28 75 15 13 175 35 30 25 5 5 Max. 110 22 19 75 15 13 220 44 38 210 42 36 4 20 24 95 19 16 220 44 37 30 6 5 Unit ns ns ns ns MHz 110 22 19 265 53 45 40 8 7 ns ns ns Table 7: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 CPD Power Dissipation Capacitance (note 1) 5.0 34 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per FLIP/ FLOP) 5/11 M54HC4040 Figure 4: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Minimum Pulse Width (Clear) And Removal Time (Clear To Clock) (f=1MHz; 50% duty cycle) 6/11 M54HC4040 Figure 6: Waveform - Propagation Delay Time (f=1MHz; 50% duty cycle) Figure 7: Waveform - Propagation Delay Time, Minimum Pulse Width (Clock) (f=1MHz; 50% duty cycle) 7/11 M54HC4040 DILC-16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 2.1 2.71 0.083 0.107 a1 3.00 3.70 0.118 0.146 a2 0.63 1.14 0.025 B 1.82 2.39 0.072 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 D 20.06 20.32 20.58 0.790 0.800 0.810 e 7.36 7.62 7.87 0.290 0.300 0.310 e1 0.88 2.54 0.035 0.045 0.094 0.100 e2 17.65 17.78 17.90 0.695 0.700 0.705 e3 7.62 7.87 8.12 0.300 0.310 0.320 F 7.29 7.49 7.70 0.287 0.295 0.303 I 3.83 0.151 K 10.90 12.1 0.429 0.476 L 1.14 1.5 0.045 0.059 0056437F 8/11 M54HC4040 FPC-16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 6.75 6.91 7.06 0.266 0.272 0.278 B 9.76 9.94 10.14 0.384 0.392 0.399 C 1.49 1.95 0.059 D 0.102 0.127 0.152 0.004 0.005 0.006 E 8.76 8.89 9.01 0.345 0.350 0.355 F 0.077 1.27 G 0.38 H 6.0 L 18.75 M 0.33 0.050 0.43 0.48 0.015 0.017 0.019 0.237 0.38 N 22.0 0.738 0.43 0.013 0.867 0.015 4.31 0.017 0.170 G F D H 9 16 A N L 8 1 H E B M C 0016030E 9/11 M54HC4040 Table 8: Revision History Date Revision 10-May-2004 1 10/11 Description of Changes First Release M54HC4040 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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