NSC LM2830ZMF High frequency 1.0a load - step-down dc-dc regulator Datasheet

LM2830
High Frequency 1.0A Load - Step-Down DC-DC
Regulator
General Description
Features
The LM2830 regulator is a monolithic, high frequency, PWM
step-down DC/DC converter in a 5 pin SOT23 and a 6 Pin
LLP package. It provides all the active functions to provide
local DC/DC conversion with fast transient response and
accurate regulation in the smallest possible PCB area. With
a minimum of external components, the LM2830 is easy to
use. The ability to drive 1.0A loads with an internal 130 mΩ
PMOS switch using state-of-the-art 0.5 µm BiCMOS technology results in the best power density available. The worldclass control circuitry allows on-times as low as 30ns, thus
supporting exceptionally high frequency conversion over the
entire 3V to 5.5V input operating range down to the minimum
output voltage of 0.6V. Switching frequency is internally set
to 1.6 MHz, or 3.0 MHz, allowing the use of extremely small
surface mount inductors and chip capacitors. Even though
the operating frequency is high, efficiencies up to 93% are
easy to achieve. External shutdown is included, featuring an
ultra-low stand-by current of 30 nA. The LM2830 utilizes
current-mode control and internal compensation to provide
high-performance regulation over a wide range of operating
conditions. Additional features include internal soft-start circuitry to reduce inrush current, pulse-by-pulse current limit,
thermal shutdown, and output over-voltage protection.
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Space Saving SOT23-5 Package
Input voltage range of 3.0V to 5.5V
Output voltage range of 0.6V to 4.5V
1.0A output current
High Switching Frequencies
1.6MHz (LM2830X)
3.0MHz (LM2830Z)
130mΩ PMOS switch
0.6V, 2% Internal Voltage Reference
Internal soft-start
Current mode, PWM operation
Thermal Shutdown
Over voltage protection
Applications
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Local 5V to Vcore Step-Down Converters
Core Power in HDDs
Set-Top Boxes
USB Powered Devices
DSL Modems
Typical Application Circuit
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© 2006 National Semiconductor Corporation
DS201974
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LM2830 High Frequency 1.0A Load - Step-Down DC-DC Regulator
August 2006
LM2830
Connection Diagrams
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5-Pin SOT-23
6-Pin LLP
Ordering Information
Order Number
LM2830XMF
LM2830XMFX
Frequency
Option
Package Type
NSC Package
Drawing
Top Mark
1.6MHz
SOT23-5
MF05A
SKTB
SOT23-5
MF05A
SKXB
LLP-6
SDE06A
L192B
LM2830ZMF
LM2830ZMFX
LM2830ZSD
3MHz
LM2830ZSDX
NOPB versions available as well
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Supplied As
1000 units Tape and Reel
3000 units Tape and Reel
1000 units Tape and Reel
3000 units Tape and Reel
1000 units Tape and Reel
4500 units Tape and Reel
LM2830
Pin Descriptions 5-Pin SOT23
Pin
Name
1
SW
2
GND
Function
Output switch. Connect to the inductor and catch diode.
Signal and power ground pin. Place the bottom resistor of the feedback network as close as
possible to this pin.
3
FB
Feedback pin. Connect to external resistor divider to set output voltage.
4
EN
Enable control input. Logic high enables operation. Do not allow this pin to float or be
greater than VIN + 0.3V.
5
VIN
Input supply voltage.
Pin Descriptions 6-Pin LLP
Pin
Name
1
FB
Function
2
GND
3
SW
4
VIND
Power Input supply.
5
VINA
Control circuitry supply voltage. Connect VINA to VIND on PC board.
6
EN
DAP
Die Attach Pad
Feedback pin. Connect to external resistor divider to set output voltage.
Signal and power ground pin. Place the bottom resistor of the feedback network as
close as possible to this pin.
Output switch. Connect to the inductor and catch diode.
Enable control input. Logic high enables operation. Do not allow this pin to float or be
greater than VINA + 0.3V.
Connect to system ground for low thermal impedance, but it cannot be used as a
primary GND connection.
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LM2830
Absolute Maximum Ratings (Note 1)
Storage Temperature
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
VIN
-0.5V to 7V
FB Voltage
-0.5V to 3V
EN Voltage
-0.5V to 7V
SW Voltage
-0.5V to 7V
ESD Susceptibility
Infrared or Convection Reflow
(15 sec)
220˚C
Operating Ratings
VIN
3V to 5.5V
Junction Temperature
2kV
Junction Temperature (Note 2)
−65˚C to +150˚C
−40˚C to +125˚C
150˚C
Electrical Characteristics VIN = 5V unless otherwise indicated under the Conditions column. Limits in
standard type are for TJ = 25˚C only; limits in boldface type apply over the junction temperature (TJ) range of -40˚C to
+125˚C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25˚C, and are provided for reference purposes only.
Symbol
VFB
∆VFB/VIN
IB
UVLO
Parameter
Conditions
Min
Typ
Max
0.588
0.600
0.612
Feedback Voltage
Feedback Voltage Line Regulation
VIN = 3V to 5V
0.02
0.1
100
nA
VIN Rising
2.73
2.90
V
Feedback Input Bias Current
Undervoltage Lockout
FSW
Switching Frequency
DMAX
Maximum Duty Cycle
DMIN
Minimum Duty Cycle
ICL
VEN_TH
Switch On Resistance
Switch Current Limit
1.85
LM2830-X
1.2
1.6
1.95
LM2830-Z
2.25
3.0
3.75
LM2830-X
86
94
LM2830-Z
82
90
5
LM2830-Z
7
LLP-6 Package
150
SOT23-5 Package
130
1.2
Switch Leakage
Enable Pin Current
Quiescent Current (switching)
Quiescent Current (shutdown)
V
%
195
1.75
mΩ
A
1.8
Sink/Source
MHz
%
0.4
Enable Threshold Voltage
IEN
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LM2830-X
Shutdown Threshold Voltage
ISW
IQ
2.3
0.43
VIN = 3.3V
V
%/V
VIN Falling
UVLO Hysteresis
RDS(ON)
Units
LLP-6 and SOT23-5
Package
V
100
nA
100
nA
LM2830X VFB = 0.55
3.3
5
mA
LM2830Z VFB = 0.55
4.3
6.5
mA
All Options VEN = 0V
30
4
nA
Symbol
Parameter
θJA
Junction to Ambient
0 LFPM Air Flow (Note 3)
θJC
Junction to Case (Note 3)
TSD
Thermal Shutdown Temperature
Conditions
Min
Typ
LLP-6 Package
80
SOT23-5 Package
118
LLP-6 Package
18
SOT23-5 Package
80
165
Max
Units
˚C/W
˚C/W
˚C
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Range indicates conditions for which the device is
intended to be functional, but does not guarantee specfic performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: Thermal shutdown will occur if the junction temperature exceeds the maximum junction temperature of the device.
Note 3: Applies for packages soldered directly onto a 3” x 3” PC board with 2oz. copper on 4 layers in still air.
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LM2830
Electrical Characteristics VIN = 5V unless otherwise indicated under the Conditions column. Limits in
standard type are for TJ = 25˚C only; limits in boldface type apply over the junction temperature (TJ) range of -40˚C to
+125˚C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ = 25˚C, and are provided for reference purposes only. (Continued)
LM2830
Typical Performance Characteristics All curves taken at VIN = 5.0V with configuration in typical application circuit shown in Application Information section of this datasheet. TJ = 25˚C, unless otherwise specified.
η vs Load "X" Vin = 5V, Vo = 1.8V & 3.3V
η vs Load "Z" Vin = 5V, Vo = 3.3V & 1.8V
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Load Regulation
Vin = 3.3V, Vo = 1.8V (All Options)
η vs Load "X and Z" Vin = 3.3V, Vo = 1.8V
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Load Regulation
Vin = 5V, Vo = 1.8V (All Options)
Load Regulation
Vin = 5V, Vo = 3.3V (All Options)
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Oscillator Frequency vs Temperature - "X"
Oscillator Frequency vs Temperature - "Z"
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Current Limit vs Temperature
Vin = 3.3V
RDSON vs Temperature (LLP-6 Package)
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RDSON vs Temperature (SOT23-5 Package)
LM2830X IQ (Quiescent Current)
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LM2830
Typical Performance Characteristics All curves taken at VIN = 5.0V with configuration in typical
application circuit shown in Application Information section of this datasheet. TJ = 25˚C, unless otherwise
specified. (Continued)
LM2830
Typical Performance Characteristics All curves taken at VIN = 5.0V with configuration in typical
application circuit shown in Application Information section of this datasheet. TJ = 25˚C, unless otherwise
specified. (Continued)
Line Regulation
Vo = 1.8V, Io = 500mA
LM2830Z IQ (Quiescent Current)
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VFB vs Temperature
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Phase Plot vs Frequency
(Vin = 5V, Vo = 1.2V @ 1A)
Gain vs Frequency
(Vin = 5V, Vo = 1.2V @ 1A)
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LM2830
Simplified Block Diagram
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FIGURE 1.
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LM2830
Applications Information
THEORY OF OPERATION
OUTPUT OVERVOLTAGE PROTECTION
The LM2830 is a constant frequency PWM buck regulator IC
that delivers a 1.0A load current. The regulator has a preset
switching frequency of 1.6MHz or 3.0MHz. This high frequency allows the LM2830 to operate with small surface
mount capacitors and inductors, resulting in a DC/DC converter that requires a minimum amount of board space. The
LM2830 is internally compensated, so it is simple to use and
requires few external components. The LM2830 uses
current-mode control to regulate the output voltage. The
following operating description of the LM2830 will refer to the
Simplified Block Diagram (Figure 1) and to the waveforms in
Figure 2. The LM2830 supplies a regulated output voltage by
switching the internal PMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at
the falling edge of the reset pulse generated by the internal
oscillator. When this pulse goes low, the output control logic
turns on the internal PMOS control switch. During this ontime, the SW pin voltage (VSW) swings up to approximately
VIN, and the inductor current (IL) increases with a linear
slope. IL is measured by the current sense amplifier, which
generates an output proportional to the switch current. The
sense signal is summed with the regulator’s corrective ramp
and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and
VREF. When the PWM comparator output goes high, the
output switch turns off until the next switching cycle begins.
During the switch off-time, inductor current discharges
through the Schottky catch diode, which forces the SW pin to
swing below ground by the forward voltage (VD) of the
Schottky catch diode. The regulator loop adjusts the duty
cycle (D) to maintain a constant output voltage.
The over-voltage comparator compares the FB pin voltage
to a voltage that is 15% higher than the internal reference
VREF. Once the FB pin voltage goes 15% above the internal
reference, the internal PMOS control switch is turned off,
which allows the output voltage to decrease toward regulation.
UNDERVOLTAGE LOCKOUT
Under-voltage lockout (UVLO) prevents the LM2830 from
operating until the input voltage exceeds 2.73V (typ). The
UVLO threshold has approximately 430 mV of hysteresis, so
the part will operate until VIN drops below 2.3V (typ). Hysteresis prevents the part from turning off during power up if
VIN is non-monotonic.
CURRENT LIMIT
The LM2830 uses cycle-by-cycle current limiting to protect
the output switch. During each switching cycle, a current limit
comparator detects if the output switch current exceeds
1.75A (typ), and turns off the switch until the next switching
cycle begins.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning
off the output switch when the IC junction temperature exceeds 165˚C. After thermal shutdown occurs, the output
switch doesn’t turn on until the junction temperature drops to
approximately 150˚C.
Design Guide
INDUCTOR SELECTION
The Duty Cycle (D) can be approximated quickly using the
ratio of output voltage (VO) to input voltage (VIN):
The catch diode (D1) forward voltage drop and the voltage
drop across the internal PMOS must be included to calculate
a more accurate duty cycle. Calculate D by using the following formula:
VSW can be approximated by:
VSW = IOUT x RDSON
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The diode forward drop (VD) can range from 0.3V to 0.7V
depending on the quality of the diode. The lower the VD, the
higher the operating efficiency of the converter. The inductor
value determines the output ripple current. Lower inductor
values decrease the size of the inductor, but increase the
output ripple current. An increase in the inductor value will
decrease the output ripple current.
One must ensure that the minimum current limit (1.2A) is not
exceeded, so the peak current in the inductor must be
calculated. The peak current (ILPK) in the inductor is calculated by:
ILPK = IOUT + ∆iL
FIGURE 2. Typical Waveforms
SOFT-START
This function forces VOUT to increase at a controlled rate
during start up. During soft-start, the error amplifier’s reference voltage ramps from 0V to its nominal value of 0.6V in
approximately 600 µs. This forces the regulator output to
ramp up in a controlled fashion, which helps reduce inrush
current.
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INPUT CAPACITOR
(Continued)
An input capacitor is necessary to ensure that VIN does not
drop excessively during switching transients. The primary
specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent Series Inductance). The recommended input capacitance is 22 µF.The
input voltage rating is specifically stated by the capacitor
manufacturer. Make sure to check any recommended deratings and also verify if there is any significant change in
capacitance at the operating input voltage and the operating
temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be greater than:
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FIGURE 3. Inductor Current
Neglecting inductor ripple simplifies the above equation to:
In general,
∆iL = 0.1 x (IOUT) → 0.2 x (IOUT)
If ∆iL = 20% of 1A, the peak current in the inductor will be
1.2A. The minimum guaranteed current limit over all operating conditions is 1.2A. One can either reduce ∆iL, or make
the engineering judgment that zero margin will be safe
enough. The typical current limit is 1.75A.
The LM2830 operates at frequencies allowing the use of
ceramic output capacitors without compromising transient
response. Ceramic capacitors allow higher inductor ripple
without significantly increasing output ripple. See the output
capacitor section for more details on calculating output voltage ripple. Now that the ripple current is determined, the
inductance is calculated by:
It can be shown from the above equation that maximum
RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the point where the duty cycle D is closest to
0.5. The ESL of an input capacitor is usually determined by
the effective cross sectional area of the current path. A large
leaded capacitor will have high ESL and a 0805 ceramic chip
capacitor will have very low ESL. At the operating frequencies of the LM2830, leaded capacitors may have an ESL so
large that the resulting impedance (2πfL) will be higher than
that required to provide stable operation. As a result, surface
mount capacitors are strongly recommended.
Sanyo POSCAP, Tantalum or Niobium, Panasonic SP, and
multilayer ceramic capacitors (MLCC) are all good choices
for both input and output capacitors and have very low ESL.
For MLCCs it is recommended to use X7R or X5R type
capacitors due to their tolerance and temperature characteristics. Consult capacitor manufacturer datasheets to see
how rated capacitance varies over operating conditions.
Where
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired
output ripple and transient response. The initial current of a
load transient is provided mainly by the output capacitor. The
output ripple of the converter is:
When selecting an inductor, make sure that it is capable of
supporting the peak output current without saturating. Inductor saturation will result in a sudden reduction in inductance
and prevent the regulator from operating correctly. Because
of the speed of the internal current limit, the peak current of
the inductor need only be specified for the required maximum output current. For example, if the designed maximum
output current is 1.0A and the peak current is 1.25A, then the
inductor should be specified with a saturation current limit of
> 1.25A. There is no need to specify the saturation or peak
current of the inductor at the 1.75A typical switch current
limit. The difference in inductor size is a factor of 5. Because
of the operating frequency of the LM2830, ferrite based
inductors are preferred to minimize core losses. This presents little restriction since the variety of ferrite-based inductors is huge. Lastly, inductors with lower series resistance
(RDCR) will provide better operating efficiency. For recommended inductors see Example Circuits.
When using MLCCs, the ESR is typically so low that the
capacitive ripple may dominate. When this occurs, the output ripple will be approximately sinusoidal and 90˚ phase
shifted from the switching action. Given the availability and
quality of MLCCs and the expected output voltage of designs
using the LM2830, there is really no need to review any other
capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain
amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not. Since the
output capacitor is one of the two external components that
control the stability of the regulator control loop, most applications will require a minimum of 22 µF of output capacitance. Capacitance often, but not always, can be increased
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LM2830
Design Guide
LM2830
Design Guide
PCB LAYOUT CONSIDERATIONS
(Continued)
When planning layout there are a few things to consider
when trying to achieve a clean, regulated output. The most
important consideration is the close coupling of the GND
connections of the input capacitor and the catch diode D1.
These ground ends should be close to one another and be
connected to the GND plane with at least two through-holes.
Place these components as close to the IC as possible. Next
in importance is the location of the GND connection of the
output capacitor, which should be near the GND connections
of CIN and D1. There should be a continuous ground plane
on the bottom layer of a two-layer board except under the
switching node island. The FB pin is a high impedance node
and care should be taken to make the FB trace short to avoid
noise pickup and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the
GND of R1 placed as close as possible to the GND of the IC.
The VOUT trace to R2 should be routed away from the
inductor and any other traces that are switching. High AC
currents flow through the VIN, SW and VOUT traces, so they
should be as short and wide as possible. However, making
the traces wide increases radiated noise, so the designer
must make this trade-off. Radiated noise can be decreased
by choosing a shielded inductor. The remaining components
should also be placed as close as possible to the IC. Please
see Application Note AN-1229 for further considerations and
the LM2830 demo board as an example of a four-layer
layout.
significantly with little detriment to the regulator stability. Like
the input capacitor, recommended multilayer ceramic capacitors are X7R or X5R types.
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A
Schottky diode is recommended for its fast switching times
and low forward voltage drop. The catch diode should be
chosen so that its current rating is greater than:
ID1 = IOUT x (1-D)
The reverse breakdown rating of the diode must be at least
the maximum input voltage plus appropriate margin. To improve efficiency, choose a Schottky diode with a low forward
voltage drop.
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between VO and the FB pin. A good value for R2
is 10kΩ. When designing a unity gain converter (Vo = 0.6V),
R1 should be between 0Ω and 100Ω, and R2 should be
equal or greater than 10kΩ.
VREF = 0.60V
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Switching losses are also associated with the internal PFET.
They occur during the switch on and off transition periods,
where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically
measuring the rise and fall times (10% to 90%) of the switch
at the switch node.
Switching Power Loss is calculated as follows:
PSWR = 1/2(VIN x IOUT x FSW x TRISE)
PSWF = 1/2(VIN x IOUT x FSW x TFALL)
PSW = PSWR + PSWF
Another loss is the power required for operation of the internal circuitry:
PQ = IQ x VIN
IQ is the quiescent operating current, and is typically around
3.3mA for the 1.6MHz frequency option.
The complete LM2830 DC/DC converter efficiency can be
calculated in the following manner.
Or
Calculations for determining the most significant power
losses are shown below. Other losses totaling less than 2%
are not discussed.
Power loss (PLOSS) is the sum of two basic types of losses in
the converter: switching and conduction. Conduction losses
usually dominate at higher output loads, whereas switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D):
Typical Application power losses are:
Power Loss Tabulation
VSW is the voltage drop across the internal PFET when it is
on, and is equal to:
VSW = IOUT x RDSON
VD is the forward voltage drop across the Schottky catch
diode. It can be obtained from the diode manufactures Electrical Characteristics section. If the voltage drop across the
inductor (VDCR) is accounted for, the equation becomes:
VIN
5.0V
VOUT
3.3V
IOUT
1.0A
POUT
3.3W
PDIODE
150mW
VD
0.45V
FSW
1.6MHz
IQ
3.3mA
PQ
17mW
6mW
TRISE
4nS
PSWR
TFALL
4nS
PSWF
6mW
RDS(ON)
150mΩ
PCOND
100mW
INDDCR
70mΩ
PIND
70mW
D
0.667
PLOSS
345mW
η
88%
PINTERNAL
125mW
ΣPCOND + PSW + PDIODE + PIND + PQ = PLOSS
ΣPCOND + PSWF + PSWR + PQ = PINTERNAL
PINTERNAL = 125mW
Thermal Definitions
TJ = Chip junction temperature
TA = Ambient temperature
RθJC = Thermal resistance from chip junction to device case
RθJA = Thermal resistance from chip junction to ambient air
Heat in the LM2830 due to internal power dissipation is
removed through conduction and/or convection.
Conduction: Heat transfer occurs through cross sectional
areas of material. Depending on the material, the transfer of
heat can be considered to have poor to good thermal conductivity properties (insulator vs. conductor).
Heat Transfer goes as:
Silicon → package → lead frame → PCB
Convection: Heat transfer is by means of airflow. This could
be from a fan or natural convection. Natural convection
occurs when air currents rise from the hot device to cooler
air.
Thermal impedance is defined as:
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
PDIODE = VD x IOUT x (1-D)
Often this is the single most significant power loss in the
circuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
Another significant external power loss is the conduction
loss in the output inductor. The equation can be simplified to:
PIND = IOUT2 x RDCR
The LM2830 conduction loss is mainly associated with the
internal PFET:
If the inductor ripple current is fairly small, the conduction
losses can be simplified to:
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LM2830
PCOND = IOUT2 x RDSON x D
Calculating Efficiency, and
Junction Temperature
LM2830
Thermal Definitions
ambient temperature in the given working application until
the circuit enters thermal shutdown. If the SW-pin is monitored, it will be obvious when the internal PFET stops switching, indicating a junction temperature of 165˚C. Knowing the
internal power dissipation from the above methods, the junction temperature, and the ambient temperature RθJA can be
determined.
(Continued)
Thermal impedance from the silicon junction to the ambient
air is defined as:
Once this is determined, the maximum ambient temperature
allowed for a desired junction temperature can be found.
An example of calculating RθJA for an application using the
National Semiconductor LM2830 LLP demonstration board
is shown below.
The four layer PCB is constructed using FR4 with 1⁄2 oz
copper traces. The copper ground plane is on the bottom
layer. The ground plane is accessed by two vias. The board
measures 3.0cm x 3.0cm. It was placed in an oven with no
forced airflow. The ambient temperature was raised to
144˚C, and at that temperature, the device went into thermal
shutdown.
From the previous example:
The PCB size, weight of copper used to route traces and
ground plane, and number of layers within the PCB can
greatly effect RθJA. The type and number of thermal vias can
also make a large difference in the thermal impedance.
Thermal vias are necessary in most applications. They conduct heat from the surface of the PCB to the ground plane.
Four to six thermal vias should be placed under the exposed
pad to the ground plane if the LLP package is used.
Thermal impedance also depends on the thermal properties
of the application operating conditions (Vin, Vo, Io etc), and
the surrounding circuitry.
Silicon Junction Temperature Determination Method 1:
To accurately measure the silicon temperature for a given
application, two methods can be used. The first method
requires the user to know the thermal impedance of the
silicon junction to top case temperature.
Some clarification needs to be made before we go any
further.
RθJC is the thermal impedance from all six sides of an IC
package to silicon junction.
RΦJC is the thermal impedance from top case to the silicon
junction.
In this data sheet we will use RΦJC so that it allows the user
to measure top case temperature with a small thermocouple
attached to the top case.
RΦJC is approximately 30˚C/Watt for the 6-pin LLP package
with the exposed pad. Knowing the internal dissipation from
the efficiency calculation given previously, and the case
temperature, which can be empirically measured on the
bench we have:
PINTERNAL = 189mW
If the junction temperature was to be kept below 125˚C, then
the ambient temperature could not go above 109˚C
Tj - (RθJA x PLOSS) = TA
125˚C - (111˚C/W x 189mW) = 104˚C
LLP Package
Therefore:
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Tj = (RΦJC x PLOSS) + TC
From the previous example:
Tj = (RΦJC x PINTERNAL) + TC
Tj = 30˚C/W x 0.189W + TC
The second method can give a very accurate silicon junction
temperature.
The first step is to determine RθJA of the application. The
LM2830 has over-temperature protection circuitry. When the
silicon temperature reaches 165˚C, the device stops switching. The protection circuitry has a hysteresis of about 15˚C.
Once the silicon temperature has decreased to approximately 150˚C, the device will start to switch again. Knowing
this, the RθJA for any application can be characterized during
the early stages of the design one may calculate the RθJA by
placing the PCB circuit into a thermal chamber. Raise the
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FIGURE 4. Internal LLP Connection
For certain high power applications, the PCB land may be
modified to a "dog bone" shape (see Figure 6). By increasing
the size of ground plane, and adding thermal vias, the RθJA
for the application can be reduced.
14
LM2830
LLP Package
(Continued)
20197406
FIGURE 5. 6-Lead LLP PCB Dog Bone Layout
15
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LM2830
LM2830X Design Example 1
20197407
FIGURE 6. LM2830X (1.6MHz): Vin = 5V, Vo = 1.2V @ 1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830X
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1
3.3µH, 1.3A
Coilcraft
ME3220-332
R2
15.0kΩ, 1%
Vishay
CRCW08051502F
R1
15.0kΩ, 1%
Vishay
CRCW08051502F
R3
100kΩ, 1%
Vishay
CRCW08051003F
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16
LM2830
LM2830X Design Example 2
20197460
FIGURE 7. LM2830X (1.6MHz): Vin = 5V, Vo = 0.6V @ 1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830X
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1
3.3µH, 1.3A
Coilcraft
ME3220-332
R2
10.0kΩ, 1%
Vishay
CRCW08051000F
R1
0Ω
R3
100kΩ, 1%
Vishay
CRCW08051003F
17
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LM2830
LM2830X Design Example 3
20197408
FIGURE 8. LM2830X (1.6MHz): Vin = 5V, Vo = 3.3V @ 1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830X
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1
2.2µH, 1.8A
Coilcraft
ME3220-222
R2
10.0kΩ, 1%
Vishay
CRCW08051002F
R1
45.3kΩ, 1%
Vishay
CRCW08054532F
R3
100kΩ, 1%
Vishay
CRCW08051003F
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18
LM2830
LM2830Z Design Example 4
20197408
FIGURE 9. LM2830Z (3MHz): Vin = 5V, Vo = 3.3V @ 1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830Z
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1
1.6µH, 2.0A
TDK
VLCF4018T-1R6N1R7-2
R2
10.0kΩ, 1%
Vishay
CRCW08051002F
R1
45.3kΩ, 1%
Vishay
CRCW08054532F
R3
100kΩ, 1%
Vishay
CRCW08051003F
19
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LM2830
LM2830Z Design Example 5
20197407
FIGURE 10. LM2830Z (3MHz): Vin = 5V, Vo = 1.2V @ 1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830Z
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1
1.6µH, 2.0A
TDK
VLCF4018T-1R6N1R7-2
R2
10.0kΩ, 1%
Vishay
CRCW08051002F
R1
10.0kΩ, 1%
Vishay
CRCW08051002F
R3
100kΩ, 1%
Vishay
CRCW08051003F
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20
LM2830
LM2830X Dual Converters with Delayed Enabled Design Example 6
20197462
FIGURE 11. LM2830X (1.6MHz): Vin = 5V, Vo = 1.2V @ 1.0A & 3.3V @1.0A
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1, U2
1.0A Buck Regulator
NSC
LM2830X
U3
Power on Reset
NSC
LP3470M5X-3.08
C1, C3 Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, C4 Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C7
Trr delay capacitor
TDK
D1, D2 Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
L1, L2
3.3µH, 1.3A
Coilcraft
ME3220-332
R2, R4, R5
10.0kΩ, 1%
Vishay
CRCW08051002F
R1, R6
45.3kΩ, 1%
Vishay
CRCW08054532F
R3
100kΩ, 1%
Vishay
CRCW08051003F
21
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LM2830
LM2830X Buck Converter & Voltage Double Circuit with LDO Follower
Design Example 7
20197463
FIGURE 12. LM2830X (1.6MHz): Vin = 5V, Vo = 3.3V @ 1.0A & LP2986-5.0 @ 150mA
Bill of Materials
Part ID
Part Value
Manufacturer
Part Number
U1
1.0A Buck Regulator
NSC
LM2830X
U2
200mA LDO
NSC
LP2986-5.0
C1, Input Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C2, Output Cap
22µF, 6.3V, X5R
TDK
C3216X5ROJ226M
C1608X5R0J225M
C3 – C6
2.2µF, 6.3V, X5R
TDK
D1, Catch Diode
0.3Vf Schottky 1.5A, 30VR
TOSHIBA
CRS08
D2
0.4Vf Schottky 20VR, 500mA
ON Semi
MBR0520
L2
10µH, 800mA
CoilCraft
ME3220-103
L1
3.3µH, 2.2A
TDK
VLCF5020T-3R3N2R0-1
R2
45.3kΩ, 1%
Vishay
CRCW08054532F
R1
10.0kΩ, 1%
Vishay
CRCW08051002F
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22
LM2830
Physical Dimensions
inches (millimeters) unless otherwise noted
5-Lead SOT-23 Package
NS Package Number MF05A
6-Lead LLP Package
NS Package Number SDE06A
23
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LM2830 High Frequency 1.0A Load - Step-Down DC-DC Regulator
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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