ON MAC9 Triacs silicon bidirectional thyristor Datasheet

MAC9D, MAC9M, MAC9N
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed for high performance full-wave ac control applications
where high noise immunity and high commutating di/dt are required.
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Features
•
•
•
•
•
•
•
•
TRIACS
8 AMPERES RMS
400 thru 800 VOLTS
Blocking Voltage to 800 Volts
On-State Current Rating of 8.0 Amperes RMS at 100°C
Uniform Gate Trigger Currents in Three Quadrants
High Immunity to dv/dt − 500 V/ms minimum at 125°C
Minimizes Snubber Networks for Protection
Industry Standard TO-220AB Package
High Commutating di/dt − 6.5 A/ms minimum at 125°C
Pb−Free Packages are Available*
MT2
MT1
G
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Peak Repetitive Off−State Voltage (Note 1)
(TJ = −40 to 125°C, Sine Wave,
50 to 60 Hz, Gate Open)
MAC9D
MAC9M
MAC9N
VDRM,
VRRM
On-State RMS Current
(Full Cycle Sine Wave, 60 Hz, TC = 100°C)
IT(RMS)
8.0
A
ITSM
80
A
I2t
26
A2sec
PGM
16
W
Peak Non-Repetitive Surge Current
(One Full Cycle Sine Wave, 60 Hz,
TJ = 125°C)
Circuit Fusing Consideration (t = 8.3 ms)
Peak Gate Power
(Pulse Width ≤ 1.0 ms, TC = 80°C)
Average Gate Power
(t = 8.3 ms, TC = 80°C)
Value
Unit
V
400
600
800
PG(AV)
1
0.35
W
Operating Junction Temperature Range
TJ
−40 to +125
°C
Storage Temperature Range
Tstg
−40 to +150
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 3
MAC9xG
AYWW
1
2
TO−220AB
CASE 221A−09
STYLE 4
3
x
A
Y
WW
G
= D, M, or N
= Assembly Location
= Year
= Work Week
= Pb−Free Package
PIN ASSIGNMENT
1
Main Terminal 1
2
Main Terminal 2
3
Gate
4
Main Terminal 2
ORDERING INFORMATION
Device
Package
Shipping
MAC9D
TO−220AB
50 Units / Rail
MAC9DG
TO−220AB
(Pb−Free)
50 Units / Rail
MAC9M
TO−220AB
50 Units / Rail
MAC9MG
TO−220AB
(Pb−Free)
50 Units / Rail
MAC9N
TO−220AB
50 Units / Rail
MAC9NG
TO−220AB
(Pb−Free)
50 Units / Rail
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MAC9/D
MAC9D, MAC9M, MAC9N
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance,
Junction−to−Case
Junction−to−Ambient
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
Symbol
Value
Unit
RqJC
RqJA
2.2
62.5
°C/W
TL
260
°C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions)
Symbol
Characteristic
Min
Typ
Max
−
−
−
−
0.01
2.0
−
1.2
1.6
10
10
10
16
18
22
50
50
50
−
30
50
−
−
20
30
50
80
0.5
0.5
0.5
0.69
0.77
0.72
1.5
1.5
1.5
0.2
−
−
(di/dt)c
6.5
−
dv/dt
500
−
Unit
OFF CHARACTERISTICS
Peak Repetitive Blocking Current
(VD = Rated VDRM, VRRM; Gate Open)
TJ = 25°C
TJ = 125°C
IDRM,
IRRM
mA
ON CHARACTERISTICS
Peak On-State Voltage (Note 2)
(ITM = ± 11 A Peak)
VTM
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
IGT
Holding Current
(VD = 12 V, Gate Open, Initiating Current = ±150 mA)
IH
Latching Current (VD = 24 V, IG = 50 mA)
MT2(+), G(+); MT2(−), G(−)
MT2(+), G(−)
IL
Gate Trigger Voltage (VD = 12 V, RL = 100 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
VGT
Gate Non−Trigger Voltage (VD = 12 V, RL = 100 W, TJ = 125°C)
MT2(+), G(+); MT2(+), G(−); MT2(−), G(−)
VGD
V
mA
mA
mA
V
V
DYNAMIC CHARACTERISTICS
Rate of Change of Commutating Current; See Figure 10.
(VD = 400 V, ITM = 4.4 A, Commutating dv/dt = 18 V/ms,
Gate Open, TJ = 125°C, f = 250 Hz, No Snubber)
A/ms
CL = 10 mF
LL = 40 mH
Critical Rate of Rise of Off-State Voltage
(VD = Rated VDRM, Exponential Waveform,
Gate Open, TJ = 125°C)
2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
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2
−
V/ms
MAC9D, MAC9M, MAC9N
Voltage Current Characteristic of Triacs
(Bidirectional Device)
+ Current
Symbol
Parameter
VTM
VDRM
Peak Repetitive Forward Off State Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Reverse Off State Voltage
IRRM
Peak Reverse Blocking Current
VTM
Maximum On State Voltage
IH
Holding Current
on state
IH
IRRM at VRRM
off state
IH
Quadrant 3
MainTerminal 2 −
VTM
Quadrant Definitions for a Triac
MT2 POSITIVE
(Positive Half Cycle)
+
(+) MT2
Quadrant II
(+) MT2
(−) IGT
GATE
Quadrant I
(+) IGT
GATE
MT1
MT1
REF
REF
IGT −
+ IGT
(−) MT2
Quadrant III
Quadrant 1
MainTerminal 2 +
(−) MT2
Quadrant IV
(+) IGT
GATE
(−) IGT
GATE
MT1
MT1
REF
REF
−
MT2 NEGATIVE
(Negative Half Cycle)
All polarities are referenced to MT1.
With in−phase signals (using standard AC lines) quadrants I and III are used.
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+ Voltage
IDRM at VDRM
MAC9D, MAC9M, MAC9N
125
12
PAV, AVERAGE POWER (WATTS)
TC, CASE TEMPERATURE (°C)
DC
10
120
α = 120, 90, 60, 30°
115
α = 180°
110
DC
105
100
0
1
2
3
4
5
6
IT(RMS), RMS ON-STATE CURRENT (AMP)
7
180°
8
6
60°
4
90°
α = 30°
2
0
8
120°
0
1
100
TYPICAL AT
TJ = 25°C
MAXIMUM @ TJ = 125°C
I T, INSTANTANEOUS ON-STATE CURRENT (AMP)
7
8
Figure 2. On-State Power Dissipation
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
Figure 1. RMS Current Derating
2
3
4
5
6
IT(RMS), ON-STATE CURRENT (AMP)
10
1
0.1
0.01
0.1
1
10
100
t, TIME (ms)
1·10 4
1000
Figure 4. Thermal Response
MAXIMUM @ TJ = 25°C
40
I H, HOLDING CURRENT (mA)
1
35
30
MT2 POSITIVE
25
20
15
MT2 NEGATIVE
10
0.1
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
5
−50
5
Figure 3. On-State Characteristics
−30
−10
10
30
50
70
90
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Holding Current Variation
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4
110
130
MAC9D, MAC9M, MAC9N
1
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
0.45
0.4
−50
VGT, GATE TRIGGER VOLTAGE (VOLT)
IGT, GATE TRIGGER CURRENT (mA)
100
Q2
Q3
Q1
10
1
−50
−30
−10
30
70
10
50
90
TJ, JUNCTION TEMPERATURE (°C)
110
130
Q3
Q1
Q2
−30
5000
110
130
100
(dv/dt) c , CRITICAL RATE OF RISE OF
COMMUTATING VOLTAGE(V/μ s)
4.5K
4K
3.5K
MT2 NEGATIVE
3K
2.5K
2K
1.5K
1K
MT2 POSITIVE
500
0
10
70
30
50
90
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Gate Trigger Voltage Variation
1
10
100
RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS)
1000
TJ = 125°C
10
tw
10
100°C
f=
1
6f ITM
1000
15
20
25
30
35
40
45
50
55
60
(di/dt)c, RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)
Figure 8. Critical Rate of Rise of Off-State Voltage
(Exponential)
Figure 9. Critical Rate of Rise of
Commutating Voltage
LL
200 VRMS
ADJUST FOR
ITM, 60 Hz VAC
CHARGE
75°C
2 tw
(di/dt)c =
VDRM
1
1N4007
MEASURE
I
TRIGGER
CHARGE
CONTROL
NON-POLAR
CL
TRIGGER CONTROL
dv/dt , CRITICAL RATE OF RISE OF OFF-STATE VOLTAGE(V/μ s)
Figure 6. Gate Trigger Current Variation
−10
−
+
200 V
MT2
1N914 51 W
G
MT1
Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.
Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c
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MAC9D, MAC9M, MAC9N
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−09
ISSUE AA
−T−
B
SEATING
PLANE
C
F
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
−−−
−−− 0.080
STYLE 4:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
−−−
−−−
2.04
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
MAIN TERMINAL 2
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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MAC9/D
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