AD ADG636YRU 1 pc charge injection, 100 pa leakage cmos 5 v/5 v/3 v dual spdt switch Datasheet

a
1 pC Charge Injection, 100 pA Leakage
CMOS 5 V/+5 V/+3 V Dual SPDT Switch
ADG636
FEATURES
1 pC Charge Injection
2.7 V to 5.5 V Dual Supply
+2.7 V to +5.5 V Single Supply
Automotive Temperature Range: –40C to +125C
100 pA (Max @ 25C) Leakage Currents
85 Typ On Resistance
Rail-to-Rail Operation
Fast Switching Times
Typical Power Consumption (<0.1 W)
TTL/CMOS Compatible Inputs
14-Lead TSSOP Package
APPLICATIONS
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Instruments
Communication Systems
Sample-and-Hold Systems
Remote Powered Equipment
Audio and Video Signal Routing
Relay Replacement
Avionics
FUNCTIONAL BLOCK DIAGRAM
ADG636
S1A 4
6
D1
9
D2
S1B 5
S2A 11
S2B 10
LOGIC
1
14
2
A0
A1
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG636 is a monolithic device, comprising two independently
selectable CMOS SPDT (Single Pole, Double Throw) switches.
When on, each switch conducts equally well in both directions.
1. Ultralow Charge Injection (QINJ: ± 1.5 pC typ over full
signal range)
The ADG636 operates from a dual ± 2.7 V to ± 5.5 V supply, or
from a single supply of +2.7 V to +5.5 V.
This switch offers ultralow charge injection of ± 1.5 pC over the
entire signal range and leakage current of 10 pA typical at 25°C.
It offers on-resistance of 85 Ω typ, which is matched to within
2 Ω between channels. The ADG636 also has low power dissipation yet gives high switching speeds.
2. Leakage Current <0.25 nA max @ 85°C
3. Dual ± 2.7 V to ± 5 V or Single +2.7 V to +5.5 V Supply
4. Automotive Temperature Range: –40°C to +125°C
5. Small 14-Lead TSSOP Package
The ADG636 exhibits break-before-make switching action and
is available in a 14-lead TSSOP package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
ADG636–SPECIFICATIONS
DUAL SUPPLY1 (V
DD =
5 V 10%, VSS = –5 V 10%, GND = 0 V. All specifications –40C to +125C unless noted.)
Parameter
+25C
–40C to
+85C
–40C to
+125C
Unit
VSS to VDD
V
140
160
Ω typ
Ω max
5.5
6.5
55
60
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
85
115
On Resistance Match Between
Channels (DRON)
On Resistance Flatness (R FLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
Drain OFF Leakage I D (OFF)
Channel ON Leakage I D, IS (ON)
DIGITAL INPUTS
Input High Voltage, V INH
Input Low Voltage, VINL
Input Current
IINL or IINH
Ω typ
Ω max
Ω typ
Ω max
VS = ± 3 V, IS = –1 mA
VDD = +5.5 V, VSS = –5.5 V
VS = ± 4.5 V, VD = 4.5 V,
Test Circuit 2
VS = ± 4.5 V, VD = 4.5 V,
Test Circuit 2
VS = VD = ± 4.5 V, Test Circuit 3
±2
± 0.25
±2
± 0.25
±6
2.4
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
VS1A = +3 V, VS1B = –3 V, RL = 300 Ω,
CL = 35 pF, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 3 V, Test Circuit 5
RL = 300 Ω, CL = 35 pF
VS = 3 V, Test Circuit 5
RL = 300 Ω, CL = 35 pF,
VS = 3 V, Test Circuit 5
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Test Circuit 7
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 10
RL = 50 Ω, CL = 5 pF, Test Circuit 9
f = 1 MHz
f = 1 MHz
f = 1 MHz
2
2
Break-Before-Make Time Delay, tBBM
Charge Injection
–1.2
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
–65
dB typ
Channel-to-Channel Crosstalk
–65
dB typ
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
610
5
8
8
MHz typ
pF typ
pF typ
pF typ
0.001
µA typ
µA max
µA typ
µA max
tON Enable
tOFF Enable
120
150
170
190
90
100
10
1.0
ISS
VS = ± 3 V, IS = –1 mA
± 0.25
70
100
100
135
55
80
20
POWER REQUIREMENTS
I DD
VDD = +4.5 V, VSS = –4.5 V
VS = ± 3 V, IS = –1 mA,
Test Circuit 1
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.005
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
Transition Time
2
4
25
40
Test Conditions/Comments
0.001
1.0
VDD = +5.5 V, VSS = –5.5 V
Digital Inputs = 0 V or 5.5 V
Digital Inputs = 0 V or 5.5 V
NOTES
1
Y Version Temperature Range: –40°C to +125°C
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
ADG636
SINGLE SUPPLY1 (V
DD
= 5 V 10%, VSS = 0 V, GND = 0 V. All specifications –40C to +125C unless otherwise noted.)
Parameter
+25C
–40C to
+85C
–40C to
+125C
Unit
0 V to VDD
V
350
380
Ω typ
Ω max
12
13
Ω typ
Ω max
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
210
290
On Resistance Match Between
Channels (∆RON)
3
LEAKAGE CURRENTS
Source OFF Leakage I S (OFF)
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
Drain OFF Leakage I D (OFF)
Channel ON Leakage I D, IS (ON)
DIGITAL INPUTS
Input High Voltage, V INH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS
Transition Time
VDD = 5.5 V
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Test Circuit 2
VS = 1 V/4.5 V, VD = 4.5 V/1 V
Test Circuit 2
VS = VD = 4.5 V/1 V,
Test Circuit 3
±2
± 0.25
±2
± 0.25
±6
2.4
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
VS1A = 3 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 3 V, Test Circuit 5
RL = 300 Ω, CL = 35 pF
VS = 3 V, Test Circuit 5
RL = 300 Ω, CL = 35 pF,
VS = 3 V, Test Circuit 5
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Test Circuit 7
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 10
RL = 50 Ω, CL = 5 pF, Test Circuit 9
f = 1 MHz
f = 1 MHz
f = 1 MHz
2
2
Break-Before-Make Time Delay, t BBM
Charge Injection
0.3
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
–60
dB typ
Channel-to-Channel Crosstalk
–65
dB typ
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
530
5
8
8
MHz typ
pF typ
pF typ
pF typ
tON Enable
tOFF Enable
185
210
235
275
120
135
10
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
POWER REQUIREMENTS
0.001
1.0
NOTES
1
Y Version Temperature Range: –40°C to +125°C
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
VS = 3.5 V, IS = –1 mA
± 0.25
90
150
135
180
70
105
30
IDD
VDD = 4.5 V, VSS = 0 V
VS = 3.5 V, IS = –1 mA,
Test Circuit 1
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.005
CIN, Digital Input Capacitance
Test Conditions/Comments
–3–
µA typ
µA max
ADG636
SINGLE SUPPLY1 (V
DD
= 3 V 10%, VSS = 0 V, GND = 0 V. All specifications –40C to +125C unless otherwise noted.)
Parameter
+25C
–40C to
+85C
ANALOG SWITCH
Analog Signal Range
On Resistance (R ON)
On Resistance Match Between
Channels (∆RON)
380
LEAKAGE CURRENTS
Source OFF Leakage I S (OFF)
± 0.01
± 0.1
± 0.01
± 0.1
± 0.01
± 0.1
Drain OFF Leakage I D (OFF)
Channel ON Leakage I D, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
Unit
0 V to VDD
V
460
Ω typ
VDD = 2.7 V, VSS = 0 V
VS = 1.5 V, IS = –1 mA, Test Circuit 1
5
Ω typ
VS = 1.5 V, IS = –1 mA
VDD = 3.3 V
VS = 1 V/3 V, VD = 3 V/1 V,
Test Circuit 2
VS = 1 V/3 V, VD = 3 V/1 V,
Test Circuit 2
VS = VD = 1 V/3 V,
Test Circuit 3
± 0.25
±2
± 0.25
±2
± 0.25
±6
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
0.005
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
Transition Time
420
–40C to
+125C
2
VIN = VINL or VINH
2
Break-Before-Make Time Delay, t BBM
170
320
250
360
110
175
80
Charge Injection
0.6
Off Isolation
–60
Channel-to-Channel Crosstalk
–65
Bandwidth –3 dB
CS (OFF)
CD (OFF)
CD, CS (ON)
530
5
8
8
tON Enable
tOFF Enable
390
450
460
530
205
230
10
VS1A = 2 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Test Circuit 4
RL = 300 Ω, CL = 35 pF
VS = 2 V, Test Circuit 6
RL = 300 Ω, CL = 35 pF
VS = 2 V, Test Circuit 6
RL = 300 Ω, CL = 35 pF,
VS1 = 2 V, Test Circuit 5
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Test Circuit 7
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 8
dB typ
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Test Circuit 10
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 9
pF typ
f = 1 MHz
pF typ
f = 1 MHz
pF typ
f = 1 MHz
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
POWER REQUIREMENTS
IDD
Test Conditions/Comments
VDD = 3.3 V
Digital Inputs = 0 V or 3.3 V
0.001
1.0
µA max
µA typ
NOTES
1
Y Version Temperature Range: –40°C to +125°C
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–4–
REV. 0
ADG636
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V
Analog Inputs2 . . . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V
Digital Inputs2 . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . 20 mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 10 mA
Operating Temperature Range
Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
TSSOP Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 150°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 27°C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . 300°C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . 220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at EN, A0, A1, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG636YRU
–40°C to +125°C
Thin Shrink Small Outline (TSSOP)
RU-14
PIN CONFIGURATION
A0 1
14
A1
EN 2
13
GND
Table I. Truth Table
ADG636
12 VDD
VSS 3
TOP VIEW
S1A 4 (Not To Scale) 11 S2A
S1B 5
10
D1 6
9
D2
NC 7
8
NC
S2B
A1
A0
EN
ON Switch
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
NONE
S1A, S2A
S1B, S2A
S1A, S2B
S1B, S2B
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG636 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. 0
–5–
WARNING!
ESD SENSITIVE DEVICE
ADG636
TERMINOLOGY
VDD
Most Positive Power Supply Potential
VSS
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to
ground at the device.
GND
Ground (0 V) Reference
IDD
Positive Supply Current
ISS
Negative Supply Current
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
RON
Ohmic Resistance between D and S
∆RON
On Resistance Match between any two channels (i.e., RON max – RON min)
RFLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of On Resistance as measured
over the specified analog signal range.
IS (OFF)
Source Leakage Current with the Switch “OFF”
ID (OFF)
Drain Leakage Current with the Switch “OFF”
ID, IS (ON)
Channel Leakage Current with the Switch “ON”
VD , VS
Analog Voltage on Terminals D, S
VINL
Maximum Input Voltage for Logic “0”
VINH
Minimum Input Voltage for Logic “1”
IINL(IINH)
Input Current of the Digital Input
CS (OFF)
Channel Input Capacitance for “OFF” condition.
CD (OFF)
Channel Output Capacitance for “OFF” condition.
CD, CS (ON)
“ON” Switch Capacitance
CIN
Digital Input Capacitance
tON(EN)
Delay time between the 50% and 90% points of the digital input and Switch “ON” condition
tOFF(EN)
Delay time between the 50% and 90% points of the digital input and Switch “OFF” condition
tTRANSITION
Delay time between the 50% and 90% points of the digital input and Switch “ON” condition when switching
from one address state to another.
tBBM
“OFF” time or “ON” time measured between the 80% points of both switches, when switching from one address
state to another.
Charge Injection
A measure of the Glitch Impulse transferred from the Digital Input to the Analog Output during switching.
Crosstalk
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance.
Off Isolation
A measure of unwanted signal coupling through an “OFF” switch.
Bandwidth
The Frequency Response of the “ON” Switch
Insertion Loss
Loss Due to the On Resistance of the Switch
–6–
REV. 0
Typical Performance Characteristics–ADG636
250
350
VDD = 5V
VSS = 0V
TA = 25C
VDD , VSS = 3V
200
VDD , V SS = 2.5V
ON RESISTANCE – ON RESISTANCE – 300
150
VDD , V SS = 3.3V
100
VDD , V SS = 5V
50
250
200
TA = +125C
100
50
VDD , V SS = 4.5V
0
–5
–4
–3
–2
–1
0
1
2
3
4
0
5
0
0.5
1.0
1.5
3.0
3.5
4.0
4.5
5.0
5
TA = 25C
VSS = 0V
500
ID (OFF)
3
1
VDD = 2.7V
–1
400
CURRENT – nA
ON RESISTANCE – 2.5
TPC 4. On Resistance vs. VD (VS) for Different
Temperatures. Single Supply
600
VDD = 3V
300
VDD = 4.5V
200
IS (OFF)
–3
–5
ID , I S (ON)
–7
–9
VDD = 3.3V
–11
VDD = 5V
100
VDD = +5V
VSS = –5V
–13
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
–15
5.0
0
20
TPC 2. On Resistance vs. VD (VS). Single Supply
60
80
100
120
TPC 5. Leakage Currents vs. Temperatures. Dual Supply
180
160
40
TEMPERATURE – C
VD , VS – V
5
VDD = +5V
VSS = –5V
IS (OFF)
3
1
140
–1
120
TA = +125C
100
CURRENT – nA
ON RESISTANCE – 2.0
VD , VS – V
TPC 1. On Resistance vs. VD (VS). Dual Supply
TA = +85C
80
60
ID (OFF)
–3
–5
ID , I S (ON)
–7
–9
40
TA = +25C
0
–5
–11
TA = –40C
20
VDD = 5V
VSS = 0V
–13
–4
–3
–2
–1
0
1
2
3
4
–15
5
VD , V S – V
TPC 3. On Resistance vs. VD (VS) for Different
Temperatures. Dual Supply
REV. 0
TA = –40C
TA = +25C
VD , VS – V
0
TA = +85C
150
0
20
40
60
80
TEMPERATURE – C
100
120
TPC 6. Leakage Currents vs. Temperature. Single Supply
–7–
ADG636
1.0
0
TA = 25C
TA = 25C
–20
ATTENUATION – dB
0.5
CHARGE INJECTION – pC
–10
VDD = 3V
VSS = 0V
0
–0.5
VDD = 5V
VSS = 0V
–1.0
VDD = +5V
VSS = –5V
VDD = +5V
VSS = 0V
–30
–40
VDD = +5V
VSS = –5V
–50
–60
–70
–1.5
–80
–2.0
–5
–4
–2
–3
–1
0
VS – V
1
3
2
–90
0.3
5
4
10
100
1000
FREQUENCY – MHz
TPC 7. Charge Injection vs. Source Voltage
TPC 10. Crosstalk vs. Frequency
0
250
TA = 25C
TA = 25C
–2
200
ATTENUATION – dB
VDD = +5V
VSS = –5V
150
tON
100
tOFF
–6
VDD = +5V
VSS = 0V
–8
–10
–12
–14
50
VDD = 5V
VSS = 0V
0
–40
VDD = +5V
VSS = –5V
–4
VDD = 5V
VSS = 0V
TIME – ns
1
–20
0
20
40
60
TEMPERATURE – C
–16
VDD = +5V
VSS = –5V
80
100
–18
0.3
120
1
10
100
1000
FREQUENCY – MHz
TPC 8. tON/tOFF Enable Timing vs. Temperature
TPC 11. On Response vs. Frequency
0
TA = 25C
–10
ATTENUATION – dB
–20
–30
VDD = +5V
VSS = 0V
–40
VDD = +5V
VSS = –5V
–50
–60
–70
–80
–90
0.3
1
10
100
FREQUENCY – MHz
1000
TPC 9. Off Isolation vs. Frequency
–8–
REV. 0
ADG636
Test Circuits
IDS
V1
S
VS
IS (OFF)
D
ID (OFF)
S
A
D
VD
0.1F
VS
A1
A0
50
3V
ADDRESS
DRIVE (VIN)
VSS
VDD
S1A
VS1A
S1B
VS1B
50%
90%
90%
tTRANSITION
VOUT
D1
RL
300
EN
GND
50%
0V
VOUT
2.4V
tTRANSITION
CL
35pF
Test Circuit 4. Transition Time, tTRANSITION
VDD
VSS
0.1F
0.1F
VS
S1A
A0
A1
50
ADDRESS
DRIVE (VIN)
VSS
VDD
VS
3V
0V
S1B
VOUT
RL
300
EN
GND
80%
80%
tBBM
VOUT
D1
2.4V
CL
35pF
Test Circuit 5. Break-Before-Make Delay, tBBM
VDD
VSS
0.1F
0.1F
VDD
ENABLE
DRIVE (VIN)
VSS
S1A
A0
A1
VS
3V
50%
S1B
V0
0.9V0
VOUT
D1
50
GND
RL
300
CL
35pF
tON(EN)
Test Circuit 6. Enable Delay, tON (EN), tOFF (EN)
REV. 0
0.9V0
0V
EN
VS
50%
0V
OUTPUT
–9–
A
Test Circuit 3. On Leakage
VSS
0.1F
D
VD
Test Circuit 2. Off Leakage
Test Circuit 1. On Resistance
VDD
S
NC
VS
RON = V1/IDS
ID (ON)
A
tOFF(EN)
ADG636
VDD
VSS
VOUT
RS
VDD
VSS
S
D
VOUT
QINJ = CL VOUT
VOUT
VIN
CL
1nF
VS
SW OFF
SW OFF
SW ON
DECODER
GND
SW
SWON
ON
VIN
A1 A2
SW OFF
SW OFF
CHARGE INJECTION = VOUT CL
EN
Test Circuit 7. Charge Injection
VDD
VSS
0.1F
0.1F
VDD
VSS
0.1F
VDD
0.1F
NETWORK
ANALYZER
VSS
VDD
S
50
VSS
NETWORK
ANALYZER
50
S
VS
50
VS
D
RL
50
GND
VOUT
D
GND
OFF ISOLATION = 20 LOG
RL
50
VOUT
VOUT
VS
INSERTION LOSS = 20 LOG
Test Circuit 8. Off Isolation
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 9. Bandwidth
VDD
VSS
0.1F
NETWORK
ANALYZER
0.1F
VDD
VSS
S1
VOUT
RL
50
D
S2
RL
50
50
GND
VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT
VS
Test Circuit 10. Channel-to-Channel Crosstalk
–10–
REV. 0
ADG636
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead TSSOP Package
(RU-14)
0.201 (5.10)
0.193 (4.90)
14
8
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
1
7
PIN 1
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
REV. 0
0.0256
(0.65)
BSC
0.0433 (1.10)
MAX
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
–11–
8
0
0.028 (0.70)
0.020 (0.50)
–12–
PRINTED IN U.S.A.
C02754–0–1/02(0)