LINER LTC3440EMS Micropower synchronous buck-boost dc/dc converter Datasheet

LTC3440
Micropower Synchronous
Buck-Boost DC/DC Converter
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FEATURES
DESCRIPTIO
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The LTC®3440 is a high efficiency, fixed frequency, BuckBoost DC/DC converter that operates from input voltages
above, below or equal to the output voltage. The topology
incorporated in the IC provides a continuous transfer
function through all operating modes, making the product
ideal for single lithium-ion, multicell alkaline or NiMH
applications where the output voltage is within the battery
voltage range.
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Single Inductor
Fixed Frequency Operation with Battery Voltages
Above, Below or Equal to the Output
Synchronous Rectification: Up to 96% Efficiency
25μA Quiescent Current in Burst Mode® Operation
Up to 600mA Continuous Output Current
No Schottky Diodes Required (VOUT < 4.3V)
VOUT Disconnected from VIN During Shutdown
2.5V to 5.5V Input and Output Range
Programmable Oscillator Frequency
from 300kHz to 2MHz
Synchronizable Oscillator
Burst Mode Enable Control
<1μA Shutdown Current
Small Thermally Enhanced 10-Pin MSOP and
(3mm × 3mm) DFN Packages
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APPLICATIO S
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Palmtop Computers
Handheld Instruments
MP3 Players
Digital Cameras
The device includes two 0.19Ω N-channel MOSFET
switches and two 0.22Ω P-channel switches. Switching
frequencies up to 2MHz are programmed with an external
resistor and the oscillator can be synchronized to an
external clock. Quiescent current is only 25μA in Burst
Mode operation, maximizing battery life in portable applications. Burst Mode operation is user controlled and can
be enabled by driving the MODE/SYNC pin high. If the
MODE/SYNC pin has either a clock or is driven low, then
fixed frequency switching is enabled.
Other features include a 1μA shutdown, soft-start control, thermal shutdown and current limit. The LTC3440 is
available in the 10-pin thermally enhanced MSOP and
(3mm × 3mm) DFN packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
Protected by U.S. Patents including 6404251, 6166527.
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TYPICAL APPLICATIO
Li-Ion to 3.3V at 600mA Buck-Boost Converter
L1
10μH
4
SW1
SW2
LTC3440
6
7
VIN
VOUT
Li-Ion
+
2
C1 *
10μF
1
SHDN/SS
FB
MODE/SYNC
VC
RT
RT
60.4k
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
GND
94
R1
340k
9
C2
22μF
C5 1.5nF
10
5
R3
15k
EFFICIENCY (%)
8
VOUT = 3.3V
98 IOUT = 100mA
96 fOSC = 1MHz
VOUT
3.3V
600mA
3
VIN = 2.7V TO 4.2V
Efficiency vs VIN
100
92
90
88
86
84
R2
200k
82
80
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH6D38-100
2.5
3440 TA01
3.0
3.5
4.0
VIN (V)
4.5
5.0
5.5
3440 TA02
3440fb
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LTC3440
W W
W
AXI U
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ABSOLUTE
RATI GS
(Note 1)
VIN, VOUT Voltage........................................ – 0.3V to 6V
SW1, SW2 Voltage ..................................... – 0.3V to 6V
VC, RT, FB, SHDN/SS,
MODE/SYNC Voltage .................................. – 0.3V to 6V
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
10 VC
RT
1
MODE/SYNC
2
SW1
3
SW2
4
7 VIN
GND
5
6 VOUT
9 FB
11
8 SHDN/SS
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 43°C/ W, θJC = 3°C/ W
ORDER PART
NUMBER
LTC3440EDD
10
9
8
7
6
VC
FB
SHDN/SS
VIN
VOUT
MS PACKAGE
10-LEAD PLASTIC MSOP
DD
PART MARKING
LTC3440EMS
MS
PART MARKING
TJMAX = 125°C,
θJA = 130°C/ W 1 LAYER BOARD
θJA = 100°C/ W 4 LAYER BOARD
θJC = 45°C/ W
LBKT
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
ORDER PART
NUMBER
TOP VIEW
1
2
3
4
5
RT
MODE/SYNC
SW1
SW2
GND
LTNP
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 60k, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.4
2.5
V
2.5
5.5
V
2.5
5.5
V
Input Start-Up Voltage
●
Input Operating Range
●
Output Voltage Adjust Range
●
●
1.196
Feedback Voltage
Feedback Input Current
VFB = 1.22V
1.22
1.244
V
1
50
nA
Quiescent Current, Burst Mode Operation
VC = 0V, MODE/SYNC = 3V (Note 3)
25
40
μA
Quiescent Current, Shutdown
SHDN = 0V, Not Including Switch Leakage
0.1
1
μA
Quiescent Current, Active
VC = 0V, MODE/SYNC = 0V (Note 3)
600
1000
μA
NMOS Switch Leakage
Switches B and C
0.1
5
μA
PMOS Switch Leakage
Switches A and D
0.1
10
μA
NMOS Switch On Resistance
Switches B and C
0.19
Ω
PMOS Switch On Resistance
Switches A and D
0.22
Ω
75
%
%
Input Current Limit
Maximum Duty Cycle
Boost (% Switch C On)
Buck (% Switch A On)
●
1
●
●
55
100
Minimum Duty Cycle
●
Frequency Accuracy
●
MODE/SYNC Threshold
MODE/SYNC Input Current
A
0
0.8
1
0.4
VMODE/SYNC = 5.5V
0.01
1.2
%
MHz
2
V
1
μA
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LTC3440
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 60k, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
Error Amp AVOL
MAX
UNITS
90
dB
Error Amp Source Current
15
μA
Error Amp Sink Current
380
μA
SHDN/SS Threshold
When IC is Enabled
When EA is at Maximum Boost Duty Cycle
SHDN/SS Input Current
VSHDN = 5.5V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC3440E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
●
0.4
1
2.2
1.5
V
V
0.01
1
μA
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Current measurements are performed when the outputs are not
switching.
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TYPICAL PERFOR A CE CHARACTERISTICS
Li-Ion to 3.3V Efficiency
(fOSC = 300kHz)
90
Burst Mode
OPERATION
80
60
EFFICIENCY (%)
VIN = 2.5V
VIN = 3.3V
50
40
70
VIN = 4.2V
VIN = 2.5V
VIN = 3.3V
10
60
50
VIN = 3.3V
1
40
30
10
100
1
OUTPUT CURRENT (mA)
1000
20
0.1
70
fOSC = 1MHz
1
10
100
OUTPUT CURRENT (mA)
3440 G01
40
0.1
1000
20
0.1
fOSC = 2MHz
10
100
1
OUTPUT CURRENT (mA)
Switch Pins on the Edge of
Buck/Boost and Approaching Boost
Switch Pins on the Edge of
Buck/Boost and Approaching Buck
SW1
2V/DIV
SW2
2V/DIV
SW2
2V/DIV
SW2
2V/DIV
VIN = 3.42V
VOUT = 3.3V
IOUT = 250mA
50ns/DIV
3440 G05
1000
3440 G03
SW1
2V/DIV
3440 G04
VIN = 3.3V
50
SW1
2V/DIV
50ns/DIV
VIN = 4.2V
3440 G02
Switch Pins During Buck/Boost
VIN = 3.78V
VOUT = 3.3V
IOUT = 250mA
VIN = 2.5V
60
30
30
fOSC = 300kHz
20
0.1
POWER LOSS (mW)
70
80
100
80
VIN = 4.2V
Burst Mode
OPERATION
90
Burst Mode
OPERATION
EFFICIENCY (%)
90
100
1000
100
100
EFFICIENCY (%)
Li-Ion to 3.3V Efficiency
(fOSC = 2MHz)
Li-Ion to 3.3V Efficiency,
Power Loss (fOSC = 1MHz)
VIN = 4.15V
VOUT = 3.3V
IOUT = 250mA
50ns/DIV
3440 G06
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LTC3440
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TYPICAL PERFOR A CE CHARACTERISTICS
Switch Pins in Buck Mode
SW1
2V/DIV
Buck
VIN = 5V
SW1
2V/DIV
VOUT
10mV/DIV
AC Coupled
SW2
2V/DIV
Boost
VIN = 2.5V
250ns/DIV
3440 G07
VIN = 2.5V
VOUT = 3.3V
IOUT = 250mA
Active Quiescent Current
5
35
65
TEMPERATURE (°C)
95
VIN = VOUT = 3.6V
30
20
10
–55
125
–25
5
35
65
TEMPERATURE (°C)
95
3440 G10
125
3440 G13
5
35
65
TEMPERATURE (°C)
95
VIN = VOUT = 3.6V
SWITCHES B AND C
0.20
0.10
–55
–25
5
35
65
TEMPERATURE (°C)
125
Feedback Voltage
1.236
0.15
95
–25
3440 G12
FEEDBACK VOLTAGE (V)
0.95
5
35
65
TEMPERATURE (°C)
5
–55
125
0.25
NMOS RDS(ON) (Ω)
FREQUENCY (MHz)
1.05
–25
10
NMOS RDS(ON)
0.30
VIN = VOUT = 3.6V
0.90
–55
15
3440 G11
Output Frequency
1.00
3440 G09
20
E/A SOURCE CURRENT (μA)
VIN + VOUT CURRENT (μA)
450
1μs/DIV
Error Amp Source Current
VIN = VOUT = 3.6V
500
–25
L = 10μH
COUT = 22μF
IOUT = 250mA
fOSC = 1MHz
3440 G08
40
VIN = VOUT = 3.6V
400
–55
250ns/DIV
Burst Mode Quiescent Current
550
1.10
Buck/Boost
VIN = 3.78V
SW2
2V/DIV
VIN = 5V
VOUT = 3.3V
IOUT = 250mA
VIN + VOUT CURRENT (μA)
VOUT Ripple During Buck,
Buck/Boost and Boost Modes
Switch Pins in Boost Mode
95
125
3440 G14
VIN = VOUT = 3V
1.216
1.196
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
3440 G15
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LTC3440
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TYPICAL PERFOR A CE CHARACTERISTICS
Feedback Voltage Line Regulation
Error Amp Sink Current
430
E/A SINK CURRENT (μA)
LINE REGULATION (dB)
VIN = VOUT = 2.5V TO 5.5V
80
70
60
–55
–25
5
35
65
TEMPERATURE (°C)
95
0.30
VIN = VOUT = 3.6V
410
390
370
–25
5
35
65
TEMPERATURE (°C)
95
Minimum Start Voltage
80
75
5
35
65
TEMPERATURE (°C)
95
125
3440 G19
5
35
65
TEMPERATURE (°C)
95
125
Current Limit
3000
VIN = VOUT = 3.6V
PEAK SWITCH
2500
CURRENT LIMIT (A)
MINIMUM START VOLTAGE (V)
DUTY CYCLE (%)
85
–25
3440 G18
2.40
VIN = VOUT = 3.6V
RT = 60k
–25
0.10
–55
125
3440 G17
Boost Max Duty Cycle
70
–55
0.20
0.15
3440 G16
90
VIN = VOUT = 3.6V
SWITCHES A AND D
0.25
350
–55
125
PMOS RDS(ON)
PMOS RDS(ON) (Ω)
90
2.35
2.30
2000
AVERAGE INPUT
1500
2.25
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
3440 G20
1000
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
3440 G21
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LTC3440
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PI FU CTIO S
RT (Pin 1): Timing Resistor to Program the Oscillator
Frequency. The programming frequency range is 300kHz
to 2MHz.
fOSC =
6 • 1010
Hz
RT
MODE/SYNC (Pin 2): MODE/SYNC = External CLK : Synchronization of the internal oscillator. A clock frequency of
twice the desired switching frequency and with a pulse
width between 100ns and 2μs is applied. The oscillator
free running frequency is set slower than the desired
synchronized switching frequency to guarantee sync. The
oscillator RT component value required is given by:
RT =
8 • 1010
fSW
ages over 4.3V, a Schottky diode is required from SW2 to
VOUT to ensure the SW pin does not exhibit excess voltage.
GND (Pin 5): Signal and Power Ground for the IC.
VOUT (Pin 6): Output of the Synchronous Rectifier. A filter
capacitor is placed from VOUT to GND.
VIN (Pin 7): Input Supply Pin. Internal VCC for the IC. A
ceramic bypass capacitor as close to the VIN pin and GND
(Pin 5) is required.
SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.
Grounding this pin shuts down the IC. Tie to >1.5V to
enable the IC and > 2.5V to ensure the error amp is not
clamped from soft-start. An RC from the shutdown command signal to this pin will provide a soft-start function by
limiting the rise time of the VC pin.
where fSW = desired synchronized switching frequency.
FB (Pin 9): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.5V to
5.5V. The feedback reference voltage is typically 1.22V.
SW1 (Pin 3): Switch Pin Where the Internal Switches A
and B are Connected. Connect inductor from SW1 to SW2.
An optional Schottky diode can be connected from SW1 to
ground. Minimize trace length to keep EMI down.
VC (Pin 10): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to
compensate the loop. See the section “Compensating the
Feedback Loop” for guidelines.
SW2 (Pin 4): Switch Pin Where the Internal Switches C
and D are Connected. For applications with output volt-
Exposed Pad (Pin 11, DFN Package Only): Ground. This
pin must be soldered to the PCB and electrically connected
to ground.
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LTC3440
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BLOCK DIAGRA
SW1
3
4
SW2
SW A
SW D
7
6
SW B
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
–0.4A
SW C
–
+
VOUT
2.5V TO 5.5V
VOUT
+
VIN
2.5V TO 5.5V
ISENSE
AMP
REVERSE
CURRENT
LIMIT
SUPPLY
CURRENT
LIMIT
–
+
UVLO
+
RT
RT
+
1.22V
R1
–
PWM
COMPARATORS
9
CLAMP
–
10
1
FB
+
2.4V
PWM
LOGIC
AND
OUTPUT
PHASING
–
–
+
2.7A
ERROR
AMP
VC
OSC
R2
SYNC
SLEEP
Burst Mode
OPERATION
CONTROL
SHUTDOWN
8
SHDN/SS
RSS
VIN
5μs DELAY
CSS
MODE/SYNC 2
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
5
GND
3440 BD
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LTC3440
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OPERATIO
The LTC3440 provides high efficiency, low noise power
for applications such as portable instrumentation. The
LTC proprietary topology allows input voltages above,
below or equal to the output voltage by properly phasing
the output switches. The error amp output voltage on the
VC pin determines the output duty cycle of the switches.
Since the VC pin is a filtered signal, it provides rejection of
frequencies from well below the switching frequency. The
low RDS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at
high efficiency. Schottky diodes across the synchronous
switch D and synchronous switch B are not required, but
provide a lower drop during the break-before-make time
(typically 15ns). The addition of the Schottky diodes will
improve peak efficiency by typically 1% to 2% at 600kHz.
High efficiency is achieved at light loads when Burst Mode
operation is entered and when the IC’s quiescent current
is a low 25μA.
LOW NOISE FIXED FREQUENCY OPERATION
Oscillator
The frequency of operation is user programmable and is
set through a resistor from the RT pin to ground where:
⎛ 6e10⎞
f=⎜
⎟ Hz
⎝ RT ⎠
An internally trimmed timing capacitor resides inside the
IC. The oscillator can be synchronized with an external
clock applied to the MODE/SYNC pin. A clock frequency of
twice the desired switching frequency and with a pulse
width between 100ns and 2μs is applied. The oscillator RT
component value required is given by:
RT =
8 • 1010
fSW
where fSW = desired synchronized switching frequency.
For example to achieve a 1.2MHz synchronized switching
frequency the applied clock frequency to the MODE/SYNC
pin is set to 2.4MHz and the timing resistor, RT, is set to
66.5k (closest 1% value).
Error Amp
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier to provide loop compensation for the converter.
The SHDN/SS pin will clamp the error amp output, VC, to
provide a soft-start function.
Supply Current Limit
The current limit amplifier will shut PMOS switch A off
once the current exceeds 2.7A typical. The current amplifier delay to output is typically 50ns.
Reverse Current Limit
The reverse current limit amplifier monitors the inductor
current from the output through switch D. Once a negative
inductor current exceeds – 400mA typical, the IC will shut
off switch D.
Output Switch Control
Figure 1 shows a simplified diagram of how the four
internal switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LTC3440 as a function of the internal control voltage, VCI.
The VCI voltage is a level shifted voltage from the output of
the error amp (VC pin) (see Figure 5). The output switches
are properly phased so the transfer between operation
modes is continuous, filtered and transparent to the user.
When VIN approaches VOUT the Buck/Boost region is
reached where the conduction time of the four switch
region is typically 150ns. Referring to Figures 1 and 2, the
various regions of operation will now be described.
VIN
VOUT
7
6
PMOS D
PMOS A
SW1
SW2
3
4
NMOS B
VOUT
NMOS C
3440 F01
Figure 1. Simplified Diagram of Output Switches
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LTC3440
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OPERATIO
75%
DMAX
BOOST
V4 (≈2.05V)
A ON, B OFF
BOOST REGION
PWM CD SWITCHES
DMIN
BOOST
DMAX
BUCK
V3 (≈1.65V)
FOUR SWITCH PWM
BUCK/BOOST REGION
The input voltage, VIN, where the four switch region begins
is given by:
VIN =
VOUT
V
1 – (150ns • f)
V2 (≈1.55V)
The point at which the four switch region ends is given by:
D ON, C OFF
PWM AB SWITCHES BUCK REGION
V1 (≈0.9V)
0%
DUTY
CYCLE
3440 F02
INTERNAL
CONTROL
VOLTAGE, VCI
Figure 2. Switch Control vs Internal Control Voltage, VCI
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during this
mode. When the internal control voltage, VCI, is above
voltage V1, output A begins to switch. During the off time
of switch A, synchronous switch B turns on for the
remainder of the time. Switches A and B will alternate
similar to a typical synchronous buck regulator. As the
control voltage increases, the duty cycle of switch A
increases until the maximum duty cycle of the converter in
Buck mode reaches DMAX_BUCK, given by:
DMAX_BUCK = 100 – D4SW %
where D4SW = duty cycle % of the four switch range.
D4SW = (150ns • f) • 100 %
where f = operating frequency, Hz.
Beyond this point the “four switch,” or Buck/Boost region
is reached.
Buck/Boost or Four Switch (VIN ~ VOUT)
When the internal control voltage, VCI, is above voltage V2,
switch pair AD remain on for duty cycle DMAX_BUCK, and
the switch pair AC begins to phase in. As switch pair AC
phases in, switch pair BD phases out accordingly. When
the VCI voltage reaches the edge of the Buck/Boost range,
at voltage V3, the AC switch pair completely phase out the
BD pair, and the boost phase begins at duty cycle D4SW.
VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V
Boost Region (VIN < VOUT)
Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is above
voltage V3, switch pair CD will alternately switch to
provide a boosted output voltage. This operation is typical
to a synchronous boost regulator. The maximum duty
cycle of the converter is limited to 75% typical and is
reached when VCI is above V4.
Burst Mode Operation
Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
25μA. In this mode the output ripple has a variable
frequency component that depends upon load current.
During the period where the device is delivering energy to
the output, the peak current will be equal to 400mA typical
and the inductor current will terminate at zero current for
each cycle. In this mode the maximum average output
current is given by:
IOUT(MAX)BURST ≈
0.1 • VIN
A
VOUT + VIN
Burst Mode operation is user controlled, by driving the
MODE/SYNC pin high to enable and low to disable.
The peak efficiency during Burst Mode operation is less
than the peak efficiency during fixed frequency because
the part enters full-time 4-switch mode (when servicing
the output) with discontinuous inductor current as illustrated in Figures 3 and 4. During Burst Mode operation, the
control loop is nonlinear and cannot utilize the control
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LTC3440
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OPERATIO
voltage from the error amp to determine the control mode,
therefore full-time 4-switch mode is required to maintain
the Buck/Boost function. The efficiency below 1mA
becomes dominated primarily by the quiescent current
and not the peak efficiency. The equation is given by:
Efficiency Burst ≈
Burst Mode Operation to Fixed Frequency Transient
Response
When transitioning from Burst Mode operation to fixed
frequency, the system exhibits a transient since the modes
of operation have changed. For most systems this transient is acceptable, but the application may have stringent
input current and/or output voltage requirements that
dictate a broad-band voltage loop to minimize the transient. Lowering the DC gain of the loop will facilitate the
task (10M FB to VC) at the expense of DC load regulation.
Type 3 compensation is also recommended to broad band
the loop and roll off past the two pole response of the LC
of the converter (see Closing the Feedback Loop).
( ηbm) • ILOAD
25μA + ILOAD
where (ηbm) is typically 79% during Burst Mode operation for an ESR of the inductor of 50mΩ. For 200mΩ of
inductor ESR, the peak efficiency (ηbm) drops to 75%.
VIN
VOUT
7
6
3
+
dI ≈ VIN
dT L
D
–
L
SW1
4
IINDUCTOR
A
SW2
B
C
400mA
0mA
3440 F03
T1
5
GND
Figure 3. Inductor Charge Cycle During Burst Mode Operation
VIN
VOUT
7
6
3
SW1
–
dI ≈ – VOUT
L
dT
+
L
B
D
4
SW2
C
IINDUCTOR
A
400mA
0mA
T2
3440 F04
5
GND
Figure 4. Inductor Discharge Cycle During Burst Mode Operation
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LTC3440
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OPERATIO
SOFT-START
The soft-start function is combined with shutdown. When
the SHDN/SS pin is brought above typically 1V, the IC is
enabled but the EA duty cycle is clamped from the VC pin.
A detailed diagram of this function is shown in Figure 5.
The components RSS and CSS provide a slow ramping
voltage on the SHDN/SS pin to provide a soft-start
function.
ERROR AMP
VIN
15μA
+
VOUT
1.22V
R1
FB
–
9
TO PWM
COMPARATORS
R2
CP1
VC
SOFT-START
CLAMP
10
VCI
SHDN/SS
RSS
ENABLE SIGNAL
8
3440 F05
CSS
+
CHIP
ENABLE
–
1V
Figure 5. Soft-Start Circuitry
U
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APPLICATIO S I FOR ATIO
COMPONENT SELECTION
L1
Inductor Selection
LTC3440
1
RT
2
MODE/SYNC
3
SW1
4
D2
SW2
D1
5
GND
VC 10
FB
9
SHDN/SS
8
VIN
7
VOUT
6
R1
R2
VIN
C1
L>
MULTIPLE
VIAS
C2
The high frequency operation of the LTC3440 allows the
use of small surface mount inductors. The inductor current ripple is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
VOUT
L>
GND
3440 F06
Figure 6. Recommended Component Placement. Traces Carrying
High Current are Direct. Trace Area at FB and VC Pins are Kept
Low. Lead Length to Battery Should be Kept Short
(
)
VIN(MIN) • VOUT – VIN(MIN)
f • IOUT(MAX) • Ripple • VOUT
(
VOUT • VIN(MAX) – VOUT
μH,
)
f • IOUT(MAX) • Ripple • VIN(MAX)
μH
where f = operating frequency, MHz
3440fb
11
LTC3440
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APPLICATIO S I FOR ATIO
Ripple = allowable inductor current ripple
(e.g., 0.2 = 20%)
VIN(MIN) = minimum input voltage, V
VIN(MAX) = maximum input voltage, V
VOUT = output voltage, V
IOUT(MAX) = maximum output load current
The output capacitance is usually many times larger in
order to handle the transient response of the converter.
For a rule of thumb, the ratio of the operating frequency to
the unity-gain bandwidth of the converter is the amount
the output capacitance will have to increase from the
above calculations in order to maintain the desired transient response.
For high efficiency, choose an inductor with a high frequency core material, such as ferrite, to reduce core loses.
The inductor should have low ESR (equivalent series
resistance) to reduce the I2R losses, and must be able to
handle the peak inductor current without saturating. Molded
chokes or chip inductors usually do not have enough core
to support the peak inductor currents in the 1A to 2A
region. To minimize radiated noise, use a toroid, pot core
or shielded bobbin inductor. See Table 1 for suggested
components and Table 2 for a list of component suppliers.
The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden ceramic capacitors, AVX TPS series tantalum capacitors or
Sanyo POSCAP are recommended.
Table 1. Inductor Vendor Information
SUPPLIER
PHONE
FAX
WEB SITE
Coilcraft
(847) 639-6400
(847) 639-1469
www.coilcraft.com
Coiltronics
(561) 241-7876
(561) 241-9339
www.coiltronics.com
Murata
USA:
(814) 237-1431
(800) 831-9172
USA:
(814) 238-0490
www.murata.com
Sumida
Output Capacitor Selection
The bulk value of the capacitor is set to reduce the ripple
due to charge into the capacitor each cycle. The steady
state ripple due to charge is given by:
%Ripple _ Buck =
(
)
%
)
%
IOUT(MAX) • VOUT – VIN(MIN) • 100
2
COUT • VOUT • f
(
Since the VIN pin is the supply voltage for the IC it is
recommended to place at least a 4.7μF, low ESR bypass
capacitor.
Table 2. Capacitor Vendor Information
USA:
www.japanlink.com/
(847) 956-0666 (847) 956-0702 sumida
Japan:
81(3) 3607-5111 81(3) 3607-5144
%Ripple _ Boost =
Input Capacitor Selection
IOUT(MAX) • VIN(MAX) – VOUT • 100
COUT • VIN(MAX) • VOUT • f
SUPPLIER
PHONE
FAX
WEB SITE
AVX
(803) 448-9411
(803) 448-1943
www.avxcorp.com
Sanyo
(619) 661-6322
(619) 661-1055
www.sanyovideo.com
Taiyo Yuden (408) 573-4150
(408) 573-4159
www.t-yuden.com
Optional Schottky Diodes
To achieve a 1%-2% efficiency improvement above 50mW,
Schottky diodes can be added across synchronous switches
B (SW1 to GND) and D (SW2 to VOUT). The Schottky
diodes will provide a lower voltage drop during the breakbefore-make time (typically 15ns) of the NMOS to PMOS
transition. General purpose diodes such as a 1N914 are
not recommended due to the slow recovery times and will
compromise efficiency. If desired a large Schottky diode,
such as an MBRM120T3, can be used from SW2 to VOUT.
A low capacitance Schottky diode is recommended
from GND to SW1 such as a Phillips PMEG2010EA or
equivalent.
where COUT = output filter capacitor, F
3440fb
12
LTC3440
U
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APPLICATIO S I FOR ATIO
Output Voltage > 4.3V
Closing the Feedback Loop
A Schottky diode from SW to VOUT is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
The LTC3440 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(Buck, Boost, Buck-Boost), but is usually no greater than
15. The output filter exhibits a double pole response is
given by:
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a 2Ω/
1nF series snubber is required between the SW1 pin and
GND. A Schottky diode such as the Phillips PMEG2010EA
or equivalent from SW1 to VIN should also be added as
close to the pins as possible. For the higher input voltages
VIN bypassing becomes more critical, therefore, a ceramic
bypass capacitor as close to the VIN and GND pins as
possible is also required.
fFILTER_ POLE =
1
Hz (in Buck mode)
2 • π • L • C OUT
fFILTER_ POLE =
VIN
Hz (in Boost mode)
2π • L • VOUT
where COUT is the output filter capacitor.
The output filter zero is given by:
fFILTER _ ZERO =
Operating Frequency Selection
There are several considerations in selecting the operating
frequency of the converter. The first is, what are the
sensitive frequency bands that cannot tolerate any spectral noise? For example, in products incorporating RF
communications, the 455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz and in
that case a 2MHz converter frequency may be employed.
Other considerations are the physical size of the converter
and efficiency. As the operating frequency goes up, the
inductor and filter capacitors go down in value and size.
The trade off is in efficiency since the switching losses due
to gate charge are going up proportional with frequency.
Additional quiescent current due to the output switches
GATE charge is given by:
Buck: 500e–12 • VIN • F
Boost: 250e–12 • (VIN + VOUT) • F
Buck/Boost: F • (750e–12 • VIN + 250e–12 • VOUT)
where F = switching frequency
1
2 • π • RESR • COUT
Hz
where RESR is the capacitor equivalent series resistance.
A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:
2
fRHPZ
VIN
=
Hz
2 • π • IOUT • L • VOUT
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated to stabilize the loop but at a cost of reduced bandwidth and slower transient response. To ensure proper
phase margin, the loop requires to be crossed over a
decade before the LC double pole.
The unity-gain frequency of the error amplifier with the
Type I compensation is given by:
fUG =
1
Hz
2 • π • R1 • CP1
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a
higher bandwidth, Type III compensation is required. Two
zeros are required to compensate for the double-pole
response.
3440fb
13
LTC3440
U
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APPLICATIO S I FOR ATIO
1
Hz
2 • π • 32 e3 • R1 • CP1
Which is extremely close to DC
1
fZERO1 =
Hz
2 • π • RZ • CP1
1
fZERO2 =
Hz
2 • π •R1 • CZ 1
fPOLE1 ≈
1
Hz
2 • π • RZ • CP 2
fPOLE2 =
VOUT
+
1.22V
ERROR
AMP
R1
FB
–
9
CP1
VC
10
R2
3440 F07
Figure 7. Error Amplifier with Type I Compensation
Restart Circuit
VOUT
+
ERROR
AMP
–
1.22V
R1
CZ1
FB
9
VC
CP1
RZ
traces and external components. Following the recommendations for output voltage >4.3V and input voltage
>4.5V will improve this condition. Additional short-circuit
protection can be accomplished with some external circuitry.
In an overload or short-circuit condition the LTC3440
voltage loop opens and the error amp control voltage on
the VC pin slams to the upper clamp level. This condition
forces boost mode operation in order to attempt to provide
more output voltage and the IC hits a peak switch current
limit of 2.7A. When switch current limit is reached switches
B and D turn on for the remainder of the cycle to reverse
the volts • seconds on the inductor. Although this prevents
current run away, this condition produces four switch
operation producing a current foldback characteristic and
the average input current drops. The IC is trimmed to
guarantee greater than 1A average input current to meet
the maximum load demand, but in a short-circuit or
overload condition the foldback characteristic will occur
producing higher peak switch currents. To minimize this
affect during this condition the following circuits can be
utilized.
For a sustained short-circuit the circuit in Figure 9 will
force a soft-start condition. The only design constraint is
that R2/C2 time constant must be longer than the softstart components R1/C1 to ensure start-up.
R2
10
VIN
CP2
3440 F08
R1
1M
SOFT-START
SO/SS
Short-Circuit Improvements
The LTC3440 is current limited to 2.7A peak to protect the
IC from damage. At input voltages above 4.5V a current
limit condition may produce undesirable voltages to the IC
due to the series inductance of the package, as well as the
R2
1M
D1
1N4148
Figure 8. Error Amplifier with Type III Compensation
C1
4.7nF
M2
NMOS
VN2222
C2
10nF
M1
NMOS
VN2222
VOUT
3440 F09
Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit
3440fb
14
LTC3440
U
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APPLICATIO S I FOR ATIO
Simple Average Input Current Control
INPUT_VOLTAGE
A simple average current limit circuit is shown in
Figure 10. Once the input current of the IC is above
approximately 1A, Q1 will start sourcing current into the
FB pin and lower the output voltage to maintain the
average input current. Since the voltage loop is utilized to
perform average current limit, the voltage control loop is
maintained and the VC voltage does not slam. The averaging function of current comes from the fact that voltage
loop compensation is also used with this circuit.
V1
C1
10μF
Q1
2N3906
R1
0.5Ω
VIN_PIN
FB_PIN
Figure 10. Simple Input Current Control
Utilizing the Voltage Loop
U
TYPICAL APPLICATIO S
3-Cell to 3.3V at 600mA Converter
L1
4.7μH
D2
C3
33pF
D1
3
VIN = 2.7V TO 4.5V
7
8
3 CELLS
2
C1 *
10μF
1
SW1
SW2
LTC3440
6
VIN
VOUT
FB
MODE/SYNC
VC
RT
GND
R1
340k
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
R5
10k
9
10
R3 15k
C2
22μF
C4 150pF
5
RT f
OSC = 1.5MHz
45.3k
R2
200k
C5 10pF
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: CENTRAL SEMICONDUCTOR CMDSH2-3
L1: SUMIDA CDR43-4R7M
3440 TA03a
3-Cell to 3.3V Efficiency
100
90
80
70
EFFICIENCY (%)
+
4
SHDN/SS
VOUT
3.3V
600mA
60
50
40
Burst Mode
OPERATION
VIN = 2.7V
VIN = 4.5V
VIN = 3.3V
30
20
10
fOSC = 1.5MHz
0
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
3440 TA03b
3440fb
15
LTC3440
U
TYPICAL APPLICATIO S
3-Cell to 5V Boost Converter with Output Disconnect
L1
10μH
3-Cell to 5V Boost Efficiency
D1**
VOUT
5V
300mA
4
SW1
SW2
LTC3440
6
7
VIN
VOUT
3
R4 1M
8
+
3
CELLS
2
C1
10μF
SD
C3 *
0.1μF
1
SHDN/SS
FB
MODE/SYNC
VC
RT
GND
90
80
R1
619k
9
C2**
22μF
15k
10
5
C4
1.5nF
R2
200k
RT
= 1MHz
f
60.4k OSC
VIN = 4.5V
Burst Mode
OPERATION
70
EFFICIENCY (%)
VIN = 2.7V TO 4.5V
100
VIN = 3.6V
VIN = 2.7V
60
50
40
30
20
10
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-100
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
** LOCATE COMPONENTS AS
CLOSE TO IC AS POSSIBLE
fOSC = 1MHz
0
1
0.1
10
100
OUTPUT CURRENT (mA)
3440 TA06a
1000
3440 TA06b
Low Profile (<1.1mm) Li-Ion to 3.3V at 200mA Converter
L1
4.7μH
VOUT
3.3V
200mA
4
SW1
SW2
LTC3440
6
7
VIN
VOUT
3
VIN = 2.5V TO 4.2V
8
Li-Ion
+
2
C1 *
4.7μF
1
SHDN/SS
FB
MODE/SYNC
RT
VC
GND
R1
340k
9
C2
4.7μF
10
5
R3
15k
C4
1.5nF
RT
30.1k
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
fOSC = 2MHz
R2
200k
C1: TAIYO YUDEN JMK212BJ475MG
C2: TAIYO YUDEN JMK212BJ475MG
L1: COILCRAFT LPO1704-472M
3440 TA04a
Efficiency
100
90
80
Burst Mode
OPERATION
EFFICIENCY (%)
70
60
50
40
VIN = 2.5V
VIN = 4.2V
VIN = 3.3V
30
20
10
0
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
3440 TA04b
3440fb
16
LTC3440
U
TYPICAL APPLICATIO S
Efficiency of the WCDMA
Power Amp Power Supply
WCDMA Power Amp Power Supply with Dynamic Voltage Control
VOUT = 3.3V – 1.7V • (VDAC – 1.22V)
Li-Ion
+
C1
*
10μF
2
1
FB
MODE/SYNC
RT
VC
GND
R1
340k
10
R3 15k
C4 150pF
IOUT = 100mA
94
92
IOUT = 250mA
90
88
IOUT = 600mA
86
84
5
C2**
10μF
R2
200k
C5 10pF
RT
30.1k fOSC = 2MHz
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
** LOCATE COMPONENTS AS
CLOSE TO IC AS POSSIBLE
R5
10k
R6
200k
9
VOUT = 3.4V
96
EFFICIENCY (%)
4
SHDN/SS
VOUT
0.4V TO 5V
C3
33pF
SW1
SW2
LTC3440
6
7
VIN
VOUT
8
98
D1**
3
VIN = 2.5V TO 4.2V
100
DAC
L1
3.3μH
82
80
2.5
C1, C2: TAIYO YUDEN JMK212BJ106MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-3R3
3
4
4.5
3.5
INPUT VOLTAGE (V)
5
3440 TA07a
3440 TA07b
GSM Modem Powered from USB or PCMCIA with 500mA Input Current Limit
L1
10μH
VOUT
3.6V
2A
(PULSED)
4
SW1
SW2
LTC3440
6
7
VIN
VOUT
3
VIN
2.5V TO 5.5V
USB/PCMCIA POWER
500mA MAX
RS
0.1Ω
8
2
C1 *
10μF
1
SHDN/SS
FB
MODE/SYNC
VC
RT
GND
R1
392k
R6
130k
9
–
10
5
C5
10nF
1/2 LT1490A
C6 TO C9
470μF
×4
R2
200k
R5
24k
+
–
+
1/2 LT1490A
RT
60.4k
R4
1k
1N914
2N3906
ICURRENTLIMIT = 1.22 • R4
R5 • RS
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH-4D28-100
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
3440 TA08
3440fb
17
LTC3440
U
PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD10) DFN 1103
5
0.25 ± 0.05
0.200 REF
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1
0.75 ±0.05
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3440fb
18
LTC3440
U
PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.497 ± 0.076
(.0196 ± .003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS) 0603
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3440fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3440
U
TYPICAL APPLICATIO
Li-Ion to 3.3V at 600mA Buck-Boost Converter
Efficiency
L1
10μH
220pF
8
Li-Ion
2
+
C1 *
10μF
1
SHDN/SS
FB
MODE/SYNC
VC
RT
GND
R1
340k
RT
60.4k
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
2.2k
C2
22μF
C5 300pF
10
R3
15k
90
80
9
5
100
EFFICIENCY (%)
4
SW1
SW2
LTC3440
6
7
VIN
VOUT
3
VIN = 2.8V TO 4.2V
VOUT
3.3V
600mA
Burst Mode
OPERATION
70
60
50
VIN = 4.2V
VIN = 3.3V
40
30
R2
200k
20
10
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH4D28-100
0
0.1
3440 TA01
1.0
10
100
OUTPUT CURRENT (mA)
1000
3440 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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90% Efficiency, VIN: 0.9V to 10V, VOUT(MIN) = 34V, IQ = 3mA,
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LT1618
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LTC1878
600mA(IOUT), 550kHz, Synchronous Step-Down
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LTC1879
1.2A(IOUT), 550kHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IQ = 15μA,
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LT1961
1.5A(ISW), 1.25MHz, High Efficiency Step-Up
DC/DC Converter
90% Efficiency, VIN: 3V to 25V, VOUT(MIN) = 35V, IQ = 0.9mA,
ISD = 6μA, MS8E Package
LTC3400/LTC3400B
600mA(ISW), 1.2MHz, Synchronous Step-Up
DC/DC Converter
92% Efficiency, VIN: 0.85V to 5V, VOUT(MIN) = 5V, IQ = 19μA/300μA,
ISD = <1μA, ThinSOT Package
LTC3401
1A(ISW), 3MHz, Synchronous Step-Up
DC/DC Converter
97% Efficiency, VIN: 0.5V to 5V, VOUT(MIN) = 6V, IQ = 38μA,
ISD = <1μA, MS10 Package
LTC3402
2A(ISW), 3MHz, Synchronous Step-Up
DC/DC Converter
97% Efficiency, VIN: 0.5V to 5V, VOUT(MIN) = 6V, IQ = 38μA,
ISD = <1μA, MS10 Package
LTC3405/LTC3405A
300mA(IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 20μA,
ISD = <1μA, ThinSOT Package
LTC3406/LTC3406B
600mA(IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA,
ISD = <1μA, ThinSOT Package
LTC3411
1.25A(IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,
ISD = <1μA, MS10 Package
LTC3412
2.5A(IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA,
ISD = <1μA, TSSOP16E Package
LTC3441/LTC3443
1.2A(IOUT), 1MHz/0.6MHz, Micropower Synchronous
Buck-Boost DC/DC Converter
95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V,
IQ = 25μA, ISD = <1μA, DFN Package
ThinSOT is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
LT 0507 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2001