EMIF04-EAR02M8 4-line IPAD™ EMI filter and ESD protection for headset Features Lead-free package ■ High attenuation: -30 dB at 900 MHz ■ Low cut-off frequencies: 60 MHz for speaker lines ■ High current capability: 50 mA per line ■ Very low PCB space consumption: 1.5 mm x 1.7 mm ■ Very thin package: 0.6 mm maximum ■ High efficiency in ESD suppression IEC6 1000-4-2 level 4 ■ Micro QFN 8 leads Figure 1. High reliability offered by monolithic integration Complies with following standards: ■ ■ MIC_P_Ext MIC_P_Int MIC_N_Ext MIC_N_Int EAR_Ext IEC 61000-4-2 level 4 input pins – 15 kV (air discharge) – 8 kV (contact discharge) Applications Pin configuration (bottom side) GND ■ EAR_Ext Figure 2. Mobile phones EAR_Int EAR_Int Equivalent circuit R MIC C L_MIC Description The EMIF04-EAR02M8 chip is a highly integrated device designed to suppress EMI/RFI noise for headset mobile phone. The new LC architecture on the speaker lines provides a high attenuation value maintaining a very low serial resistance. R MIC C L_MIC L The 8-lead micro-QFN package offers the possibility to integrate the whole function in a very small PCB space. EAR C L_EAR Additionally, this filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 30 kV. L EAR C L_EAR TM: IPAD is a trademark of STMicroelectronics March 2009 Rev 1 1/12 www.st.com 12 Characteristics 1 EMIF04-EAR02M8 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Unit VPP ESD IEC 61000-4-2 air discharge contact discharge 30 30 kV IEAR Maximum rms current per channel 50 mA Operating junction temperature -30 to 125 °C Storage temperature range -55 to +150 °C Tj Tstg Figure 3. Electrical symbols and parameters VBR Breakdown voltage VRM Stand-off voltage IRM Leakage current @ VRM VBR VRM I IRM V VRM VBR IRM Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Test conditions VBR IR = 1 mA IRM VRM = 3 V Min. RL Typ. Max. Unit 100 nA 7 V 1.5 LEAR Parasitic resistance of inductor LEAR 0.30 nH 0.6 Ω 54 68 82 Ω CL_EAR VR = 0 V DC, 1 MHz 84 105 126 pF CL_MIC VR = 0 V DC, 1 MHz 60 76 92 pF Fc_EAR Cut-off frequency earphone line: ZSOURCE = ZLOAD = 50 Ω 60 MHz Fc_MIC Cut-off frequency microphone line: ZSOURCE = ZLOAD = 50 Ω 70 MHz RMIC 2/12 Value EMIF04-EAR02M8 Figure 4. 0 Characteristics S21 attenuation measurement dB Figure 5. 0 -5 Analog cross talk measurements dB -10 -10 -20 -15 -20 -30 -25 -30 -35 -40 MIC_N MIC_P EAR_R EAR_L -40 -50 MIC_N - MIC_P EAR_L - MIC_P -60 -45 F (Hz) -50 F (Hz) -70 100k Figure 6. 1M 10M 100M 1G ESD response to IEC 61000-4-2 (+15 kV air discharge) on one MIC input (Vin) and on one MIC output 100k Figure 7. 1M 10M 100M 1G ESD response to IEC 61000-4-2 (-15 kV air discharge) on one MIC input (Vin) and on one MIC output 5.00 V/div IN 5.00 V/div IN 5.00 V/div OUT 5.00 V/div OUT 100 ns/div Figure 8. 100 ns/div ESD response to IEC 61000-4-2 (+15 kV air discharge) on one EAR input (Vin) and on one EAR output Figure 9. ESD response to IEC 61000-4-2 (-15 kV air discharge) on one EAR input (Vin) and on one EAR output 5.00 V/div IN 5.00 V/div IN 5.00 V/div OUT 5.00 V/div 100 ns/div OUT 100 ns/div 3/12 Characteristics EMIF04-EAR02M8 Figure 10. Relative line capacitance variation versus applied voltage Figure 11. Total harmonic distortion with noise: MIC lines, R = 10 kΩ C/C0 0 THD + N (dB) 1.0 MIC lines -50 EAR lines 0.8 0.6 0 1 3 2 4 VR(V) 5 Figure 12. Total harmonic distortion with noise: MIC lines, R = 32 Ω 0 THD + N (dB) 1k 100 10 k Figure 13. Total harmonic distortion with noise: EAR lines, R = 32 Ω 0 -50 F (Hz) -100 THD + N (dB) -50 F (Hz) -100 F (Hz) 100 -100 1k 10 k 1k 100 Figure 14. Total harmonic distortion with noise: EAR lines, R = 8 Ω 0 THD + N (dB) -50 F (Hz) -100 100 4/12 1k 10 k 10 k EMIF04-EAR02M8 2 Application information Application information Figure 15. Example of application scheme using EMIF04-EAR02M8 VDD EMIF04-EAR02M8 MIC_P MIC_P MIC_P_Ext MIC_P_Int MIC_N_Ext EAR_R EAR_R EAR_Ext MIC_N_Int EAR_Int EAR_L EAR_L MIC_N GND MIC_N MIC_N MIC_P EAR_Int EAR_Ext EAR_R EAR_L Audio sub-system Cable 3 Headset connector Ordering information scheme Figure 16. Ordering information scheme EMIF yy - xxx zz Mx EMI Filter Number of lines Information xxx = application zz = version Package Mx = Micro QFN x leads 5/12 Package information 4 EMIF04-EAR02M8 Package information ● Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 3. Micro QFN dimensions Dimensions D Ref. N E 2 1 Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.50 0.55 0.60 0.020 0.022 0.024 A1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.18 0.25 0.006 0.007 0.001 D 1.65 1.70 1.75 0.067 D2 1.15 1.3 1.4 0.045 0.051 0.055 E 1.45 1.50 1.55 0.059 E2 0.05 0.20 0.30 0.002 0.008 0.012 A A1 D2 1 2 L E2 k e b N e Figure 17. Footprint 0.40 0.40 k 0.20 L 0.25 0.016 0.008 0.30 0.35 0.010 0.012 0.014 Figure 18. Marking Dot: Pin1 identification XX = Marking 0.20 0.60 0.32 0.26 2.10 1.32 6/12 XX EMIF04-EAR02M8 Package information Figure 19. Tape and reel specification Ø 1.55 ± 0.05 4.0 ± 0.1 1.75 ± 0.1 2.0 ± 0.05 3.5 ±- 0.1 8.0 ± 0.3 1.95 ± 0.1 0.25 ± 0.05 KA KA 1.75 ± 0.1 KA 4.0 ± 0.1 0.70 ± 0.05 All dimensions in mm Note: User direction of unreeling Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. 7/12 Recommendation on PCB assembly EMIF04-EAR02M8 5 Recommendation on PCB assembly 5.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 20. Stencil opening dimensions L T b) W General design rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%. c) Stencil opening for leads: Opening to footprint ratio is 90%. Figure 21. Recommended stencil window position 5 µm 5 µm 15 µm 570 µm 600 µm T=100 µm 190 µm 15 µm 200 µm 1320 µm 260 µm 160 µm 50 µm Footprint 1080 µm 50 µm 120 µm 8/12 120 µm Stencil window Footprint EMIF04-EAR02M8 5.2 5.3 5.4 Recommendation on PCB assembly Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed 4. Solder paste with fine particles: powder particle size is 20-45 µm. Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ±0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 9/12 Recommendation on PCB assembly 5.5 EMIF04-EAR02M8 Reflow profile Figure 22. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec Note: 10/12 6 7 Time (min) 90 sec max Minimize air convection currents in the reflow oven to avoid component movement. EMIF04-EAR02M8 6 Ordering information Ordering information Table 4. Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF04-EAR02M8 KA(1) Micro QFN 3.8 mg 3000 Tape and reel 1. The marking can be rotated by 90° to differentiate assembly location 7 Revision history Table 5. Document revision history Date Revision 24-Mar-2009 1 Changes Initial release 11/12 EMIF04-EAR02M8 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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