bq24230
bq24232
www.ti.com .......................................................................................................................................... SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008
USB-FRIENDLY LITHIUM-ION BATTERY CHARGER AND POWER-PATH MANAGEMENT IC
FEATURES
1
•
•
•
Proprietary Start-Up Sequence Limits Inrush
Current
Status Indication – Charging/Done, Power
Good
Small 3 mm × 3 mm 16-Lead QFN Package
APPLICATIONS
•
•
Bluetooth™ Devices
Low-Power Handheld Devices
TYPICAL APPLICATION CIRCUIT
1 kΩ
9
CHG
IN
7
Adaptor
PGOOD
1 kΩ
13
DC
SYSTEM
OUT 10
11
1mF
GND
4.7mF
EN2
5
BAT
2
3
TS
1
4.7mF
TD
ILIM
12
ISET
EN1
6
TEMP
16
CE
PACK+
TMR
15
bq24230
VSS
4
8
14
• Fully Compliant USB Charger
– Selectable 100-mA and 500-mA Maximum
Input Current
– 100-mA Maximum Current Limit Ensures
Compliance to USB-IF Standard
– Input-based Dynamic Power Management
(VIN-DPM) for Protection Against Poor USB
Sources
• 28-V Input Rating With Overvoltage Protection
• Integrated Dynamic Power-Path Management
(DPPM) Function Simultaneously and
Independently Powers the System and
Charges the Battery
• Supports up to 500-mA Charge Current With
Current Monitoring Output (ISET)
• Programmable Input Current Limit up to
500 mA for Wall Adapters
• Programmable Termination Current (bq24232)
• Programmable Precharge and Fast-Charge
Safety Timers
• Reverse Current, Short-Circuit, and Thermal
Protection
• NTC Thermistor Input
2
2.94 kΩ
4.32 kΩ
PACK-
DESCRIPTION
The bq2423x series of devices are highly integrated Li-ion linear chargers and system power-path management
devices targeted at space-limited portable applications. The devices operate from either a USB port or ac
adapter and support charge currents between 25 mA and 500 mA. The high-input-voltage range with input
overvoltage protection supports low-cost, unregulated adapters. The USB input current limit accuracy and
start-up sequence allow the bq2423x to meet USB-IF inrush current specification. Additionally, the input dynamic
power management (VIN-DPM) prevents the charger from crashing poorly designed or incorrectly configured USB
sources.
The bq2423x features dynamic power-path management (DPPM) that powers the system while simultaneously
and independently charging the battery. The DPPM circuit reduces the charge current when the input current
limit causes the system output to fall to the DPPM threshold, thus supplying the system load at all times while
monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on
the battery, allows for proper charge termination, and enables the system to run with a defective or absent
battery pack. Additionally, this enables instant system turn-on even with a totally discharged battery. The
power-path management architecture also permits the battery to supplement the system current requirements
when the adapter cannot deliver the peak system currents, enabling the use of a smaller adapter.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark of Bluetooth SIG, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
bq24230
bq24232
SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the
internal temperature threshold is exceeded.
The charger power stage and charge current sense functions are fully integrated. The charger function has
high-accuracy current and voltage regulation loops, charge status display, and charge termination. The input
current limit and charge current are programmable using external resistors.
ORDERING INFORMATION
PART
NUMBER (1) (2)
VOVP
VOUT(REG)
VDPM
OPTIONAL
FUNCTION
MARKING
bq24230RGTR
6.6 V
4.4 V
VO(REG) – 100 mV
TD
CGN
bq24230RGTT
6.6 V
4.4 V
VO(REG) – 100 mV
TD
CGN
bq24232RGTR
10.5 V
4.4 V
VO(REG) – 100 mV
ITERM
NXK
bq24232RGTT
10.5 V
4.4 V
VO(REG) – 100 mV
ITERM
NXK
(1)
(2)
The RGT package is available in the following options:
R - taped and reeled in quantities of 3000 devices per reel.
T - taped and reeled in quantities of 250 devices per reel.
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.
ABSOLUTE MAXIMUM RATINGS (1)
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
VI
II
IO
Input voltage
Input current
Output current (continuous)
Output sink current
VALUE
UNIT
IN (with respect to VSS)
–0.3 to 28
V
OUT (with respect to VSS)
–0.3 to 7
V
BAT (with respect to VSS)
–0.3 to 5
V
EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD,
ITERM (with respect to VSS)
–0.3 to 7
V
IN
600
mA
OUT
600
mA
BAT (Discharge mode)
600
mA
CHG, PGOOD
15
mA
TJ
Junction temperature
–40 to 150
°C
Tstg
Storage temperature
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
DISSIPATION RATINGS (1)
(1)
(2)
2
PACKAGE (2)
RθJA
RθJC
RGT (1)
39.47 °C/W
2.4 °C/W
POWER RATING
TA ≤ 25°C
TA = 85°C
2.3 W
225 mW
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2x3 via matrix.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24230 bq24232
bq24230
bq24232
www.ti.com .......................................................................................................................................... SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008
RECOMMENDED OPERATING CONDITIONS
MIN
IN voltage range
VI
IN operating voltage range
MAX
UNIT
4.35
26
V
'230
4.35
6.4
V
'232
4.35
10.2
IIN
Input current, IN pin
500
mA
IOUT
Current, OUT pin
500
mA
IBAT
Current, BAT pin (discharging)
500
mA
ICHG
Current, BAT pin (charging)
500
mA
TJ
Junction temperature
–40
125
°C
RILIM
Maximum input current programming resistor
3.1
7.8
kΩ
RISET
Fast-charge current programming resistor
1.8
36
kΩ
RTMR
Timer programming resistor
18
72
kΩ
RITERM
Termination programming resistor
0
15
kΩ
MAX
UNIT
'232
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
3.3
INPUT
UVLO
Undervoltage lockout
VIN: 0 V → 4 V
3.2
Vhys(UVLO)
Hysteresis on UVLO
VIN: 4 V → 0 V
200
VIN(DT)
Input power detection threshold
Input power detected when VIN > VBAT + VIN(DT)
VBAT = 3.6 V, VIN: 3.5 V → 4 V
55
Vhys(INDT)
Hysteresis on VIN(DT)
VBAT = 3.6 V, VIN: 4 V → 3.5 V
20
tDGL(PGOOD)
Deglitch time, input power
detected status
Time measured from VIN: 0 V → 5 V 1-µs
rise time to PGOOD = LO
VOVP
Input overvoltage protection
threshold
('230) VIN: 5 V → 7 V
6.4
6.6
6.8
('232) VIN: 5 V → 11 V
10.2
10.5
10.8
Vhys(OVP)
Hysteresis on OVP
('230) VIN: 7 V → 5V
110
('232) VIN: 11 V → 5 V
175
tDGL(OVP)
tREC(OVP)
V
mV
130
mV
mV
2
ms
V
mV
50
µs
2
ms
VIN > UVLO and VIN > VBAT+VIN(DT)
1.3
mA
VIN > UVLO and VIN > VBAT+VIN(DT)
520
mV
Input overvoltage blanking time
Input overvoltage recovery time
80
3.4
300
Time measured from VIN: 11 V → 5 V 1 µs
fall time to PGOOD = LO
ILIM, TEST ISET SHORT CIRCUIT
ISC
Current source
VSC
QUIESCENT CURRENT
CE = LO or HI, input power not detected, no
load on OUT pin
6.5
µA
EN1= HI, EN2=HI, VIN = 6 V, TJ=85°C
50
µA
EN1= HI, EN2=HI, VIN = 10 V, TJ=85°C
200
Active supply current, IN pin
CE = LO, VIN = 6 V, no load on OUT pin,
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)
1.5
mA
VDO(IN-OUT)
VIN – VOUT
VIN = 4.3 V, IIN = 500 mA, VBAT = 4.2 V
237.5
mV
VDO(BAT-OUT)
VBAT – VOUT
IOUT = 500 mA, VIN = 0 V, VBAT > 3 V
62.5
mV
VO(REG)
OUT pin voltage regulation
VIN > VOUT + VDO (IN-OUT)
4.3
4.4
4.5
V
EN1 = LO, EN2 = LO
90
95
100
EN1 = HI, EN2 = LO
450
475
500
IBAT(PDWN)
Sleep current into BAT pin
IIN(STDBY)
Standby current into IN pin
ICC
POWER PATH
IINmax
Maximum input current
KILIM
Maximum input current factor
IINmax
Programmable input current limit
range
150.0
EN2 = HI, EN1 = LO
KILIM/RILIM
1320
EN2 = HI, EN1 = LO, RILIM = 3.1 kΩ to 7.8 kΩ
200
1470
A
1620
AΩ
500
mA
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mA
3
bq24230
bq24232
SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4.35
4.50
4.63
V
VO(REG) –
180 mV
VO(REG) –
100 mV
VO(REG) –
30 mV
V
VIN-DPM
Input voltage threshold when input
current is reduced
VDPPM
Output voltage threshold when
charging current is reduced
VBSUP1
Enter battery supplement mode
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω →2
Ω
VOUT ≤ VBAT
–40 mV
V
VBSUP2
Exit battery supplement mode
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω →10
Ω
VOUT ≥
VBAT–20 mV
V
VO(SC1)
Output short-circuit detection
threshold, power-on
VIN > UVLO and VIN > VBAT+VIN(DT)
Output short-circuit detection
threshold, supplement mode VBAT
– VOUT > VO(SC2) indicates short
circuit
VIN > UVLO and VIN > VBAT+VIN(DT)
VO(SC2)
tDGL(SC2)
Deglitch time, supplement mode
short circuit
tREC(SC2)
Recovery time, supplement mode
short circuit
EN2 = LO, EN1 = X
0.8
0.9
1
200
250
300
V
mV
250
µs
60
ms
BATTERY CHARGER
IBAT(SC)
Source current for BAT pin
short-circuit detection
VBAT = 1.5 V
VBAT(SC)
BAT pin short-circuit detection
threshold
VBAT rising
VBAT(REG)
Battery charge voltage
VLOWV
Precharge to fast-charge transition
threshold
tDGL1(LOWV)
Deglitch time on precharge to
fast-charge transition
25
ms
tDGL2(LOWV)
Deglitch time on fast-charge to
precharge transition
25
ms
VIN > UVLO and VIN > VBAT + VIN(DT)
Battery fast-charge current range
VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO,
EN1 = LO, EN2 = HI
Battery fast-charge current
CE = LO, EN1= LO, EN2 = HI,
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load
on OUT pin, thermal loop and DPM loop not
active
KISET
Fast-charge current factor
25 mA ≥ ICHG≥ 500 mA
IPRECHG
Precharge current
2.5 mA ≥ IPRECHG≥ 30 mA
ICHG
ITERM
Termination comparator threshold
for termination detection
ITERM
Termination current threshold
factor (bq24232)
IBIAS(ITERM)
Current for external
termination-setting resistor
KITERM
K factor for termination detection
threshold (externally set)
(bq24232)
IBIAS(ITERM)
Current for external
termination_setting resistor
(bq24232)
tDGL(TERM)
Deglitch time, termination detected
VRCH
4
Recharge detection threshold
4
7.5
11
mA
1.6
1.8
2
V
4.16
4.20
4.24
V
2.9
3
3.1
ms
25
500
KISET/RISET
mA
A
797
870
975
AΩ
AΩ
70
88
106
CE = LO, (EN1,EN2) ≠ (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.09*ICHG
0.1*ICHG
0.11*ICHG
CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.027*ICHG
0.033*ICHG
0.040*ICHG
A
ITERM = 0% to 50% of ICHG
KITERM*RITERM/RISET
72
75
78
CE = LO, (EN1,EN2) ≠ (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.024
0.030
0.036
CE = LO, (EN1,EN2) = (LO,LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop
and thermal loop not active
0.009
0.010
0.011
72
75
78
VO(REG)
–140 mV
VO(REG) –100
mV
A
µA
A
µA
25
VIN > UVLO and VIN > VBAT+VIN(DT)
Submit Documentation Feedback
ms
VO(REG)
–60 mV
V
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): bq24230 bq24232
bq24230
bq24232
www.ti.com .......................................................................................................................................... SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tDGL(RCH)
Deglitch time, recharge threshold
detected
tDGL(NO-IN)
Delay time, input power loss to
charger turnoff
VBAT = 3.6 V. Time measured from
VIN: 5 V → 3 V 1-µs fall time
IBAT(DET)
Sink current for battery detection
VBAT=2.5 V
tDET
Battery detection timer
BAT high or low
MIN
5
TYP
MAX
UNIT
62.5
ms
20
ms
7.5
10
250
mA
ms
BATTERY CHARGING TIMERS
tPRECHG
Precharge safety timer value
TMR = floating
1440
1800
2160
s
tMAXCHG
Charge safety timer value
TMR = floating
14400
18000
21600
s
tPRECHG
Precharge safety timer value
18 kΩ < RTMR < 72 kΩ
RTMR × KTMR
tMAXCHG
Charge safety timer value
18 kΩ < RTMR < 72 kΩ
10×RTMR ×KTMR
KTMR
Timer factor
s
s
30
40
50
s/kΩ
72
75
78
µA
270
300
330
mV
BATTERY-PACK NTC MONITOR (1)
INTC
NTC bias current
VIN > UVLO and VIN > VBAT+VIN(DT)
VHOT
High-temperature trip point
Battery charging, VTS Falling
VHYS(HOT)
Hysteresis on high trip point
Battery charging, VTS Rising from VHOT
VCOLD
Low-temperature trip point
Battery charging, VTS Rising
VHYS(COLD)
Hysteresis on low trip point
Battery charging, VTS Falling from VCOLD
tDGL(TS)
Deglitch time, pack temperature
fault detection
Battery charging, VTS Falling
VDIS(TS)
TS function disable threshold
TS unconnected
30
2000
2100
mV
2200
mV
300
mV
50
ms
VIN-200 mV
V
125
°C
155
°C
20
°C
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
TJ rising
LOGIC LEVELS ON EN1, EN2, CE, TD
VIL
Logic LOW input voltage
0
0.4
VIH
Logic HIGH input voltage
1.4
6.0
V
V
IIL
Input sink current
VIL = 0 V
1
µA
IIH
Input source current
VIH = 1.4 V
10
µA
ISINK = 5 mA
0.4
V
LOGIC LEVELS ON PGOOD, CHG
VOL
(1)
Output LOW voltage
These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.
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5
bq24230
bq24232
SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com
4
9
6
7
EN2
EN1
PGOOD
5
8
1
BAT
2
BAT
3
CE
4
ISET
ITERM
TMR
IN
13
bq24232
5
6
7
12
ILIM
11
OUT
10
OUT
9
CHG
8
VSS
11
10
TS
14
PGOOD
bq24230
3
ILIM
OUT
OUT
CHG
16 15
EN1
2
VSS
TS
BAT
BAT
CE
16 15 14 13
1
12
EN2
ISET
TD
TMR
IN
RGT PACKAGE
(Top View)
TERMINAL FUNCTIONS
TERMINAL
NAME
NUMBER
I/O
DESCRIPTION
'230
'232
1
1
I
BAT
2,3
2, 3
I/O
CE
4
4
I
EN2
5
5
I
EN1
6
6
I
PGOOD
7
7
O
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD
is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail
using a 1-kΩ – 100-kΩ resistor, or use with an LED for visual indication.
VSS
8
8
–
Ground. Connect to the thermal pad and to the ground rail of the circuit.
CHG
9
9
O
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance
when charging is complete and when charger is disabled.
OUT
10,11
10, 11
O
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the
regulation voltage. When the input is out of the operation range, OUT is connected to VBAT. Connect OUT to the system
load. Bypass OUT to VSS with a 4.7-µF to 47-µF ceramic capacitor.
ILIM
12
12
I
Adjustable Current Limit Programming Input. Connect a 3.1-kΩ to 7.8-kΩ resistor from ILIM to VSS to program the
maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current.
IN
13
13
I
Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input
operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is
suspended. Connect bypass capacitor 1 µF to 10 µF to VSS.
TMR
14
14
I
Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to disable all
safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave
TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge default timer values.
TD
15
-
I
Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger
termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in this data
sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with ~285 kΩ.
Do not leave TD unconnected to ensure proper operation.
-
15
I
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination
current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold.
16
16
I/O
Fast-Charge Current Programming Input. Connect a 3-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-charge
current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual
charging current and can be used to monitor charge current. See the CHARGE CURRENT TRANSLATOR section for
more details.
–
An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The thermal
pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as
the primary ground input for the device. The VSS pin must be connected to ground at all times.
TS
ITERM
ISET
Thermal
Pad
6
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kΩ
NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to VSS to
maintain a valid voltage level on TS.
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery.
Bypass BAT to VSS with a 4.7-µF to 47-µF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby mode. In
standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable
the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure proper
operation.
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled down with ~285
kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
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bq24230
bq24232
www.ti.com .......................................................................................................................................... SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008
Table 1. EN1/EN2 Settings
EN2
EN1
Maximum input current into IN pin
0
0
100 mA. USB100 mode
0
1
500 mA. USB500 mode
1
0
Set by an external resistor from ILIM to VSS
1
1
Standby (USB suspend mode)
SIMPLIFIED BLOCK DIAGRAM
250 mV
VO (SC1)
VBAT
OUT- SC1
tDGL(SC2)
OUT- SC 2
Q1
IN
OUT
EN2
Short Detect
225 mV
Precharge
2. 25
. V
Fastcharge
VIN-LOW
USB100
USB500
ILIM
V REF-ILIM
USB-susp
ISET
TJ
TJ (REG)
Short Detect
VDPPM
VOUT
VO (REG)
Q2
VBAT(REG)
EN2
EN1
BAT
V OUT
CHARGEPUMP
I BIAS-ITERM
40 mV
Supplement
V LOWV
225 mV
ITERM
bq24232
VRCH
VBAT(SC)
tDGL(RCH)
tDGL2(LOWV)
tDGL(TERM)
VIN
tDGL1(LOWV)
ITERM- floating
~3 V
BAT-SC
VBAT+VIN-DT
t DGL (NO-IN)
t DGL(PGOOD)
VUVLO
I NTC
V HOT
Charge Control
TS
t DGL (TS )
V COLD
V OVP
t BLK (OVP)
VDIS(TS)
EN1
EN2
USB Suspend
TD
bq24230
CE
Halt timers
CHG
VIPRECHG
V CHG
I
VISET
Dynamically
Controlled
Oscillator
Reset timers
PGOOD
Fast- Charge
Timer
Timer fault
TMR
Pre -Charge
Timer
~100 mV
Timers disabled
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TYPICAL CHARACTERISTICS
Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted.
ADAPTER PLUG-IN WITH BATTERY
CONNECTED
RLOAD = 25Ω
VIN
5 V/div
VOUT
4.4 V
BATTERY DETECTION -- INSERTION
VCHG
5 V/div
BATTERY DETECTION -- REMOVAL
VCHG
2 V/div
1 V/div
VBAT
4V
2 V/div
VBAT
VBAT
Battery Inserted
VPGOOD
200 mA/div
Battery Removed
Battery Detection Mode
Battery Detection Mode
Battery Supplying Load
Mandatory Precharge
200 mA/div
IBAT
Charging Initiated
100 mA/div
IBAT
Fastcharge
IBAT
2 V/div
4 ms/div
400 ms/div
400 ms/div
Figure 1.
Figure 2.
Figure 3.
ENTERING AND EXITING DPPM
MODE
RLOAD = 25Ω to 9Ω
ENTERING AND EXITING BATTERY
SUPPLEMENT MODE
RLOAD = 25Ω to 4.5Ω
CHARGER ON/OFF USING CE
ILOAD
500 mA/div
500 mA/div
ILOAD
IBAT
5 V/div
500 mA/div
VBAT
3.6V
VOUT
4.4 V
VOUT
4.4 V
5 V/div
VCHG
Supplement Mode
200 mA/div
IBAT
VCE
500 mV/div
200 mV/div
200 mV/div
IBAT
VBAT
3.9 V
Mandatory Precharge
2 ms/div
400 ms/div
Figure 4.
OVP FAULT
VIN = 6V to 15V
RLOAD = 25Ω
100 mA/div
10 ms/div
Figure 5.
Figure 6.
THERMAL REGULATION
DROPOUT VOLTAGE
vs
TEMPERATURE
250
0.35
IL = 500 mA
Dropout Voltage - VIN-VOUT
200 mA/div
IBAT - mA
200
IBAT
150
100
VOUT
4.4 V
VBAT
4.2 V
200 mV/div
50
0.25
0.20
0.15
0.10
0.05
40 ms/div
Figure 7.
8
0.30
10 V/div
VIN
0
120
0
125
130
135
140
TA - Free-Air Temperature - °C
145
Figure 8.
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0
25
100
50
75
TJ - Junction Temperature - °C
125
Figure 9.
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TYPICAL CHARACTERISTICS (continued)
Typical Application Circuit, EN1=0, EN2=1, TA=25°C, unless otherwise noted.
DROPOUT VOLTAGE
vs
TEMPERATURE
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
60
4.45
4.210
VIN = 5 V,
IL = 500 mA
IL = 500 mA
40
VBAT = 3 V
30
VBAT = 3.9 V
20
VBAT - Regulation Voltage - V
4.43
VO - Output Voltage - V
4.40
4.38
4.35
4.33
10
4.30
0
0
50
75
100
25
TJ - Junction Temperature - °C
125
0
75
100
125
4.200
4.195
4.190
4.185
4.180
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 10.
Figure 11.
Figure 12.
OVERVOLTAGE PROTECTION
THRESHOLD
vs
TEMPERATURE
bq24230
OVERVOLTAGE PROTECTION
THRESHOLD
vs
TEMPERATURE
bq24232
INPUT CURRENT LIMIT THRESHOLD
vs
INPUT VOLTAGE
6.70
800
10.70
10.5 V
VOVP - Output Voltage Threshold - V
6.6 V
6.65
VI Rising
6.60
6.55
VI Falling
6.50
6.45
0
50
25
4.205
10.65
700
10.60
VI Rising
ILIM - Input Current - mA
Dropout Voltage - VBAT-VOUT
50
VOVP - Output Voltage Threshold - V
BATTERY REGULATION VOLTAGE
vs
TEMPERATURE
10.55
10.50
10.45
VI Falling
10.40
10.35
10.30
125
USB500
400
300
200
USB100
0
0
25
75
50
100
TJ - Junction Temperature - °C
Figure 13.
5
125
6
7
8
9
VI - Input Voltage - V
Figure 14.
FAST-CHARGE CURRENT
vs
BATTERY VOLTAGE
10
Figure 15.
PRECHARGE CURRENT
vs
BATTERY VOLTAGE
31.5
310
RISET = 3.3 kW
RISET = 3.3 kW
305
31
IBAT - Precharge Current - A
IBAT - Fast Charge Current - A
500
100
10.25
10.20
25
50
75
100
TJ - Junction Temperature - °C
600
300
295
290
285
280
30.5
30
29.5
29
28.5
3
3.2
3.4
3.6
3.8
4
VBAT - Battery Voltage - V
4.2
2
2.2
2.4
2.6
2.8
VBAT - Battery Voltage - V
Figure 16.
3
Figure 17.
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APPLICATION CIRCUITS
VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, Battery Temperature Charge Range 0°C to 50°C,
6.25-hour Fast Charge Safety Timer.
R4
1.5 kΩ
R5
1.5 kΩ
DC+
IN
C HG
Adaptor
PGOOD
SYSTEM
OUT
C1
1μF
GND
C2
4.7μF
VSS
bq24230
HOST
EN2
EN1
TS
TD
CE
BAT
TEMP
PACK+
C3
4.7μF
PACK -
R1
56.2 kΩ
R2
2.94 kΩ
R3
4.35 kΩ
Figure 18. Using the bq24230 in a Host Controlled Charger Application
10
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VIN = VUVLO to VOVP , IFASTCHG = 200 mA, IIN(MAX) = 500 mA, 25-mA Termination Current, ISET mode (EN1=0,
EN2=1), Battery Temperature Charge Range 0°C to 50°C, 6.25-hour Fast Charge Safety Timer.
R5
1.5 kΩ
R6
1.5 kΩ
Adaptor
DC+
IN
CH G
PGOOD
SYSTEM
OUT
C1
1 μF
GND
C2
4.7μF
VSS
bq 24232
EN 2
EN 1
TS
CE
BAT
PACK -
R1
3.57 kΩ
IS E T
IT E R M
TEMP
TMR
C3
4.7 μF
IL IM
PACK +
R2
2.94 kΩ
R4
56 .2 kΩ
R3
4 .32 kΩ
Figure 19. Using the bq24232 in a Stand-Alone Charger Application
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EXPLANATION OF DEGLITCH TIMES AND COMPARATOR HYSTERESIS
Figures not to scale
VOVP
VOVP - Vhys(OVP)
VIN
Typical Input Voltage
Operating Range
t < tDGL(OVP)
VBAT + VIN(DT)
VBAT + VIN(DT) - Vhys(INDT)
UVLO
UVLO - Vhys(UVLO)
PGOOD
tDGL(PGOOD)
tDGL(OVP)
tDGL(NO-IN)
tDGL(PGOOD)
Figure 20. Power Up, Power Down
tDGL1(LOWV)
VBAT
VLOWV
t < tDGL1(LOWV)
tDGL1(LOWV)
tDGL2(LOWV)
ICHG
Fast-Charge
Fast-Charge
IPRE-CHG
t < tDGL2(LOWV)
Pre-Charge
Pre-Charge
Figure 21. Pre- to Fast-Charge, Fast- to Precharge Transition – tDGL1(LOWV), tDGL2(LOWV)
VBAT
VRCH
Re-Charge
t < tDGL(RCH)
tDGL(RCH)
Figure 22. Recharge – tDGL(RCH)
12
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Turn
Q2 OFF
Force
Q2 ON
tREC(SC2)
Turn
Q2 OFF
tREC(SC2)
Force
Q2 ON
VBAT - VOUT
Recover
VO(SC2)
t < tDGL(SC2)
tDGL(SC2)
tDGL(SC2)
t < tDGL(SC2)
Figure 23. OUT Short-Circuit – Supplement Mode
VCOLD
VCOLD - Vhys(COLD)
t < tDGL(TS)
Suspend
Charging
tDGL(TS)
VTS
Resume
Charging
VHOT - Vhys(HOT)
VHOT
Figure 24. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing
DETAILED FUNCTIONAL DESCRIPTION
The bq2423x devices are integrated Li-ion linear chargers and system power-path management devices targeted
at space-limited portable applications. The device powers the system while simultaneously and independently
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for
proper charge termination, and enables the system to run with a defective or absent battery pack. It also allows
instant system turnon even with a totally discharged battery. The input power source for charging the battery and
running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management
(DPPM), which shares the source current between the system and battery charging and automatically reduces
the charging current if the system load increases. When charging from a USB port, the input dynamic power
management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold,
preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the
system current requirements when the adapter cannot deliver the peak system currents.
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UNDERVOLTAGE LOCKOUT
The bq2423x family remains in power-down mode when the input voltage at the IN pin is below the undervoltage
lockout (UVLO) threshold.
During the power-down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. During power-down mode, the VOUT(SC2) circuitry is active and
monitors for overload conditions on OUT.
POWER ON
When VIN exceeds the UVLO threshold, the bq2423x powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1, and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When VIN rises above VBAT + VIN(DT), PGOOD is low to indicate that the valid power status and the CE, EN1, and
EN2 inputs are read. The device enters standby mode whenever (EN1, EN2) = (1, 1) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON. (If SYSOFF is high, FET Q2 is off). During standby
mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal
timers and other circuit blocks are activated. The device checks for short circuits at the ISET and ILIM pins. If no
short conditions exists, the device switches on the input FET Q1 with a 100-mA current limit to check for a short
circuit at OUT. If VOUT rises above VSC, the FET Q1 switches to the current-limit threshold set by EN1, EN2, and
RILIM and the device enters normal operation where the system is powered by the input source (Q1 is on), and
the device continuously monitors the status of CE, EN1, and EN2 as well as the input voltage conditions.
14
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Begin Startup
I IN (MAX) 100 mA
PGOOD = Hi -Z
CHG = Hi -Z
BATTFET ON
Yes
V OUT short ?
V UVLO<V IN <V OVP
and
V IN >V BAT+V IN(DT)
No
No
Yes
Input Current
Limit set by EN 1
and EN2
PGOOD = Low
Yes
EN 1= EN 2 =1
No
CE = Low
No
Yes
Yes
ILIM or ISET short ?
Begin Charging
No
Figure 25. Start-up Flow Diagram
POWER-PATH MANAGEMENT
The bq2423x features an OUT output that powers the external load connected to the battery. This output is
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a
source connected to IN to charge the battery and a battery source only.
INPUT SOURCE CONNECTED – ADAPTER or USB
With a source connected, the power-path management circuitry of the bq2423x monitors the input current
continuously. The OUT output is regulated to a fixed voltage (VO(REG)). The current into IN is shared between
charging the battery and powering the system load at OUT. The bq2423x has internal selectable current limits of
100 mA (USB100) and 500 mA (USB500) for charging from USB ports, as well as a resistor-programmable input
current limit.
The bq2423x is USB-IF compliant for the inrush current testing. The USB spec allows up to 10µF to be
hard-started, which establishes a 50 µF as the maximum inrush charge value when exceeding 100 mA. The
input current limit for the bq2423x prevents the input current from exceeding this limit, even with system
capacitances greater than 10 µF. Note that the input capacitance to the device must be selected small enough to
prevent a violation (<10 µF), as this current is not limited. Figure 26 demonstrates the startup of the bq2423x and
compares it to the USB-IF specification.
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10 μC
50 μC
20 mA/div
USB100 Current Limit
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100 μs/div
Figure 26. USB-IF Inrush Current Test
The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in Table 1. When
using the resistor-programmable current limit, the input current limit is set by the value of the resistor connected
from the ILIM pin to VSS and is given by the equation:
IIN-MAX = KILIM/RILIM
The input current limit is adjustable up to 500 mA. The valid resistor range is 3.2 kΩ to 8 kΩ.
When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement
modes are used to maintain the system load. Figure 27 illustrates examples of the DPPM and supplement
modes. These modes are explained in detail in the following sections.
Input DPM Mode, VIN-DPM
The bq2423x uses the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are
configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If
VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents
the bq2423x from crashing poorly designed or incorrectly configured USB sources.
DPPM Mode
When the sum of the charging and system load currents exceeds the preset maximum input current
(programmed with EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin
falls to VDPPM, the bq2423x enters DPPM mode. In this mode, the charging current is reduced as the OUT
current goes up in order to maintain the system output. Battery termination is disabled while in DPPM mode.
Battery Supplement Mode
While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the
battery voltage by VBSUP1, the battery supplements the system load. The battery stops supplementing the system
load when the voltage on the OUT pin rises above the battery voltage by VBSUP2.
During supplement mode, the battery supplement current is not regulated; however, a short-circuit protection
circuit is built in. If during battery supplement mode, the voltage at OUT drops 250 mV below the BAT voltage,
the OUT output is turned off if the overload exists after tDGL(SC2). The short-circuit recovery timer then starts
counting. After tREC(SC2), OUT turns on and attempts to restart. If the short circuit remains, OUT is turned off and
the counter restarts. Battery termination is disabled while in supplement mode.
16
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IOUT
500 mA
400 mA
250 mA
0 mA
IIN
400 mA
150 mA
0 mA
IBAT
150 mA
0 mA
-100 mA
4 .4 V
4 .3 V
DPM loop active
VOUT
~ 3 .6 V
Supplement
Mode
Figure 27. bq2423x DPPM and Battery Supplement Modes
(VOREG = 4.4 V, VBAT = 3.6 V, ILIM=400 mA, ICHG = 150 mA)
INPUT SOURCE NOT CONNECTED
When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode, the
current into OUT is unregulated, similar to Battery Supplement Mode; however, the short-circuit circuitry is active.
If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The
short-circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the
short-circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload
condition is removed.
BATTERY CHARGING
Set CE low to initiate battery charging. First, the device checks for a short circuit on the BAT pin by sourcing
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging
continues. The battery is charged in three phases: conditioning precharge, constant-current fast charge (current
regulation), and a constant-voltage tapering (voltage regulation). In all charge phases, an internal control loop
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is
exceeded.
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Figure 28 illustrates a normal Li-ion charge cycle using the bq2423x:
PRECHARGE
CC FAST CHARGE
CV TAPER
DONE
VBAT(REG)
IO(CHG)
Battery Current
Battery Voltage
VLOWV
CHG = Hi-z
I(PRECHG)
I(TERM)
Figure 28.
In the precharge phase, the battery is charged with the precharge current (IPRECHG). Once the battery voltage
crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage
reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the
battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by
going high impedance.
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the
thermal loop, the DPPM loop, or the VIN(LOW) loop.
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by
the equation
ICHG = KISET/RISET
The charge current limit is adjustable from 25 mA to 500 mA. The valid resistor range is 1.8 kΩ to 36 kΩ. Note
that if ICHG is programmed as greater than the input current limit, the battery does not charge at the rate of ICHG,
but at the slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers
are proportionately slowed down.
18
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Begin Charging
Yes
Yes
Battery short detected ?
Termination Reached
BATTFET Off
Wait for V BAT < VRCH
No
Start Precharge
CHG = Low
No
VBAT < VRCH
Yes
No
VBAT > VLOWV
No
tPRECHARGE
Elapsed?
Run Battery Detection
Yes
End Charge
Flash/CHG
Start Fastcharge
ICHARGE
set by ISET
Battery Detected ?
No
Yes
No
No
I BAT< ITERM
tFASTCHARGE
Elapsed?
Yes
End Charge
Flash CHG
Charge Done
CHG = Hi-Z
TD = Low
(’72, ’73 Only)
(’74, ’75 = YES )
No
Figure 29. Battery Charging Flow Diagram
CHARGE CURRENT TRANSLATOR
When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external
host to calculate the current sourced from BAT.
VISET=(ICHARGE / 400)×RISET
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BATTERY DETECTION AND RECHARGE
The bq2423x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run. The
detection routine first applies IBAT(DET) for tDET to see if VBAT drops below VLOWV. If not, it indicates that the battery
is still connected, but has discharged. If CE is low, the charger is turned on again to top off the battery. During
this recharge cycle, the CHG output remains high-impedance as recharge cycles are not indicated by the CHG
pin. If the BAT voltage falls below VLOWV during the battery detection test, it indicates that the battery has been
removed or the protector is open. Next, the precharge current is applied for tDET to close the protector if possible.
If the battery voltage does not rise above VRCH, it indicates that the protector is closed, or a battery has been
inserted, and a new charge cycle begins. If the voltage rises above VRCH, the battery is determined missing and
the detection routine continues. The battery detection runs until a battery is detected.
TERMINATION DISABLE (TD Input, bq24230)
The bq24230 contains a TD input that allows termination to be enabled/disabled. Connect TD to a logic high to
disable charge termination. When termination is disabled, the device goes through the precharge, fast-charge,
and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the output voltage at
BAT equal to VBAT(REG), and charging current does not terminate. BAT sources currents up to ICHG or IIN-MAX,
whichever is less. Battery detection is not performed. The CHG output is high impedance once the current falls
below ITERM and does not go low until the input power or CE are toggled. When termination is disabled, the
precharge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS pin
functionality) is also disabled if the TD pin is high and the TS pin is unconnected.
ADJUSTABLE TERMINATION THRESHOLD (ITERM Input, bq24232)
The termination current threshold for the bq24232 is user-programmable. Set the termination current by
connecting a resistor from ITERM to VSS. For USB100, mode (EN1 = EN2 = VSS), the termination current value
is calculated as:
ITERM = 0.01 × RITERM / RISET
In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as:
ITERM = 0.03 × RITERM / RISET
The termination current is programmable up to 50% of the fast-charge current. The RITERM resistor must be less
than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current.
DYNAMIC CHARGE TIMERS (TMR Input)
The bq2423x devices contain internal safety timers for the precharge and fast-charge phases to prevent potential
damage to the battery and the system. The timers begin at the start of the respective charge cycles. The timer
values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated using the
following equation:
tPRECHG = KTMR × RTMR
tMAXCHG = 10 × KTMR × RTMR
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation. For the bq24230, the timers are disabled when
TD is connected to a high logic level.
During the fast-charge phase, several events increase the timer durations.
1. The system load current activates the DPPM loop which reduces the available charging current
2. The input current is reduced because the input voltage has fallen to VIN(LOW)
3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half
the frequency and the counter counts half as fast resulting in only one minute of counted time.
20
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STATUS INDICATORS (PGOOD, CHG)
The bq2423x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside
of this range, PGOOD is high impedance.
The CHG output signals when a new charge cycle is initiated. After a charge cycle is initiated, CHG goes low
once the battery is above the short-circuit threshold. CHG goes high impedance once the charge current falls
below ITERM. CHG remains high impedance until the input power is removed and reconnected or the CE pin is
toggled. It does not signal subsequent recharge cycles.
PGOOD STATUS INDICATOR
Input State
PGOOD Output
VIN < VUVLO
Hi impedance
VUVLO < VIN < VIN(DT) + VBAT
Hi impedance
VIN(DT) + VBAT < VIN < VOVP
Low
VIN > VOVP
Hi impedance
CHG STATUS INDICATOR
Charge State
CHG Output
Charging
Low (first charge cycle)
Charging terminated
Hi impedance until power or CE is toggled
Recharging after termination
Hi impedance
Carging suspended by thermal loop
Low (first charge cycle)
Safety timers expired
Flashing at 2Hz
IC disabled or no valid input power
Hi impedance
TIMER FAULT
If the precharge timer expires before the battery voltage reaches VLOWV, the bq2423x indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast-charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition.
THERMAL REGULATION AND THERMAL SHUTDOWN
The bq2423x contain a thermal regulation loop that monitors the die temperature. If the die temperature exceeds
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a hiccup
mode. Safety timers are slowed proportionally to the charge current in thermal regulation. Battery termination is
disabled during thermal regulation and thermal shutdown.
Note that this feature monitors the die temperature of the bq2423x. This is not synonymous with ambient
temperature. Self-heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO mode for OUT.
A modified charge cycle with the thermal loop active is shown in Figure 30:
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PRECHARGE
THERMAL
REGULATION
CC FAST
CHARGE
CV TAPER
DONE
VO(REG)
IO(CHG)
Battery Voltage
Battery Current
V(LOWV)
HI-z
I(PRECHG)
I(TERM)
TJ(REG)
IC Junction Temperature, TJ
Figure 30.
BATTERY PACK TEMPERATURE MONITORING
The bq2423x features an external battery pack temperature monitoring input. The TS input connects to the NTC
resistor in the battery pack to monitor battery temperature and prevent dangerous overtemperature conditions.
During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any time, the
voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their
values but suspend counting. When the voltage measured at TS returns to within the operation window, charging
is resumed and the timers continue counting. When charging is suspended due to a battery pack temperature
fault, the CHG pin remains low and continues to indicate charging.
For the bq24230, battery pack temperature sensing is disabled when termination is disabled (TD = High) and the
voltage at TS is greater than VDIS(TS). The battery pack temperature monitoring is disabled in all devices by
connecting a 10-kΩ resistor from TS to VSS.
22
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The allowed temperature range for a 103AT-2 type thermistor is 0°C to 50°C. However, the user can increase
the range by adding two external resistors. See Figure 31 for the circuit. The values for RT1 and RT2 are
calculated using the following equations:
RT1 =
- 1500μA ´ (RHOT + RCOLD) ± 20 ´ 5625μA 2 ´ (RCOLD-RHOT)2 + 105μW ´ (RCOLD - RHOT)
3000μA
(1)
1 V ´ (R1 + RHOT)
RT2 =
250 μA ´ RT1 + 250 μA ´ RHOT - 1 V
(2)
RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. Note
that the temperature window cannot be tightened more than using on the thermistor connected to TS, it can only
be extended.
INTC
bq2407x
TS
RT1
+
PACK+
TEMP
VCOLD
RT2
+
VHOT
PACK-
Figure 31. Extended TS Temperature Thresholds
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APPLICATIONS INFORMATION
bq24232 CHARGER DESIGN EXAMPLE
See Figure 18 for the Design Example Schematic.
Requirements
•
•
•
•
•
•
Supply voltage = 5 V
Fast-charge current of approximately 200 mA; ISET - pin 16
Input Current Limit =500 mA; ILIM - pin 12
Termination Current = 25 mA - pin 15
Safety timer duration, Fast charge = 6.25 hours; TMR – pin 14
TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2)
Calculations
Program the Fast-Charge Current (ISET):
RISET = KISET / ICHG
KISET = 870 AΩ from the electrical characteristics table.
RISET = 870 AΩ/0.2 A = 4.35kΩ
Select the closest standard value, which for this case is 4.32 kΩ. Connect this resistor between ISET (pin 16)
and VSS.
Program the Input Current Limit (ILIM)
RILIM = KILIM / II_MAX
KILIM = 1470 AΩ from the electrical characteristics table.
RISET = 1470 AΩ / 0.5 A = 2.94 kΩ
Select the closest standard value, which for this case is 2.94 kΩ. Connect this resistor between ILIM (pin 12) and
VSS.
Program the Termination Current Threshold (ITERM)
RITERM = RISET × ITERM / KITERM
KITERM = 0.03 A from electrical characteristics table
RITERM = 4.32 kΩ × 0.025 A/0.03 A = 3.6 kΩ
Select the closest standard value, which for this case is 3.57 kΩ. Connect this resistor between ITERM (pin 15)
and VSS
Program 6.25-Hour Fast-Charge Safety Timer (TMR)
RTMR = tMAXCHG / (10 × KTMR)
KTMR = 40 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 40 s/kΩ) = 56.25 kΩ
Select the closest standard value, which for this case is 56.2 kΩ. Connect this resistor between TMR (pin 2) and
VSS.
TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT). To disable the temperature sense function, use a fixed
10-kΩ resistor between the TS (pin 1) and VSS. Pay close attention to the linearity of the chosen NTC so that it
provides the desired hot and cold turnoff thresholds.
24
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CHG and PGOOD
LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG and OUT and PGOOD.
Processor Monitoring Status: connect a pullup resistor (approximately 100 kΩ) between the processor’s power
rail and CHG and PGOOD.
SELECTING IN, OUT, AND BAT PIN CAPACITORS
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output, and battery pins. Using the values shown on the application diagram is recommended. After
evaluation of these voltage signals with real system operational conditions, the user can determine if capacitance
values can be adjusted toward the minimum recommended values (dc load application) or higher values for fast,
high-amplitude, pulsed load applications. ???Note if designed high input voltage sources (bad adapters or wrong
adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).
THERMAL PACKAGE
The bq2423x is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed-circuit board (PCB). The power pad must be
directly connected to the Vss pin. Full PCB design guidelines for this package are provided in the application
report entitled: QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal
performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the
package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
1.
2.
3.
4.
5.
Whether the device is board mounted
Trace size, composition, thickness, and geometry
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-ion batteries, the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically, after fast charge begins, the pack voltage
increases to ~3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to
use. This is easy to verify, with the system and a fully discharged battery, by plotting temperature on the bottom
of the PCB under the IC (pad must have multiple vias), the charge current and the battery voltage as a function
of time. The fast-charge current starts to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for nontypical situations such as hot environments or
higher than normal input source voltage. With that said, the IC still performs as described, if the thermal loop is
always active.
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Half-Wave Adapters
Some low-cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall below
the battery voltage during part of the cycle. To enable operation with low-cost adapters under those conditions,
the bq2407x family keeps the charger on for at least 20 ms (typical) after the input power puts the part in sleep
mode. This feature enables use of external low-cost adapters using 50-Hz networks.
Sleep Mode
After entering sleep mode for >20 ms, the internal FET connection between the IN and OUT pin is disabled and
pulling the input to ground does not discharge the battery, other than the leakage on the BAT pin. If the user has
a full 1000-mAHr battery and the leakage is 10 µA, then it takes 1000 mAHr/10 µA = 100000 hours (11.4 years)
to discharge the battery. The battery’s self-discharge is typically 5 times higher.
Layout Tips
•
•
•
•
26
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) must be placed as close as possible to the bq2423x, with short
trace runs to both IN, OUT, and GND (thermal pad).
All low-current GND connections must be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
The high current charge paths into the IN pin and from the OUT pin must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces.
The bq2423x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad
to provide an effective thermal contact between the IC and the printed-circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application report entitled: QFN/SON PCB
Attachment (SLUA271).
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Nov-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ24230RGTR
ACTIVE
QFN
RGT
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24230RGTRG4
ACTIVE
QFN
RGT
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24230RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24230RGTTG4
ACTIVE
QFN
RGT
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24232RGTR
ACTIVE
QFN
RGT
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24232RGTRG4
ACTIVE
QFN
RGT
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24232RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24232RGTTG4
ACTIVE
QFN
RGT
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
BQ24230RGTR
QFN
RGT
16
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24230RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24232RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24232RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ24230RGTR
QFN
RGT
16
3000
346.0
346.0
29.0
BQ24230RGTT
QFN
RGT
16
250
190.5
212.7
31.8
BQ24232RGTR
QFN
RGT
16
3000
346.0
346.0
29.0
BQ24232RGTT
QFN
RGT
16
250
190.5
212.7
31.8
Pack Materials-Page 2
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