IRF IRLR8729PBF-1 Compatible with existing surface mount technique Datasheet

IRLR8729PbF-1
HEXFET® Power MOSFET
VDS
30
V
8.9
mΩ
10
nC
D
D
RDS(on) max
(@VGS = 10V)
Q g (typical)
f
ID
58
(@TC = 25°C)
S
G
G
A
D-Pak
IRLR8729PbF-1
S
Features
Benefits
Industry-standard pinout D-Pak and I-Pak
Compatible with Existing Surface Mount Techniques
RoHS Compliant, Halogen-Free
MSL1, Industrial qualification
Base Part Number
Package Type
IRLR8729PbF-1
D-Pak
⇒
Multi-Vendor Compatibility
Easier Manufacturing
Environmentally Friendlier
Increased Reliability
Standard Pack
Form
Quantity
Tape and Reel
Tape and Reel Left
2000
3000
Orderable Part Number
IRLR8729TRPbF-1
IRLR8729TRLPbF-1
Absolute Maximum Ratings
Parameter
Max.
Units
30
V
VDS
Drain-to-Source Voltage
VGS
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
± 20
58
41
IDM
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
PD @TC = 25°C
Maximum Power Dissipation
PD @TC = 100°C
Maximum Power Dissipation
TJ
Linear Derating Factor
Operating Junction and
TSTG
Storage Temperature Range
ID @ TC = 25°C
ID @ TC = 100°C
c
f
f
A
260
g
g
W
55
27
0.37
-55 to + 175
Soldering Temperature, for 10 seconds
W/°C
°C
300 (1.6mm from case)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient (PCB Mount)
RθJA
Junction-to-Ambient
1
g
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Typ.
Max.
–––
2.73
–––
50
–––
110
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Units
°C/W
June 29, 2014
IRLR8729PbF-1
Static @ TJ = 25°C (unless otherwise specified)
Parameter
BVDSS
ΔΒVDSS/ΔTJ
RDS(on)
VGS(th)
ΔVGS(th)/ΔTJ
Min. Typ. Max. Units
V
Conditions
Drain-to-Source Breakdown Voltage
30
–––
–––
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
21
6.0
–––
8.9
Gate Threshold Voltage
–––
1.35
8.9
1.8
mV/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 25A
mΩ
11.9
VGS = 4.5V, ID = 20A
2.35
V VDS = VGS, ID = 25μA
VGS = 0V, ID = 250μA
e
e
Gate Threshold Voltage Coefficient
–––
-6.2
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
1.0
150
μA
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
–––
–––
–––
–––
100
-100
nA
VGS = 20V
VGS = -20V
gfs
Qg
Forward Transconductance
Total Gate Charge
91
–––
–––
10
–––
16
S
VDS = 15V, ID = 20A
Qgs1
Qgs2
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
–––
–––
2.1
1.3
–––
–––
nC
VDS = 15V
VGS = 4.5V
Qgd
Gate-to-Drain Charge
–––
4.0
–––
ID = 20A
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
2.6
4.8
–––
–––
See Fig. 16
Output Charge
Gate Resistance
–––
6.3
–––
nC
1.6
10
47
2.7
–––
–––
Ω
Turn-On Delay Time
Rise Time
–––
–––
–––
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
11
10
–––
–––
Ciss
Input Capacitance
–––
1350
–––
Coss
Crss
Output Capacitance
Reverse Transfer Capacitance
–––
–––
280
120
–––
–––
Qsw
Qoss
RG
td(on)
tr
ns
VDS = 16V, VGS = 0V
VDD = 15V, VGS = 4.5V
ID = 20A
e
RG = 1.8Ω
See Fig. 14
VGS = 0V
pF
VDS = 15V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
EAS
IAR
Single Pulse Avalanche Energy
Avalanche Current
EAR
Repetitive Avalanche Energy
c
d
c
Typ.
–––
–––
Max.
74
20
Units
mJ
A
–––
5.5
mJ
Diode Characteristics
Parameter
IS
Min. Typ. Max. Units
Continuous Source Current
(Body Diode)
–––
–––
ISM
Pulsed Source Current
(Body Diode)
–––
–––
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
–––
–––
–––
16
Qrr
ton
Reverse Recovery Charge
–––
19
c
Forward Turn-On Time
2
58
f
Conditions
MOSFET symbol
A
showing the
integral reverse
1.0
24
V
ns
29
nC
p-n junction diode.
TJ = 25°C, IS = 20A, VGS = 0V
TJ = 25°C, IF = 20A, VDD = 15V
di/dt = 300A/μs
260
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRLR8729PbF-1
1000
1000
VGS
10V
4.5V
3.7V
3.5V
3.3V
3.0V
2.7V
2.5V
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
10
1
≤60μs PULSE WIDTH
BOTTOM
10
2.5V
Tj = 25°C
2.5V
1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
≤60μs PULSE WIDTH
Tj = 175°C
0.1
100
T J = 175°C
10
T J = 25°C
1
VDS = 15V
≤60μs PULSE WIDTH
0.1
ID = 25A
VGS = 10V
1.5
1.0
0.5
1
2
3
4
5
6
7
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
3
VGS
10V
4.5V
3.7V
3.5V
3.3V
3.0V
2.7V
2.5V
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8
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
vs. Temperature
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IRLR8729PbF-1
10000
5.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
ID= 20A
VGS, Gate-to-Source Voltage (V)
C rss = C gd
C, Capacitance (pF)
C oss = C ds + C gd
Ciss
1000
Coss
Crss
3.0
2.0
1.0
0.0
100
1
10
0
100
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
4
6
8
10
12
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
ID, Drain-to-Source Current (A)
1000
ISD, Reverse Drain Current (A)
2
QG, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100
T J = 175°C
10
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
100
1msec
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1
0.1
0.0
0.5
1.0
1.5
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS= 24V
VDS= 15V
4.0
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2.0
0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLR8729PbF-1
60
2.5
VGS(th) , Gate threshold Voltage (V)
Limited By Package
ID, Drain Current (A)
50
40
30
20
10
2.0
1.5
ID = 25μA
ID = 50μA
ID = 100μA
1.0
0
0.5
25
50
75
100
125
150
175
-75 -50 -25 0
T C , Case Temperature (°C)
25 50 75 100 125 150 175 200
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
τC
τ1
τ2
τ2
Ri (°C/W) τi (sec)
1.251
0.000513
1.481
0.004337
C i= τi/R i
Ci= τi/Ri
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
τC
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
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IRLR8729PbF-1
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
VGS
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
A
EAS , Single Pulse Avalanche Energy (mJ)
300
15V
ID
4.4A
6.5A
BOTTOM 20A
TOP
250
200
150
100
50
0
tp
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
V DS
Fig 12b. Unclamped Inductive Waveforms
V GS
RG
Current Regulator
Same Type as D.U.T.
RD
D.U.T.
+
-V DD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
50KΩ
12V
Fig 14a. Switching Time Test Circuit
.2μF
.3μF
D.U.T.
+
V
- DS
VDS
90%
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 13. Gate Charge Test Circuit
6
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10%
VGS
td(on)
tr
t d(off)
tf
Fig 14b. Switching Time Waveforms
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IRLR8729PbF-1
Driver Gate Drive
P.W.
+
D=
Period
P.W.
Period
VGS=10V
D.U.T
-
ƒ
+
-
‚
Circuit Layout Considerations
D.U.T. ISD Waveform
• Low Stray Inductance
• Ground Plane
Reverse
• Low Leakage Inductance Recovery
Body Diode Forward
Current Transformer
Current
+ Current
RG
di/dt
„

•
•
•
•
*
D.U.T. VDS Waveform
Re-Applied
V Voltage +
dv/dt controlled by RG
DD
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
- Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Vds
Vgs
Vgs(th)
Qgodr
Qgd
Qgs2 Qgs1
Fig 16. Gate Charge Waveform
7
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IRLR8729PbF-1
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120
WIT H ASS EMBLY
LOT CODE 1234
ASS EMBLED ON WW 16, 2001
IN T HE AS SEMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECTIFIER
LOGO
Note: "P" in ass embly line position
indicates "Lead-Free"
IRFR120
12
116A
34
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in ass embly line pos ition indicates
"Lead-Free" qualification to the consumer-level
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFR120
12
ASS EMBLY
LOT CODE
34
DAT E CODE
P = DESIGNAT ES LEAD-F REE
PRODUCT (OPTIONAL)
P = DESIGNAT ES LEAD-F REE
PRODUCT QUALIF IED T O T HE
CONS UMER LEVEL (OPT IONAL)
YEAR 1 = 2001
WEEK 16
A = AS SEMBLY SIT E CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRLR8729PbF-1
D-Pak (TO-252AA) Tape & Reel Information
(Dimensions are shown in millimeters (inches)
TR
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRLR8729PbF-1
†
Qualification information
Industrial
Qualification level
(per JEDE C JE S D47F
Moisture Sensitivity Level
RoHS compliant
††
guidelines)
MS L1
D-Pak
Yes
† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability
†† Applicable version of JEDEC standard at the time of product release
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
‚ Starting TJ = 25°C, L = 0.37mH, RG = 25Ω, IAS = 20A.
ƒ Pulse width ≤ 400μs; duty cycle ≤ 2%.
„ Calculated continuous current based on maximum allowable junction temperature. Package limitation
current is 50A.
When mounted on 1" square PCB (FR-4 or G-10 Material).For recommended footprint and soldering techniques
refer to application note #AN-994.
Revision History
Date
6/27/2014
Comment
• Orderable table removed Tube option and add TRL option on page1.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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