ON MC74LCX04DTR2G Low-voltage cmos hex inverter Datasheet

MC74LCX04
Low-Voltage CMOS Hex
Inverter
With 5 V−Tolerant Inputs
The MC74LCX04 is a high performance hex inverter operating
from a 2.0 to 5.5 V supply. High impedance TTL compatible inputs
significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows MC74LCX04 inputs to be safely driven
from 5 V devices if VCC is less than 5.0 V.
Current drive capability is 24 mA at the outputs.
14
SOIC−14
D SUFFIX
CASE 751A
1
Designed for 2.0 V to 5.5 V VCC Operation
5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
LCX04G
AWLYWW
1
14
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA

 ESD Performance:

MARKING
DIAGRAMS
14
Features






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Human Body Model >2000 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
14
1
LCX
04
ALYWG
G
TSSOP−14
DT SUFFIX
CASE 948G
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
 Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 8
1
Publication Order Number:
MC74LCX04/D
MC74LCX04
VCC
A3
O3
A4
O4
A5
O5
14
13
12
11
10
9
8
A0
A1
A2
A3
1
2
3
4
5
6
7
A0
O0
A1
O1
A2
O2
GND
A4
A5
1
2
3
4
5
6
13
12
11
10
9
8
Figure 1. Pinout: 14−Lead (Top View)
O0
O1
O2
O3
O4
O5
Figure 2. Logic Diagram
TRUTH TABLE
PIN NAMES
Pins
Function
An
On
Data Inputs
Outputs
An
On
L
H
H
L
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VI
DC Input Voltage
−0.5  VI  +7.0
V
VO
DC Output Voltage
IIK
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
50
mA
ICC
DC Supply Current Per Supply Pin
100
mA
IGND
DC Ground Current Per Ground Pin
100
mA
TSTG
Storage Temperature Range
−65 to +150
C
MSL
Moisture Sensitivity
−0.5  VO  VCC +0.5
Output in HIGH or LOW State (Note 1)
V
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
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2
MC74LCX04
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
2.0
1.5
2.5, 3.3
2.5, 3.3
5.5
5.5
V
0
5.5
V
0
VCC
V
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
−24
−12
−8
mA
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+24
+12
+8
mA
−55
+125
C
0
10
ns/V
VCC
Supply Voltage
Operating
Data Retention Only
VI
Input Voltage
VO
Output Voltage
(HIGH or LOW State) (3−State)
IOH
HIGH Level Output Current
IOL
LOW Level Output Current
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
DC ELECTRICAL CHARACTERISTICS
TA = −55C to +125C
Symbol
VIH
VIL
VOH
VOL
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
LOW Level Output Voltage
Condition
Min
2.3 V  VCC  2.7 V
1.7
2.7 V  VCC  3.6 V
2.0
Max
V
2.3 V  VCC  2.7 V
0.7
2.7 V  VCC  3.6 V
0.8
2.3 V  VCC  3.6 V; IOH = −100 mA
VCC − 0.2
VCC = 2.3 V; IOH = −8 mA
1.8
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
Unit
V
V
2.3 V  VCC  3.6 V; IOL = 100 mA
0.2
VCC = 2.3 V; IOL = 8 mA
0.6
VCC = 2.7 V; IOL = 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
VCC = 3.0 V; IOL = 24 mA
0.55
V
IOFF
Power Off Leakage Current
VCC = 0, VIN = 5.5 V or VOUT = 5.5 V
10
mA
IIN
Input Leakage Current
VCC = 3.6 V, VIN = 5.5 V or GND
5
mA
ICC
Quiescent Supply Current
VCC = 3.6 V, VIN = 5.5 V or GND
10
mA
DICC
Increase in ICC per Input
2.3  VCC  3.6 V; VIH = VCC − 0.6 V
500
mA
2. These values of VI are used to test DC electrical characteristics only.
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3
MC74LCX04
AC CHARACTERISTICS (tR = tF = 2.5 ns; RL = 500 W)
Limits
TA = −55C to +125C
Symbol
VCC = 3.3 V  0.3 V
VCC = 2.7 V
VCC = 2.5 V  0.2 V
CL = 50 pF
CL = 50 pF
CL = 30 pF
Parameter
Waveform
Min
Max
Min
Max
Min
Max
Unit
tPLH
Propagation Delay Time
1
1.5
5.2
1.5
6.0
1.5
6.2
ns
tPHL
Input to Output
1.5
5.2
1.5
6.0
1.5
6.2
tOSHL
Output−to−Output Skew
1.0
tOSLH
(Note 3)
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25C
Symbol
VOLP
VOLV
Characteristic
Condition
Min
Typ
Max
Unit
Dynamic LOW Peak Voltage
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
(Note 4)
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.6
V
Dynamic LOW Valley Voltage
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
−0.8
V
(Note 4)
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.6
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CIN
Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
ORDERING INFORMATION
Package
Shipping†
MC74LCX04DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74LCX04DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX04DTG
TSSOP−14
(Pb−Free)
96 Units / Rail
MC74LCX04DTR2G
TSSOP−14
(Pb−Free)
2500 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74LCX04
VCC
Vmi
An
Vmi
0V
tPHL
tPLH
Vmo
On
VOH
Vmo
VOL
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VCC
3.3 V $ 0.3 V
2.7 V
2.5 V $ 0.2 V
Vmi
1.5 V
1.5 V
VCC/2
Vmo
1.5 V
1.5 V
VCC/2
Symbol
Figure 3. AC Waveforms
VCC
PULSE
GENERATOR
DUT
RT
CL =
CL =
RL =
RT =
CL
RL
50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)
30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)
R1 = 500 W or equivalent
ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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5
MC74LCX04
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
0.25 (0.010)
8
S
DETAIL E
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MC74LCX04
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
D
A
B
14
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
A3
E
H
L
1
0.25
M
DETAIL A
7
B
13X
M
b
0.25
M
C A
S
B
S
e
DETAIL A
h
A
X 45 _
M
A1
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
H
h
L
M
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.19
0.25
0.35
0.49
8.55
8.75
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
INCHES
MIN
MAX
0.054 0.068
0.004 0.010
0.008 0.010
0.014 0.019
0.337 0.344
0.150 0.157
0.050 BSC
0.228 0.244
0.010 0.019
0.016 0.049
0_
7_
SOLDERING FOOTPRINT*
6.50
14X
1.18
1
1.27
PITCH
14X
0.58
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74LCX04/D