Renesas HA16158P Pfc & pwm control ic Datasheet

HA16158P/FP
PFC & PWM Control IC
REJ03F0147-0200
Rev.2.00
Jan 30, 2007
Description
The HA16158 is a power supply controller IC combining an AC-DC converter switching controller for power factor
correction and an off-line power supply switching controller. The PFC (power factor correction) section employs
average current mode PWM and the off-line power supply control section employs peak current mode PWM.
The HA16158 allows the operating frequency to be varied with a single timing resistance, enabling it to be used for a
variety of applications.
The PFC operation can be turned on and off by an external control signal. Use of this on/off function makes it possible
to disable PFC operation at a low line voltage, or to perform remote control operation from the transformer secondary
side.
The PWM controller includes a power-saving function that reduces the operating frequency to a maximum of 1/64 in
the standby state, greatly decreasing switching loss.
The PFC section and PWM section are each provided with a soft start control pin, enabling a soft start time to be set
easily.
Features
<Maximum Ratings>
 Supply voltage Vcc: 24 V
 Operating junction temperature Tjopr: –40°C to +125°C
<Electrical Characteristics>
 VREF output voltage VREF: 5.0 V ± 2%
 UVLO start threshold VH: 16.0 V ± 1.0 V
 UVLO shutdown threshold VL: 10.0 V ± 0.6 V
 PFC output maximum duty cycle Dmax-pfc: 95% typ.
 PWM output maximum duty cycle Dmax-pwm: 45% typ.
<Functions>
 Synchronized PFC and PWM timing
 PFC function on/off control
 PWM power-saving function (frequency reduced to maximum of 1/64)
 PWM overvoltage latch protection circuit
 Soft start control circuits for both PFC and PWM
 Package lineup: SOP-16/DILP-16
Rev.2.00 Jan 30, 2007 page 1 of 23
HA16158P/FP
Pin Arrangement
GND
1
16
PWM-CS
PWM-OUT
2
15
PWM-COMP
PFC-OUT
3
14
PWM-SS
VCC
4
13
PFC-SS
PFC-ON
5
12
PFC-EO
VREF
6
11
PFC-FB
CAO
7
10
IAC
PFC-CS
8
9
RT
(Top view)
Pin Functions
Pin No.
Pin Name
Pin Functions
1
2
GND
PWM-OUT
Ground
Power MOS FET driver output (PWM control)
3
4
PFC-OUT
VCC
Power MOS FET driver output (PFC control)
Supply voltage
5
6
PFC-ON
VREF
PFC function on/off signal input
Reference voltage
7
8
CAO
PFC-CS
Average current control error amplifier output
PFC control current sense signal input
9
10
RT
IAC
Operating frequency setting timing resistance connection
Multiplier reference current input
11
12
PFC-FB
PFC-EO
PFC control error amplifier input
PFC control error amplifier output
13
14
PFC-SS
PWM-SS
PFC control soft start time setting capacitance connection
PWM control soft start time setting capacitance connection
15
16
PWM-COMP
PWM-CS
PWM control voltage feedback
PWM control current sense signal input
Rev.2.00 Jan 30, 2007 page 2 of 23
HA16158P/FP
Block Diagram
Vref
IAC
PFCEO
PFC-CS
10
Multiplier
12
8
7
CAO
RT
9
Rmo
3.3k
C-LIMIT
UVLO
4
VREF
6
VCC
Oscillator
VREF
C-AMP
PFCFB
2.5V
11
V-AMP
PFC-OVP
VTH: 2.80V
VTL : 2.60V
PFCON
PFC-CLK
(PWM-CLK/2)
−0.25V −0.5V
±1.0A
Gain
Selector
PFCOUT
VREF
VREF VREF
GOOD
VREF
5
B+
PFC-FB supervisor
13
VTH: 3.80V
VTL : 3.40V
Oscillator
PFC ON/OFF
VTH: 1.50V
VTL : 1.20V
GND
3
PFC Control
LOGIC
3.5V
25µ
2RA
RA
15
Vref
Rev.2.00 Jan 30, 2007 page 3 of 23
2
Oscillator
VTH: 2.40V
VTL : 1.50V
1V
4.0V
PWMCOMP
±1.0A
f/64 Divider
1
1.4V
PFCSS
Oscillator
PWM Control
LOGIC
1.7V
25µ
PWMCS
16
14
PWMSS
OVP Latch
PFC-FB
PWMOUT
HA16158P/FP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Power supply voltage
Ratings
24
Unit
V
Vcc
PFC-OUT output current (peak)
PWM-OUT output current (peak)
Ipk-out1
Ipk-out2
±1.0
±1.0
A
A
PFC-OUT output current (DC)
PWM-OUT output current (DC)
Idc-out1
Idc-out2
±0.1
±0.1
A
A
Pin voltage
Vi-group1
Vi-group2
–0.3 to Vcc
–0.3 to Vref
V
V
CAO pin voltage
PFC-EO pin voltage
Vcao
Vpfc-eo
–0.3 to Veoh-ca
–0.3 to Veoh-pfc
V
V
PFC-ON pin voltage
RT pin current
Vpfc-on
Irt
–0.3 to 7
50
V
µA
IAC pin current
PFC-CS pin voltage
Iiac
Vi-cs
1
–1.5 to 0.3
mA
V
VREF pin current
VREF pin voltage
Io-ref
Vref
–20
–0.3 to Vref
mA
V
Operating junction temperature
Storage temperature
Tj-opr
Tstg
–40 to +125
–55 to +150
°C
°C
Notes: 1.
2.
3.
4.
Symbol
Rated voltages are with reference to the GND (SGND, PGND) pin.
For rated currents, inflow to the IC is indicated by (+), and outflow by (–).
Shows the transient current when driving a capacitive load.
Group1 is the rated voltage for the following pins:
PFC-OUT, PWM-OUT
5. Group2 is the rated voltage for the following pins:
PFC-FB, PWM-CS, PWM-COMP, IAC, PFC-SS, PWM-SS, RT
6. HA16158P (DILP):
θja = 120°C/W
HA16158FP (SOP):
θja = 120°C/W
This value is based on actual measurements on a 10% wiring density
glass epoxy circuit board (40 mm × 40 mm × 1.6 mm).
Rev.2.00 Jan 30, 2007 page 4 of 23
Note
3
3
4
5
6
HA16158P/FP
Electrical Characteristics
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Supply
VREF
Oscillator
Supervisor
OVP latch
Power
saving
for PWM
Note:
Item
Start threshold
Symbol
VH
Min
15.0
Typ
16.0
Max
17.0
Unit
V
Shutdown threshold
UVLO hysteresis
VL
dVUVL
9.4
5.2
10.0
6.0
10.6
6.8
V
V
Start-up current
Is temperature
stability
Is
dIs/dTa
160
–
220
–0.3
280
–
µA
%/°C
Operating current
Shunt zenner
voltage
Icc
Vz
5.5
25.5
7.0
27.5
8.5
29.5
mA
V
Vz temperature
stability
Latch current
dVz/dTa
–
–4
–
mV/°C
ILATCH
180
250
320
µA
Vcc = 9V
Output voltage
Line regulation
Vref
Vref-line
4.9
–
5.0
5
5.1
20
V
mV
Isource = 1mA
Isource = 1mA,
Vcc = 12V to 23V
Load regulation
Temperature
stability
Vref-load
dVref
–
–
5
80
20
–
mV
ppm/°C
Initial accuracy
fpwm
fpfc
117
58.5
130
65
143
71.5
kHz
kHz
Measured pin: PWM-OUT
Measured pin: PFC-OUT
fpwm temperature
stability
fpwm voltage
stability
dfpwm/dTa
–
±0.1
–
%/°C
Ta = –40 to 125°C *
fpwm(line)
–1.5
+0.5
+1.5
%
VCC = 12V to 18V
Ramp peak voltage
Ramp valley
voltage
Vramp-H
Vramp-L
–
–
3.6
0.65
4.0
–
V
V
PFC *
1
PFC *
CT peak voltage
CT valley voltage
Vct-H
Vct-L
–
1.50
3.2
1.60
–
–
V
V
PWM *
1
PWM *
RT voltage
PFC on voltage
Vrt
Von-pfc
0.85
1.4
1.00
1.5
1.15
1.6
V
V
Measured pin: RT
PFC off voltage
PFC on-off
hysteresis
Voff-pfc
dVon-off
1.1
0.2
1.2
0.3
1.3
0.4
V
V
Input current
PFC OVP set
voltage
Ipfc-on
Vovps-pfc
–
2.65
0.1
2.80
1.0
2.95
µA
V
PFC-ON = 2V
Input pin: PFC-FB
PFC OVP reset
voltage
PFC OVP
hysteresis
Vovpr-pfc
2.45
2.60
2.75
V
Input pin: PFC-FB
dVovp
0.10
0.20
0.30
V
B+ good voltage
B+ fail voltage
Vb-good
Vb-fail
2.25
1.4
2.40
1.5
2.55
1.6
V
V
Measured pin: PFC-FB
Measured pin: PFC-FB
Latch threshold
voltage
Vlatch
3.76
4.00
4.24
V
Input pin: PWM-SS
Latch reset voltage
Power saving on
voltage
Vcc-res
Von-save
6.1
1.53
7.1
1.70
8.1
1.87
V
V
Measured pin: PWM-COMP
–
2
–
kHz
Minimum frequency fpwm-min
at light load
1. Reference values for design.
Rev.2.00 Jan 30, 2007 page 5 of 23
Test Conditions
Vcc = 14.8V
1
*
IAC = 0A, CL = 0F
Icc = 14mA
1
Icc = 14mA *
Isource = 1mA to 20mA
Ta = –40 to 125°C *1
1
1
1
PWM-COMP = 1.5V
1
Measured pin: PWM-OUT *
HA16158P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Item
Soft start time
Symbol
tss-pwm
Min
–
Typ
4.2
Max
–
Unit
ms
Test Conditions
1
PWM-SS = 0V to Vct-h *
Source current
High voltage
Iss-pwm
Vh-ss
–20.0
3.25
–25.0
3.5
–30.0
3.75
µA
V
Measured pin: PWM-SS
Measured pin: PWM-SS
Soft start for
PFC
Soft start time
Source current
tss-pfc
Iss-pfc
–
+20.0
5.7
+25.0
–
+30.0
ms
µA
PFC-SS = Vref to Vramp-I *
Measured pin: PFC-SS
PWM
current
sense
PFC current
limit
Delay to output
td-cs
–
210
300
ns
PWM-EO = 5V,
PWM-CS = 0 to 2V
Threshold voltage
VLM1
–0.45
–0.50
–0.55
V
PFC-ON = 2V
Threshold voltage
Delay to output
VLM2
td-LM
–0.22
–
–0.25
280
–0.28
500
V
ns
PFC-ON = 4V
PFC-CS = 0 to –1V
Feedback voltage
Input bias current
Vfb-pfc
Ifb-pfc
2.45
–0.3
2.50
0
2.55
0.3
V
µA
PFC-EO = 2.5V
Measured pin: PFC-FB
Open loop gain
High voltage
Av-pfc
Veoh-pfc
–
5.0
65
5.7
–
6.4
dB
V
*
PFC-FB = 2.3V, PFC-EO: Open
Low voltage
Source current
Veol-pfc
Isrc-pfc
–
–
0.1
–90
0.3
–
V
µA
PFC-FB = 2.7V, PFC-EO: Open
PFC-FB = 1.0V, PFC-EO: 2.5V
1
*
Sink current
Isnk-pfc
–
90
–
µA
Transconductance
Gm-pfcv
150
200
250
µA/V
PFC-FB = 4.0V, PFC-EO: 2.5V
1
*
PFC-FB = 2.5V, PFC-EO: 2.5V
Minimum duty cycle
Maximum duty cycle
Dmin-pfc
Dmax-pfc
–
90
–
95
0
98
%
%
CAO = 4.0V
CAO = 0V
Rise time
Fall time
tr-pfc
tf-pfc
–
–
30
30
100
100
ns
ns
CL = 1000pF
CL = 1000pF
Peak current
Low voltage
Ipk-pfc
Vol1-pfc
–
–
1.0
0.05
–
0.2
A
V
CL = 0.01µF *
Iout = 20mA
Vol2-pfc
Vol3-pfc
–
–
0.5
0.03
2.0
0.7
V
V
Iout = 200mA
Iout = 10mA, VCC = 5V
High voltage
Voh1-pfc
Voh2-pfc
11.5
10.0
11.9
11.0
–
–
V
V
Iout = –20mA
Iout = –200mA
Minimum duty cycle
Maximum duty cycle
Dmin-pwm
–
42
–
45
0
49
%
%
PWM-COMP = 0V
PWM-COMP = Vref
Rise time
Fall time
tr-pwm
tf-pwm
–
–
30
30
100
100
ns
ns
CL = 1000pF
CL = 1000pF
Peak current
Low voltage
Ipk-pwm
Vol1-pwm
–
–
1.0
0.05
–
0.2
A
V
CL = 0.01µF *
Iout = 20mA
Vol2-pwm
Vol3-pwm
–
–
0.5
0.03
2.0
0.7
V
V
Iout = 200mA
Iout = 10mA, VCC = 5V
11.5
11.9
–
V
Iout = –20mA
10.0
11.0
–
V
Iout = –200mA
Soft start for
PWM
PFC-VAMP
PFC-OUT
PWM-OUT
High voltage
Note:
Dmax-pwm
Voh1pwm
Voh2pwm
1. Reference values for design.
Rev.2.00 Jan 30, 2007 page 6 of 23
1
1
1
1
HA16158P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Item
Input offset voltage
Symbol
Vio-ca
Min
–
Typ
±7
Max
–
Unit
mV
Open loop gain
High voltage
Av-ca
Veoh-ca
–
5.0
65
5.7
–
6.4
dB
V
Low voltage
Source current
Veol-ca
Isrc-ca
–
–
0.1
–90
0.3
–
V
µA
CAO = 2.5V *
Sink current
Transconductance
Isnk-ca
Gm-pfcc
–
150
90
200
–
250
µA
µA/V
CAO = 2.5V *
1
*
IAC pin voltage
Terminal offset
current
Viac
Imo-offset1
0.7
–67
1.0
–90
1.3
–113
V
µA
IAC = 100µA
IAC = 0A, PFC-ON = 2V
Imo-offset2
Imo1
–60
–
–80
–20
–100
–
µA
µA
IAC = 0A, PFC-ON = 4V
1, 2
PFC-EO = 2V, IAC = 100µA *
Imo2
Imo3
–
–
–60
–5
–
–
µA
µA
PFC-EO = 4V, IAC = 100µA *
1, 2
PFC-EO = 2V, IAC = 100µA *
Imo4
Rmo
–
–
–15
3.3
–
–
µA
kΩ
PFC-EO = 4V, IAC = 100µA *
1
*
VK-H
3.60
3.80
4.00
V
Measured pin: PFC-ON
VK-L
3.20
3.40
3.60
V
Measured pin: PFC-ON
VK hysteresis
dVK
0.30
Notes: 1. Reference values for design.
2. Imo1 to Imo4 are defined as:
Imo = (PFC-CS pin current) – (Imo-offset)
0.40
0.50
V
*
PFC-CAMP
IAC/Multiplier
Output current
(PFC-ON = 2.0V)
Output current
(PFC-ON = 4.0V)
PFC-CS resistance
Gain selector
Threshold voltage
for K = 0.05
Threshold voltage
for K = 0.25
Test Conditions
1
*
*
1
1
1
1, 2
1, 2
1
IMO = K {IAC × (VEO − 1V)}
IAC
PFC-CAMP
−
+
IAC
VEO
K
Imo
VREF
3.3k
Rev.2.00 Jan 30, 2007 page 7 of 23
−0.5V −0.25V
+
−
PFC-CS
PFC-CS Terminal
Current
−
+
Imo-offset
PFC-CLIMIT
HA16158P/FP
Timing Diagram
1. Start-up Timing
VREF
4.5V
Over current
PFC-CS
−0.5V(VLM)
PFC-FB
(Supervise
B+)
VREF
2.4V(Vb-good)
1.5V(Vb-fail)
2.4V(Vb-good)
3.6V(Vramp-H)
3.6V(Vramp-H)
PFC-SS
Soft start
PFC-OUT
Normal operation
PWM-SS
1.6V(Vct-L)
Soft start
PWM-OUT
Normal operation
Rev.2.00 Jan 30, 2007 page 8 of 23
1.6V(Vct-L)
1.5V(Vb-fail)
HA16158P/FP
2. PWM OVP Latch
Abnormal DC Output
Recovery
DC-OUT
0V(DC-OUT Shut down)
16V(VH)
10V(VL)
VCC
7.1V(Vcc-res)
PWM-SS
4V(Vlatch)
3.5V(Vh-ss)
Latching term for PWM
PWM-OUT
Latching term for PWM
PFC-OUT
Rev.2.00 Jan 30, 2007 page 9 of 23
HA16158P/FP
3. PWM Power Saving
RT
EOUT terminal voltage detection is performed
pulse-by-pulse.
EOUT
1.7V
PWM-OUT
PFC-OUT
Rev.2.00 Jan 30, 2007 page 10 of 23
frequency down: f/64 maximum
HA16158P/FP
Functional Description
1. UVL Circuit
The UVL circuit monitors the Vcc voltage and halts operation of the IC in the event of a low voltage.
The voltage for detecting Vcc has a hysteresis characteristic, with 16.0 V as the start threshold and 10.0 V as the
shutdown threshold.
When the IC has been halted by the UVL circuit, control is performed to fix driver circuit output low and halt VREF
output and the oscillator.
Vcc
16.0V
10.0V
4.5V
4.5V
VREF
V_CT
(internal signal)
PWM-RESET
(internal signal)
PFC-DT
(internal signal)
PFC-RAMP
(internal signal)
PWM-OUT
PFC-OUT
Figure 1
Rev.2.00 Jan 30, 2007 page 11 of 23
HA16158P/FP
2. Soft Start Circuit (for PWM Control)
This function gradually increases the pulse width of the PWM-OUT pin from a 0% duty cycle at start-up to prevent a
sudden increase in the pulse width that may cause problems such as transient stress on external parts or overshoot of the
secondary-side output voltage.
The soft start time can easily be set with a single external capacitance.
3.2V
V_PWM-SS
V_CT
(internal signal)
1.6V
PWM-SS
comp. out
(internal signal)
PWM-OUT
Figure 2
Soft start time tss-pwm is determined by PWM-SS pin connection capacitance Css-pwm and an internal constant, and
can be estimated using the equation shown below.
Soft start time tss-pwm is the time until the PWM-SS pin voltage reaches upper-end voltage 3.2 V of the IC-internal CT
voltage waveform after VREF starts up following UVLO release.
Soft start time tss-pwm when Css-pwm is 3.3 nF is given by the following equation.
tss-pwm =
33 [nF] × 3.2 [V]
Css-pwm × Vct-H
=
25 [µA]
Iss-pwm
≈ 4.2 [ms]
* Iss-pwm: PWM-SS pin source current, 25 µA typ.
Rev.2.00 Jan 30, 2007 page 12 of 23
HA16158P/FP
3. Soft Start Circuit (for PFC Control)
This function gradually increases the pulse width of the PFC-OUT pin from a 0% duty cycle at start-up to prevent a
sudden increase in the pulse width that may cause problems such as transient stress on external parts or overshoot of the
PFC output voltage (B+ voltage).
The soft start time can easily be set with a single external capacitance.
3.4V
V_PFC-SS
V_ramp
(internal signal)
PFC-SS
comp. out
(internal signal)
PFC-OUT
Figure 3
Soft start time tss-pfc is determined by PFC-SS pin connection capacitance Css-pfc and an internal constant, and can be
estimated using the equation shown below.
Soft start time tss-pfc is the time until the PFC-SS pin voltage reaches lower-end voltage 0.65 V of the IC-internal
RAMP voltage waveform after VREF starts up following UVLO release.
Soft start time tss-pfc when Css-pfc is 3.3 nF is given by the following equation.
tss-pfc =
33 [nF] × (5 − 0.65)
Css-pfc × (VREF − Vramp-L)
=
25 [µA]
Iss-pwm
≈ 5.7 [ms]
* Iss-pfc: PFC-SS pin sink current, 25 µA typ.
In addition, when you do not use a soft start function, please ground this terminal.
Rev.2.00 Jan 30, 2007 page 13 of 23
HA16158P/FP
4. PFC On/Off Function
On/off control of the PFC function can be performed using the PFC-ON pin.
If an AC voltage that has undergone primary rectification and has been divided by an external resistance is input, it is
possible to halt PFC operation in the event of a low input voltage. On/off control is also possible by using a logic signal.
When the PFC function is turned on/off by using the PFC-ON pin, however, the PFC-SS pin cannot be reset. Therefore,
a soft start is not operated at the start-up by the PFC-ON pin.
The figure below illustrates an example of circuit for simultaneous reset of the PFC-SS pin and PWM-SS pin.
VREF
PFC-SS
PWM-SS
PFC-ON
ON/OFF
signal
Figure 4 Example of Circuit Configuration to Turn On/Off PFC & PWM Functions
This IC also incorporates a function that automatically detects a 100 V system or 200 V system AC voltage at the PFCON pin, and switches multiplier gain and the PFC-CS comparison voltage.
These functions simplify the design of a power supply compatible with worldwide input.
Rev.2.00 Jan 30, 2007 page 14 of 23
HA16158P/FP
Rec+
Em
R1
720kΩ
1.5V
1.2V
PFC-ON
5
PFC-ON/OFF control
PFC-ON(dc)
C1
2.2µF
R2
12kΩ
Multiplier gain switching
3.8V
3.4V
PFC-CS compare
voltage switching
PFC-ON(dc) = 2 ∗ Em / π ∗ R2 / (R1 + R2)
= 2 ∗ √2 ∗ Vac / π ∗ R2 / (R1 + R2)
156Vac
AC Voltage
Vac
140Vac
62Vac
49Vac
0Vac
3.8V
3.4V
PFC-ON
1.5V
1.2V
0V
ON
PFC status
PFC ON period
(internal signal)
OFF
0.25
Multiplier gain
(internal signal)
0.05
PFC-SS
compare
voltage
−0.25
(internal signal) −0.50
Figure 5
Rev.2.00 Jan 30, 2007 page 15 of 23
HA16158P/FP
5. Power Saving in Standby State (for PWM Control)
When the output load is light, as in the standby state, the operating frequency of the PWM control section is
automatically decreased in order to reduce switching loss.
Standby detection is performed by monitoring the PWM-COMP voltage, and the operating frequency is decreased to a
maximum of 1/64 of the reference frequency determined by an external timing resistance.
As standby detection is performed on a reference frequency pulse-by-pulse basis, the frequency varies gently according
to the output load.
RT
9
2
driver
Oscillator
PWM-OUT
PWM
Logic
R
VREF
Q
S
−
15
+
16
PWM-COMP
PWM-CS
−
f/64
Divider
reset
+
1.7V
Power Saving
Power Saving Peripheral Circuit
PWM-COMP
1.7V
PWM-OUT
f
f/64
Figure 6
Rev.2.00 Jan 30, 2007 page 16 of 23
HA16158P/FP
6. Overvoltage Latch Protection (for PWM Control)
This is a protection function that halts PWM-OUT and PFC-OUT if the secondary-side PWM output voltage is
abnormally high.
Overvoltage signal input is shared with the PWM-SS pin. When this pin is pulled up to 4.0 V or higher, the control
circuit identifies an overvoltage error and halts PWM-OUT and PFC-OUT.
The power supply is turned off, and the latch is released when the VCC voltage falls to 7.1 V or below.
+
PFC-OUT
Q S
Vcc
−
4.0V
R
PWM-OUT
−
VREF
Vcc
+
7.1V
2.4V
1.5V
14
PWM-SS
PFC-FB
Overvoltage Latch Protection Peripheral Circuit
VREF
4.0V
PWM-SS
3.5V
PWM-OUT
PFC-OUT
Figure 7
Rev.2.00 Jan 30, 2007 page 17 of 23
HA16158P/FP
7. Operating Frequency
The operating frequency is adjusted by timing resinstance RT.
Adjustment examples are shown in the graph below. The operating frequency fpwm in the PWM section is determined
by the RT. The operating frequency fpfc in the PFC section is half the value of fpwm.
The operating frequency in the PWM section can be estimated using the approximate equation shown below.
RT = 200 kΩ:
fpwm ≈
fpfc =
2.60 × 1010
= 130 [kHz]
RT
fpwm
= 65 [kHz]
2
This is only an approximate equation, and the higher the frequency, the greater will be the degree of error of the
approximate equation due to the effects of the delay time in the internal circuit, etc.
When the operating frequency is adjusted, it is essential to confirm operation using the actual system.
fpwm, fpfc (kHz)
1000
100
fpwm
fpfc
10
10
100
RT (kΩ)
Figure 8
Rev.2.00 Jan 30, 2007 page 18 of 23
1000
HA16158P/FP
Characteristic Curves
Power Supply Current vs. Power Supply Voltage Characteristics
10.0
Ta = 25°C
Icc (mA)
8.0
6.0
4.0
2.0
0.0
8.0
10.0
12.0
14.0
18.0
16.0
Vcc (V)
Standby Current vs. Power Supply Voltage Characteristics
1.0
Ta = 25°C
Icc (mA)
0.8
0.6
0.4
0.2
0.0
0.0
2.0
4.0
6.0
8.0
10.0
Vcc (V)
Rev.2.00 Jan 30, 2007 page 19 of 23
12.0
14.0
16.0
18.0
HA16158P/FP
VREF Output Voltage vs. Ambient Temperature Characteristics
5.20
5.15
Iref = 1mA
VREF (V)
5.10
5.05
5.00
4.95
4.90
4.85
4.80
−50
−25
0
25
50
75
100
125
Ta (°C)
Operating Frequency vs. Ambient Temperature Characteristics
160
RT = 200kΩ
Frequency (kHz)
140
fpwm
120
100
80
fpfc
60
40
−50
−25
0
25
50
Ta (°C)
Rev.2.00 Jan 30, 2007 page 20 of 23
75
100
125
HA16158P/FP
UVL Start-up Voltage vs. Ambient Temperature Characteristics
20.0
19.0
18.0
VH (V)
17.0
16.0
15.0
14.0
13.0
12.0
−50
−25
0
25
50
75
100
125
Ta (°C)
UVL Shutdown Voltage vs. Ambient Temperature Characteristics
14.0
13.0
12.0
VL (V)
11.0
10.0
9.0
8.0
7.0
6.0
−50
−25
0
25
50
Ta (°C)
Rev.2.00 Jan 30, 2007 page 21 of 23
75
100
125
HA16158P/FP
Application Circuit Example
1.5mH
Rec+
B+ OUT
T1
(385V dc)
51k(5W)
500k
To
PFC-FB
Q1
VRB1
Rec−
+
330µ
(450V)
From PFC-OUT
from
auxiliary
+
56µ
20V
3.3k
GND
VCC
OSCILLATOR
130kHz
3.2V
7.7µs
27.5V
1.6V
PWM-RES
3.85µs
RT
200k
3.4V
15.4µs
0.65V
36k 3000p CAO
L
VREF
5V VREF
Generator
UVLO
10V
0.1µ
UVL
RAMP
IAC
1.02M
750k
IAC
K
100
Q
−
+
GAIN SELECTOR
1k
To
main trans
Q
+
−
0.015µ
S
PFC-CLIMIT
OCP
VREF GOOD Gate Driver
±1.0A(PEAK)
K = 0.20
PFC
-EO
1M
Gate Driver
±1.0A(PEAK)
−0.5V −0.25V
R
3.3k
PWM
-OUT
K = 0.05
Q2
0.66
(1W)
R
0.68µ
Q
S
2.5V
0.47µ
1M
To
Q1 gate
S
VREF
PFC
-CS
PFC
-OUT
R
−
+
IMO
L
VREF GOOD
PFC-CAMP
VEO
H
VREF In
GOOD Out
65kHz
IMO = K {IAC × (VEO − 1V)}
270p
0.082
(5W)
H
16V
PFC-DT
770ns
VREF
5V Internal Bias
CT
VREF
+
−
PFC
-FB
3.80V
3.40V
−
+
From
VRB1(B+monitor1)
PWM
-COMP
−
+
1V
R
2R
1.4V
240
1000p
200
+
−
720k
PFC-OVP
2.80V
2.60V
−
+
20k
PFC
-ON
4.4µ
18.6k
1200p
1.5V
1.2V
−
+
Power Saving for PWM
f/64 Divider
PWM-RES
B+ LOW
PWM stop
2.40V
1.50V
PFC stop
PFC-OFF
−
+
R
620
2200p
1.7V
VCC
+
−
4.0V
7.1V
OVP Latch
Vref
VREF
Vref
0.1µ
0.47µ
S
Circuit
Ground
Q
OCP
R
SUPERVISOR
Rev.2.00 Jan 30, 2007 page 22 of 23
25µA
+
−
VREF GOOD
GND
Q S
PWM
-CS
−
+
SOFT START
−
+
PFC
-SS
25µA
RAMP
3.5V
CT
VREF
2.5k
PWM
-SS
0.033µ
Unit R: Ω
C: F
HA16158P/FP
Package Dimensions
As of January, 2003
19.20
20.00 Max
Unit: mm
1
7.40 Max
9
6.30
16
8
1.3
0.48 ± 0.10
7.62
2.54 Min 5.06 Max
2.54 ± 0.25
0.51 Min
1.11 Max
+ 0.13
0.25 – 0.05
0° – 15°
Package Code
JEDEC
JEITA
Mass (reference value)
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-A
*1
Previous Code
FP-16DA
DP-16
Conforms
Conforms
1.07 g
MASS[Typ.]
0.24g
D
F
16
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
9
bp
c
c1
*2
E
HE
b1
Index mark
Terminal cross section
1
Z
8
e
*3
bp
x
Reference
Symbol
M
A
L1
A1
θ
y
L
Detail F
Rev.2.00 Jan 30, 2007 page 23 of 23
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min Nom Max
10.06 10.5
5.5
0.00 0.10 0.20
2.20
0.34 0.42 0.50
0.40
0.17 0.22 0.27
0.20
0°
8°
7.50 7.80 8.00
1.27
0.12
0.15
0.80
0.50 0.70 0.90
1.15
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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