Linear LT1963EST-1.8 1.5a, low noise, fast transient response ldo regulator Datasheet

LT1963 Series
1.5A, Low Noise,
Fast Transient Response
LDO Regulators
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FEATURES
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DESCRIPTIO
Optimized for Fast Transient Response
Output Current: 1.5A
Dropout Voltage: 340mV
Low Noise: 40µVRMS (10Hz to 100kHz)
1mA Quiescent Current
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
< 1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor
Reverse Battery Protection
No Reverse Current
Thermal Limiting
The LT ®1963 series are low dropout regulators optimized
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
< 1µA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other
regulators. In addition to fast transient response, the
LT1963 regulators have very low output noise which
makes them ideal for sensitive RF supply applications.
Output voltage range is from 1.21V to 20V. The LT1963
regulators are stable with output capacitors as low as
10µF. Internal protection circuitry includes reverse battery
protection, current limiting, thermal limiting and reverse
current protection. The devices are available in fixed
output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an
adjustable device with a 1.21V reference voltage. The
LT1963 regulators are available in 5-lead TO-220, DD,
3-lead SOT-223 and 8-lead SO packages.
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APPLICATIO S
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3.3V to 2.5V Logic Power Supplies
Post Regulator for Switching Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Dropout Voltage
400
3.3V to 2.5V Regulator
+
VIN > 3V
10µF
OUT
LT1963-2.5
SHDN
2.5V
1.5A
+
10µF
SENSE
GND
1963 TA01
DROPOUT VOLTAGE (mV)
IN
350
300
250
200
150
100
50
0
0
0.2
0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (A)
1.4 1.6
1963 TA02
1963fa
1
LT1963 Series
W W
W
AXI U
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ABSOLUTE
RATI GS (Note 1)
IN Pin Voltage ........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 2) ......... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
SHDN Pin Voltage ................................................. ±20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range – 45°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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U
W
PACKAGE/ORDER I FOR ATIO
TAB IS
GND
5
SENSE/ADJ*
4
OUT
3
GND
2
IN
1
SHDN
FRONT VIEW
ORDER PART
NUMBER
FRONT VIEW
LT1963EQ
LT1963EQ-1.5
LT1963EQ-1.8
LT1963EQ-2.5
LT1963EQ-3.3
Q PACKAGE
5-LEAD PLASTIC DD
*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
TJMAX = 150°C, θJA = 30°C/ W
TAB IS
GND
5
SENSE/ADJ*
4
OUT
3
GND
2
IN
1
SHDN
LT1963ET
LT1963ET-1.5
LT1963ET-1.8
LT1963ET-2.5
LT1963ET-3.3
T PACKAGE
5-LEAD PLASTIC TO-220
*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
TJMAX = 150°C, θJA = 50°C/ W
ORDER PART
NUMBER
LT1963EST-1.5
LT1963EST-1.8
LT1963EST-2.5
LT1963EST-3.3
FRONT VIEW
3
TAB IS
GND
OUT
2
GND
1
IN
ST PART
MARKING
ST PACKAGE
3-LEAD PLASTIC SOT-223
TJMAX = 150°C, θJA = 50°C/ W
196315
196318
196325
196333
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
OUT 1
8
IN
SENSE/ADJ* 2
7
GND
GND 3
6
GND
NC 4
5
SHDN
LT1963ES8
LT1963ES8-1.5
LT1963ES8-1.8
LT1963ES8-2.5
LT1963ES8-3.3
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART
MARKING
*PIN 2 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
TJMAX = 150°C, θJA = 70°C/ W
1963
196315
196318
196325
196333
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3)
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage (Notes 4,12) ILOAD = 0.5A
ILOAD = 1.5A
Regulated Output Voltage (Note 5)
LT1963-1.5
LT1963-1.8
●
TYP
MAX
UNITS
1.9
2.1
2.5
V
V
VIN = 2.21V, ILOAD = 1mA
2.5V < VIN < 20V, 1mA < ILOAD < 1.5A
●
1.477
1.447
1.500
1.500
1.523
1.545
V
V
VIN = 2.3V, ILOAD = 1mA
2.8V < VIN < 20V, 1mA < ILOAD < 1.5A
●
1.773
1.737
1.800
1.800
1.827
1.854
V
V
1963fa
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LT1963 Series
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETER
CONDITIONS
LT1963-2.5
LT1963-3.3
MIN
TYP
MAX
UNITS
●
2.462
2.412
2.500
2.500
2.538
2.575
V
V
VIN = 3.8V, ILOAD = 1mA
4.3V < VIN < 20V, 1mA < ILOAD < 1.5A
●
3.250
3.200
3.300
3.300
3.350
3.400
V
V
VIN = 2.21V, ILOAD = 1mA
2.5V < VIN < 20V, 1mA < ILOAD < 1.5A
●
1.192
1.174
1.210
1.210
1.228
1.246
V
V
2.0
2.5
3.0
3.5
1.5
10
10
10
10
10
mV
mV
mV
mV
mV
2
9
18
mV
mV
2
10
20
mV
mV
2.5
15
30
mV
mV
3
20
35
mV
mV
2
8
15
mV
mV
0.02
0.06
0.10
V
V
0.10
0.17
0.22
V
V
0.19
0.27
0.35
V
V
0.34
0.45
0.55
V
V
1.0
1.1
3.8
15
80
1.5
1.6
5.5
25
120
mA
mA
mA
mA
mA
VIN = 3V, ILOAD = 1mA
3.5V < VIN < 20V, 1mA < ILOAD < 1.5A
ADJ Pin Voltage
(Notes 4, 5)
LT1963
Line Regulation
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
LT1963 (Note 4)
∆VIN = 2.21V to 20V, ILOAD = 1mA
∆VIN = 2.3V to 20V, ILOAD = 1mA
∆VIN = 3V to 20V, ILOAD = 1mA
∆VIN = 3.8V to 20V, ILOAD = 1mA
∆VIN = 2.21V to 20V, ILOAD = 1mA
●
●
●
●
●
Load Regulation
LT1963-1.5
VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
●
VIN = 2.8V, ∆ILOAD = 1mA to 1.5A
VIN = 2.8V, ∆ILOAD = 1mA to 1.5A
●
VIN = 3.5V, ∆ILOAD = 1mA to 1.5A
VIN = 3.5V, ∆ILOAD = 1mA to 1.5A
●
VIN = 4.3V, ∆ILOAD = 1mA to 1.5A
VIN = 4.3V, ∆ILOAD = 1mA to 1.5A
●
LT1963 (Note 4) VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
VIN = 2.5V, ∆ILOAD = 1mA to 1.5A
●
ILOAD = 1mA
ILOAD = 1mA
●
ILOAD = 100mA
ILOAD = 100mA
●
ILOAD = 500mA
ILOAD = 500mA
●
ILOAD = 1.5A
ILOAD = 1.5A
●
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 100mA
ILOAD = 500mA
ILOAD = 1.5A
●
●
●
●
●
LT1963-1.8
LT1963-2.5
LT1963-3.3
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 6, 7, 12)
GND Pin Current
VIN = VOUT(NOMINAL) + 1V
(Notes 6, 8)
µVRMS
Output Voltage Noise
COUT = 10µF, ILOAD = 1.5A, BW = 10Hz to 100kHz
40
ADJ Pin Bias Current
(Notes 4, 9)
3
10
µA
Shutdown Threshold
VOUT = Off to On
VOUT = On to Off
0.90
0.75
2
V
V
0.01
3
1
30
µA
µA
0.01
1
µA
SHDN Pin Current
(Note 10)
VIN = 6V, VSHDN = 0V
Ripple Rejection
VIN – VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P,
fRIPPLE = 120Hz, ILOAD = 0.75A
Current Limit
VIN = 7V, VOUT = 0V
VIN = VOUT(NOMINAL) + 1V, ∆VOUT = – 0.1V
Reverse Output Current (Note 11)
0.25
VSHDN = 0V
VSHDN = 20V
Quiescent Current in Shutdown
Input Reverse Leakage Current (Note 13)
●
●
Q, T, S8 Packages VIN = – 20V, VOUT = 0V
ST Package
VIN = – 20V, VOUT = 0V
LT1963-1.5
VOUT = 1.5V, VIN < 1.5V
LT1963-1.8
VOUT = 1.8V, VIN < 1.8V
LT1963-2.5
VOUT = 2.5V, VIN < 2.5V
LT1963-3.3
VOUT = 3.3V, VIN < 3.3V
LT1963 (Note 4) VOUT = 1.21V, VIN < 1.21V
55
●
63
dB
2
A
A
1.6
●
●
600
600
600
600
300
1
2
mA
mA
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
1963fa
3
LT1963 Series
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.
Note 3: The LT1963 regulators are tested and specified under pulse load
conditions such that TJ ≈ TA. The LT1963 is 100% tested at
TA = 25°C. Performance at – 40°C and 125°C is assured by design,
characterization and correlation with statistical process controls.
Note 4: The LT1963 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1963
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of
2.4V. The external resistor divider will add a 300µA DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: VIN – VDROPOUT.
Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V and a
current source load. The GND pin current will decrease at higher input
voltages.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.
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TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
GUARANTEED DROPOUT VOLTAGE (mV)
600
450
DROPOUT VOLTAGE (mV)
400
350
TJ = 125°C
300
250
TJ = 25°C
200
150
100
50
0
0
0.2
0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (A)
1.4
TEST POINTS
450
500
TJ ≤ 125°C
400
TJ ≤ 25°C
300
200
400
350
250
0
0.2
0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (A)
150
1.4
1.6
0.2
VIN = 6V
RL = ∞, IL = 0
VSHDN = VIN
0
– 50 – 25
50
25
75
0
TEMPERATURE (°C)
125
4
2.56
1.82
2.54
1.81
1.80
1.79
1.78
1.76
–50 –25
2.52
2.50
2.48
2.46
2.44
0
25
50
75
100
125
TEMPERATURE (°C)
1963 G04
125
IL = 1mA
1.83
1.77
100
100
2.58
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
LT1963-1.8/-2.5/-3.3
0.4
50
0
75
25
TEMPERATURE (°C)
1963 G03
IL = 1mA
0.6
–25
LT1963-2.5 Output Voltage
1.84
LT1963
IL = 1mA
0
–50
LT1963-1.8 Output Voltage
1.4
0.8
IL = 100mA
1963 • G02
1963 • G01
1.0
IL = 0.5A
200
50
Quiescent Current
1.2
IL = 1.5A
300
100
100
0
1.6
Dropout Voltage
500
DROPOUT VOLTAGE (mV)
500
2.42
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
1963 G05
1963 G06
1963fa
LT1963 Series
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TYPICAL PERFOR A CE CHARACTERISTICS
LT1963-3.3 Output Voltage
3.34
1.220
3.32
3.30
3.28
1.215
1.210
1.205
3.26
1.200
3.24
1.195
25
50
75
100
125
1.190
–50 –25
0
25
50
75
100
LT1963-2.5 Quiescent Current
QUIESCENT CURRENT (mA)
10
8
6
4
0
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
8
6
4
LT1963-1.8 GND Pin Current
1
2
12
5
3 4 5 6 7
INPUT VOLTAGE (V)
8
10
RL = 25, IL = 100mA*
3 4 5 6 7
INPUT VOLTAGE (V)
8
4
0
9
10
1963 G13
2
4
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1963 G12
25
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
20
15
RL = 11, IL = 300mA*
10
RL = 33, IL = 100mA*
5
RL = 250, IL = 10mA*
0
2
6
LT1963-3.3 GND Pin Current
RL = 8.33, IL = 300mA*
5
0
1
8
0
10
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
15
RL = 180, IL = 10mA*
0
9
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
20
RL = 18, IL = 100mA*
10
10
LT1963-2.5 GND Pin Current
25
RL = 6, IL = 300mA*
9
TJ = 25°C
RL = 4.3k
VSHDN = VIN
1963 G11
25
15
8
2
0
10
TJ = 25°C
VSHDN = VIN
20 *FOR VOUT = 1.18V
3 4 5 6 7
INPUT VOLTAGE (V)
LT1963 Quiescent Current
10
1963 G10
10
2
14
0
0
2
1
1963 G09
2
2
GND PIN CURRENT (mA)
0
125
TJ = 25°C
RL = ∞
VSHDN = VIN
12
QUIESCENT CURRENT (mA)
TJ = 25°C
RL = ∞
VSHDN = VIN
1
4
LT1963-3.3 Quiescent Current
14
0
6
1963 G08
1963 G07
12
8
TEMPERATURE (°C)
TEMPERATURE (°C)
14
10
2
QUIESCENT CURRENT (mA)
0
TJ = 25°C
RL = ∞
VSHDN = VIN
12
QUIESCENT CURRENT (mA)
1.225
ADJ PIN VOLTAGE (V)
3.36
3.22
–50 –25
14
IL = 1mA
IL = 1mA
OUTPUT VOLTAGE (V)
LT1963-1.8 Quiescent Current
LT1963 ADJ Pin Voltage
1.230
3.38
8
9 10
1963 G14
RL = 330, IL = 100mA*
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1963 G15
1963fa
5
LT1963 Series
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TYPICAL PERFOR A CE CHARACTERISTICS
LT1963-1.8 GND Pin Current
100
10
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.21V
RL = 4.33, IL = 300mA*
6
4
RL = 12.1, IL = 100mA*
80
70
RL = 1.2, IL = 1.5A*
60
50
40
30
RL = 1.8, IL = 1A*
1
0
3 4 5 6 7
INPUT VOLTAGE (V)
2
8
9
0
10
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
RL = 2.2, IL = 1.5A*
60
50
40
RL = 3.3, IL = 1A*
30
80
40
30
10
RL = 6.6, IL = 500mA*
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
RL = 1.21, IL = 1A*
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
0.5
0.4
0.3
0.2
50
40
30
125
1963 G22
0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (A)
0.2
1.6
1963 G21
4.5
IL = 1.5A
0.8
0.7
0.6
IL = 1mA
0.5
0.4
0.3
0.2
0
–50
1.4
SHDN Pin Input Current
0.1
0.1
100
60
0
SHDN PIN INPUT CURRENT (µA)
SHDN PIN THRESHOLD (V)
0.6
50
0
75
25
TEMPERATURE (°C)
70
5.0
0.9
0.7
10
80
SHDN Pin Threshold (Off-to-On)
0.8
9
VIN = VOUT (NOMINAL) +1V
1963 G20
IL = 1mA
8
0
10
1.0
–25
3 4 5 6 7
INPUT VOLTAGE (V)
10
RL = 2.42, IL = 500mA*
0
10
SHDN Pin Threshold (On-to-Off)
0
–50
2
20
1963 G19
0.9
1
1963 G18
0
0
1.0
0
90
RL = 0.81, IL = 1.5A*
50
10
2
RL = 5, IL = 500mA*
GND Pin Current vs ILOAD
60
20
1
RL = 2.5, IL = 1A*
30
100
70
20
0
40
0
10
GND PIN CURRENT (mA)
70
9
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.21V
90
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
100
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
80
50
LT1963 GND Pin Current
LT1963-3.3 GND Pin Current
90
RL = 1.67, IL = 1.5A*
60
1963 G17
1963 G16
100
70
10
RL = 3.6, IL = 500mA*
0
0
80
20
10
RL = 121, IL = 10mA*
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
90
20
2
SHDN PIN THRESHOLD (V)
100
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.8V
90
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
8
LT1963-2.5 GND Pin Current
GND PIN CURRENT (mA)
LT1963 GND Pin Current
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
–25
50
0
75
25
TEMPERATURE (°C)
100
125
1963 G23
0
0
2
4
6 8 10 12 14 16 18 20
SHDN PIN VOLTAGE (V)
1963 G24
1963fa
6
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
SHDN Pin Input Current
VSHDN = 20V
4
3
2
1
2.5
4.0
3.5
CURRENT LIMIT (A)
5
3.0
4.5
6
ADJ PIN BIAS CURRENT (µA)
SHDN PIN INPUT CURRENT (µA)
Current Limit
ADJ Pin Bias Current
5.0
7
3.0
2.5
2.0
1.5
1.0
TJ = 25°C
2.0
1.5
1.0
0.5
0.5
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
∆VOUT = 100mV
0
–50
125
–25
50
0
75
25
TEMPERATURE (°C)
REVERSE OUTPUT CURRENT (mA)
CURRENT LIMIT (A)
3.0
2.5
2.0
1.5
1.0
0.5
1963 G27
4.5
LT1963-1.8
4.0
3.5
3.0
LT1963
2.5
2.0
LT1963-3.3
LT1963-2.5
1.0
0.5
–25
50
0
75
25
TEMPERATURE (°C)
100
0
125
0
1
2
3 4 5 6 7 8
OUTPUT VOLTAGE (V)
0.6
LT1963-1.8/-2.5/-3.3
0.4
LT1963
76
70
74
60
50
40
30
20
COUT = 100µF TANTALUM
+10 × 1µF CERAMIC
COUT = 10µF TANTALUM
0.2
0.1
50
25
0
75
TEMPERATURE (°C)
100
125
1963 G30
10
Ripple Rejection
80
10 IL = 0.75A
VIN = VOUT(NOMINAL) +1V + 50mVRMS RIPPLE
0
10
1k
10k
1M
100
100k
FREQUENCY (Hz)
1963 G31
RIPPLE REJECTION (dB)
RIPPLE REJECTION (dB)
VIN = 0V
0.9 VOUT = 1.21V (LT1963)
= 1.8V (LT1963-1.8)
V
0.8 VOUT = 2.5V (LT1963-2.5)
OUT
0.7 VOUT = 3.3V (LT1963-3.3)
9
1963 G29
Ripple Rejection
Reverse Output Current
1.0
–25
TJ = 25°C
VIN = 0V
CURRENT FLOWS INTO
OUTPUT PIN
VOUT = VADJ (LT1963)
VOUT = VFB (LT1963-1.8/-2.5/-3.3)
1.5
1963 G28
0
–50
4
6 8 10 12 14 16 18 20
INPUT/OUTPUT DIFFERENTIAL (V)
5.0
VIN = 7V
3.5 VOUT = 0V
0.3
2
Reverse Output Current
Current Limit
0.5
0
1963 G26
4.0
0
–50
0
125
100
1963 G25
REVERSE OUTPUT CURRENT (mA)
TJ = – 50°C
TJ = 125°C
72
70
68
66
64 IL = 0.75A
VIN = VOUT(NOMINAL) +1V + 0.5VP-P
RIPPLE AT f = 120Hz
62
50
100
25
75
– 50 – 25
0
TEMPERATURE (°C)
125
1963 G32
1963fa
7
LT1963 Series
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TYPICAL PERFOR A CE CHARACTERISTICS
Load Regulation
2.5
5
IL = 1.5A
IL = 500mA
2.0
IL = 100mA
1.5
1.0
0.5
LT1963-1.8
LT1963
0
–5
LT1963-2.5
LT1963-3.3
–10
VIN = VOUT(NOMINAL) +1V
(LT1963-1.8/-2.5/-3.3)
VIN = 2.7V (LT1963)
∆IL = 1mA TO 1.5A
–15
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
– 20
–50 –25
125
Output Noise Spectral Density
50
25
75
0
TEMPERATURE (°C)
100
1963 G33
OUTPUT NOISE VOLTAGE (µVRMS)
125
1.0
COUT = 10µF
IL =1.5A
LT1963-2.5
LT1963-3.3
0.1
LT1963
LT1963-1.8
0.01
10
100
10k
1k
FREQUENCY (Hz)
100k
1963 G35
1963 G34
RMS Output Noise vs Load
Current (10Hz to 100kHz)
50
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
10
LOAD REGULATION (mV)
MINIMUM INPUT VOLTAGE (V)
LT1963 Minimum Input Voltage
3.0
LT1963-3.3 10Hz to 100kHz Output Noise
COUT = 10µF
45
40
LT1963-3.3
35
LT1963-2.5
30
25
VOUT
100µV/DIV
LT1963-1.8
20
LT1963
15
10
5
0
0.0001
0.001
0.01
0.1
LOAD CURRENT (A)
1
10
COUT = 10µF
ILOAD = 1.5A
1963 G37
1ms/DIV
1063 G36
LT1963-3.3 Transient Response
LT1963-3.3 Transient Response
150
VIN = 4.3V
150 CIN = 3.3µF TANTALUM
COUT = 10µF TANTALUM
100
OUTPUT VOLTAGE
DEVIATION (mV)
OUTPUT VOLTAGE
DEVIATION (mV)
200
50
0
–50
100
50
0
–50
–100
0.6
1.5
LOAD
CURRENT (A)
–150
LOAD
CURRENT (A)
–100
0.4
0.2
0
0
2
4
6
8
10 12 14 16 18 20
TIME (µs)
1963 G38
VIN = 4.3V
CIN = 33µF TANTALUM
COUT = 100µF TANTALUM
+10 × 1µF CERAMIC
1.0
0.5
0
0
50 100 150 200 250 300 350 400 450 500
TIME (µs)
1963 G39
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8
LT1963 Series
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PI FU CTIO S
OUT: Output. The output supplies power to the load. A
minimum output capacitor of 10µF is required to prevent
oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SENSE: Sense. For fixed voltage versions of the LT1963
(LT1963-1.8/LT1963-2.5/LT1963-3.3), the SENSE pin is
the input to the error amplifier. Optimum regulation will be
obtained at the point where the SENSE pin is connected to
the OUT pin of the regulator. In critical applications, small
voltage drops are caused by the resistance (RP) of PC traces
between the regulator and the load. These may be eliminated by connecting the SENSE pin to the output at the
load as shown in Figure 1 (Kelvin Sense Connection). Note
that the voltage drop across the external PC traces will add
to the dropout voltage of the regulator. The SENSE pin bias
current is 600µA at the nominal rated output voltage. The
SENSE pin can be pulled below ground (as in a dual supply
system where the regulator load is returned to a negative
supply) and still allow the device to start and operate.
ADJ: Adjust. For the adjustable LT1963, this is the input to
the error amplifier. This pin is internally clamped to ±7V.
It has a bias current of 3µA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.
SHDN: Shutdown. The SHDN pin is used to put the LT1963
regulators into a low power shutdown state. The output
will be off when the SHDN pin is pulled low. The SHDN pin
can be driven either by 5V logic or open-collector logic
with a pull-up resistor. The pull-up resistor is required to
supply the pull-up current of the open-collector gate,
normally several microamperes, and the SHDN pin current, typically 3µA. If unused, the SHDN pin must be
connected to VIN. The device will be in the low power
shutdown state if the SHDN pin is not connected.
IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient. The LT1963 regulators are designed to withstand reverse voltages on the IN
pin with respect to ground and the OUT pin. In the case of
a reverse input, which can happen if a battery is plugged
in backwards, the device will act as if there is a diode in
series with its input. There will be no reverse current flow
into the regulator and no reverse voltage will appear at the
load. The device will protect both itself and the load.
IN
OUT
LT1963
+
VIN
SHDN
RP
+
SENSE
LOAD
GND
RP
1963 F01
Figure 1. Kelvin Sense Connection
1963fa
9
LT1963 Series
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APPLICATIO S I FOR ATIO
The LT1963 series are 1.5A low dropout regulators optimized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963 regulators incorporate several protection features
which make them ideal for use in battery-powered systems. The devices are protected against both reverse input
and reverse output voltages. In battery backup applications where the output can be held up by a backup battery
when the input is pulled to ground, the LT1963-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1963 has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
IN
VIN
OUT
VOUT
R2
LT1963
+
ADJ
GND
R1
1963 F02
 R2
VOUT = 1.21V  1 +  + (IADJ )(R2)
 R1
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
Figure 2. Adjustable Operation
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 1.5A is – 3mV typical at
VOUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = – 12.4mV
Output Capacitance and Transient Response
The LT1963 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 10µF with an ESR in
the range of 50mΩ to 3Ω is recommended to prevent
oscillations. Larger values of output capacitance can decrease the peak deviations and provide improved transient
response for larger load current changes. Bypass capacitors, used to decouple individual components powered by
the LT1963, will increase the effective output capacitor
value.
Extra consideration must be given to the use of ceramic
capacitors. In some applications, the use of ceramic
capacitors with an ESR below 50mΩ can cause oscillations. Please consult our Applications Engineering department for help with any issues concerning the use of
ceramic output capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different
behavior over temperature and applied voltage. The most
common dielectrics used are Z5U, Y5V, X5R and X7R. The
Z5U and Y5V dielectrics are good for providing high
capacitances in a small package, but exhibit strong voltage
and temperature coefficients as shown in Figures 3 and 4.
When used with a 5V regulator, a 10µF Y5V capacitor can
exhibit an effective value as low as 1µF to 2µF over the
operating temperature range. The X5R and X7R dielectrics
result in more stable characteristics and are more suitable
for use as the output capacitor. The X7R type has better
stability across temperature, while the X5R is less expensive and is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
1963fa
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LT1963 Series
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APPLICATIO S I FOR ATIO
20
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963-X.
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
CHANGE IN VALUE (%)
X5R
–20
–40
–60
Y5V
–80
–100
0
2
4
8
6
10 12
DC BIAS VOLTAGE (V)
14
16
1963 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
CHANGE IN VALUE (%)
20
X5R
0
–20
–40
Y5V
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common situations are immediately after the removal of a
short-circuit or when the shutdown pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double intersection, the input power supply may need to be cycled
down to zero and brought up again to make the output
recover.
–60
–80
Output Voltage Noise
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
1963 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Overload Recovery
Like many IC power regulators, the LT1963-X has safe
operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.
The LT1963 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typically 40nV/√Hz over this frequency bandwidth for the
LT1963 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 14µVRMS for
the LT1963 increasing to 38µVRMS for the LT1963-3.3.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963-X. Power
supply ripple rejection must also be considered; the LT1963
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.
1963fa
11
LT1963 Series
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APPLICATIO S I FOR ATIO
Table 2. SO-8 Package, 8-Lead SO
Thermal Considerations
The power handling capability of the device is limited by the
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two
components listed above.
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
55°C/W
2
2
2
55°C/W
2500mm
2
2500mm
63°C/W
2500mm2
2500mm2
69°C/W
1000mm
225mm
2
100mm2
2500mm
2500mm
2
*Device is mounted on topside.
Table 3. SOT-223 Package, 3-Lead SOT-223
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
42°C/W
2
2
2
1000mm
2500mm
2500mm
42°C/W
225mm2
2500mm2
2500mm2
50°C/W
2
2
2
56°C/W
2
The LT1963 series regulators have internal thermal limiting designed to protect the device during overload
conditions. For continuous normal conditions, the maximum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also
be considered.
*Device is mounted on topside.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Table 1. Q Package, 5-Lead DD
COPPER AREA
TOPSIDE*
BACKSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
23°C/W
2
2
2
25°C/W
2
33°C/W
1000mm
125mm
2
2500mm
2
2500mm
*Device is mounted on topside
2500mm
2500mm
100mm
2
2500mm
2
2500mm
1000mm
1000mm
1000mm
49°C/W
1000mm2
0mm2
1000mm2
52°C/W
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 4°C/W
Calculating Junction Temperature
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX))
where,
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
1.41W(28°C/W) = 39.5°C
1963fa
12
LT1963 Series
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APPLICATIO S I FOR ATIO
TJMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1963 regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA (typically less than 100µA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
that can be plugged in backward.
The output of the LT1963 can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
When the IN pin of the LT1963 is forced below the OUT pin
or the OUT pin is pulled above the IN pin, input current will
typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
5.0
REVERSE OUTPUT CURRENT (mA)
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
LT1963
VOUT = VADJ
4.5
4.0
LT1963-1.8
VOUT = VFB
LT1963-2.5
VOUT = VFB
3.5
3.0
LT1963-3.3
VOUT = VFB
2.5
2.0
1.5
TJ = 25°C
VIN = 0V
CURRENT FLOWS
INTO OUTPUT PIN
1.0
0.5
0
0
1
2
3 4 5 6 7 8
OUTPUT VOLTAGE (V)
9
10
1963 F05
Figure 5. Reverse Output Current
1963fa
13
LT1963 Series
U
TYPICAL APPLICATIO S
SCR Pre-Regulator Provides Efficiency Over Line Variations
L1
500µH
L2
LT1963-3.3
IN
OUT
1N4148
10VAC AT
115VIN
+
SHDN
GND
10000µF
1k
90-140
VAC
FB
3.3VOUT
1.5A
+
22µF
34k*
10VAC AT
115VIN
1N4002
1N4002
12.1k*
+V
“SYNC”
2.4k
1N4002
TO ALL “+V”
POINTS
+
22µF
C1A
+
750Ω
200k
1N4148
1/2
LT1018
–
0.1µF
+V
C1B
750Ω
+V
+
1/2
LT1018
A1
+
0.033µF
1N4148
–
LT1006
–
10k
10k
10k
+V
1µF
+V
L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437
LT1004
1.2V
1963 TA03
U
PACKAGE DESCRIPTIO
Q Package
5-Lead Plastic DD Pak
(LTC DWG # 05-08-1461)
0.256
(6.502)
0.060
(1.524)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.165 – 0.180
(4.191 – 4.572)
15° TYP
0.060
(1.524)
0.183
(4.648)
0.059
(1.499)
TYP
0.330 – 0.370
(8.382 – 9.398)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
(
+0.008
0.004 –0.004
+0.203
0.102 –0.102
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.300
(7.620)
0.045 – 0.055
(1.143 – 1.397)
(
+0.012
0.143 –0.020
+0.305
3.632 –0.508
)
0.067
(1.70)
0.028 – 0.038 BSC
(0.711 – 0.965)
0.013 – 0.023
(0.330 – 0.584)
0.050 ± 0.012
(1.270 ± 0.305)
Q(DD5) 1098
1963fa
14
LT1963 Series
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
8
0.053 – 0.069
(1.346 – 1.752)
7
6
5
0.004 – 0.010
(0.101 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
2
3
4
SO8 1298
ST Package
3-Lead Plastic SOT-223
(LTC DWG # 05-08-1630)
0.248 – 0.264
(6.30 – 6.71)
0.114 – 0.124
(2.90 – 3.15)
10° – 16°
0.264 – 0.287
(6.70 – 7.30)
0.130 – 0.146
(3.30 – 3.71)
0.010 – 0.014
(0.25 – 0.36)
10°
MAX
0.071
(1.80)
MAX
10° – 16°
0.024 – 0.033
(0.60 – 0.84)
0.0008 – 0.0040
(0.0203 – 0.1016)
0.012
(0.31)
MIN
0.181
(4.60)
NOM
ST3 (SOT-233) 1298
0.033 – 0.041
(0.84 – 1.04)
0.0905
(2.30)
NOM
T Package
5-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1421)
0.390 – 0.415
(9.906 – 10.541)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.460 – 0.500
(11.684 – 12.700)
0.570 – 0.620
(14.478 – 15.748)
0.330 – 0.370
(8.382 – 9.398)
0.620
(15.75)
TYP
0.700 – 0.728
(17.78 – 18.491)
SEATING PLANE
0.152 – 0.202
0.260 – 0.320 (3.861 – 5.131)
(6.60 – 8.13)
0.095 – 0.115
(2.413 – 2.921)
0.155 – 0.195*
(3.937 – 4.953)
0.013 – 0.023
(0.330 – 0.584)
0.067
BSC
(1.70)
0.028 – 0.038
(0.711 – 0.965)
0.135 – 0.165
(3.429 – 4.191)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
1963fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1963 Series
U
TYPICAL APPLICATIO S
Adjustable Current Source
R1
0.01Ω
R5
0.01Ω
VIN > 2.7V
C1
10µF
+
R1
1k
LT1004-1.2
R2
80.6k
Paralleling of Regulators for Higher Output Current
LT1963-1.8
IN
OUT
SHDN
GND
R4
2.2k
R6
2.2k
+
LOAD
VIN > 3.7V
FB
LT1963-3.3
IN
OUT
C1
100µF
SHDN
GND
C3
1µF
R3
2k
IN
3
NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT
C2
3.3µF
–
R6
6.65k
SHDN
1
1/2
LT1366
LT1963
OUT
R7
470Ω
8
+
FB
R8
100k
R2
0.01Ω
2
3.3V
3A
C2
22µF
+
SHDN
GND
FB
R7
4.12k
4
1963 TA04
R3
2.2k
R4
2.2k
R5
1k
3
2
8
+
1/2
LT1366
–
4
1
C3
0.01µF
1963 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1120
125mA Low Dropout Regulator with 20µA IQ
Includes 2.5V Reference and Comparator
LT1121
150mA Micropower Low Dropout Regulator
30µA IQ, SOT-223 Package
LT1129
700mA Micropower Low Dropout Regulator
50µA Quiescent Current
LT1175
500mA Negative Low Dropout Micropower Regulator
45µA IQ, 0.26V Dropout Voltage, SOT-223 Package
LT1521
300mA Low Dropout Micropower Regulator with Shutdown
15µA IQ, Reverse Battery Protection
LT1529
3A Low Dropout Regulator with 50µA IQ
500mV Dropout Voltage
LT1772
Constant Frequency, Current Mode Step-Down DC/DC Controller
Up to 94% Efficiency, SOT-23 Package, 100% Duty Cycle
LTC1627
High Efficiency Synchronous Step-Down Switching Regulator
Burst ModeTM Operation, Monolithic, 100% Duty Cycle
LT1761 Series
100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23
20µA Quiescent Current, 20µVRMS Noise, SOT-23 Package
LT1762 Series
150mA, Low Noise, LDO Micropower Regulators
25µA Quiescent Current, 20µVRMS Noise, MSOP Package
LT1763 Series
500mA, Low Noise, LDO Micropower Regulators
30µA Quiescent Current, 20µVRMS Noise, SO-8 Package
LT1764 Series
3A, Fast Transient Response Low Dropout Regulator
340mV Dropout Voltage, 40µVRMS Noise
LT1962 Series
300mA, Low Noise, LDO Micropower Regulator
30µA Quiescent Current, 20µVRMS Noise, MSOP Package
Burst Mode is a trademark of Linear Technology Corporation.
1963fa
16
Linear Technology Corporation
LT/TP 0602 1.5K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2000
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