LTC1591/LTC1597 14-Bit and 16-Bit Parallel Low Glitch Multiplying DACs with 4-Quadrant Resistors DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ True 16-Bit Performance Over Industrial Temperature Range DNL and INL: 1LSB Max On-Chip 4-Quadrant Resistors Allow Precise 0V to 10V, 0V to – 10V or ±10V Outputs Pin Compatible 14- and 16-Bit Parts Asynchronous Clear Pin LTC1591/LTC1597: Reset to Zero Scale LTC1591-1/LTC1597-1: Reset to Midscale Glitch Impulse < 2nV-s 28-Lead SSOP Package Low Power Consumption: 10μW Typ Power-On Reset U APPLICATIO S ■ ■ ■ Process Control and Industrial Automation Direct Digital Waveform Generation Software-Controlled Gain Adjustment Automatic Test Equipment , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. U ■ The LTC®1591/LTC1597 are pin compatible, parallel input 14-bit and 16-bit multiplying current output DACs that operate from a single 5V supply. INL and DNL are accurate to 1LSB over the industrial temperature range in both 2- and 4quadrant multiplying modes. True 16-bit 4-quadrant multiplication is achieved with on-chip 4-quadrant multiplication resistors. These DACs include an internal deglitcher circuit that reduces the glitch impulse to less than 2nV-s (typ). The asynchronous CLR pin resets the LTC1591/LTC1597 to zero scale and LTC1591-1/LTC1597-1 to midscale. The LTC1591/LTC1597 are available in 28-pin SSOP and PDIP packages and are specified over the industrial temperature range. For serial interface 16-bit current output DACs refer to the LTC1595/LTC1596 data sheet. LTC1591/LTC1591-1 Integral Nonlinearity TYPICAL APPLICATIO 1.0 VREF = 10V VOUT = ±10V BIPOLAR INTEGRAL NONLINEARITY (LSB) 0.8 16-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components VREF + 5V 0.1μF LT®1468 2 RCOM R1 R2 LTC1597-1 REF WR LD CLR 9 8 28 –0.4 –0.6 ROFS 12288 8192 4096 DIGITAL INPUT CODE 16383 1591/97 TA02 RFB LTC1597/LTC1597-1 Integral Nonlinearity 15pF 1.0 RFB – 6 16-BIT DAC DGND WR LD CLR 0 –0.2 5 23 4 VCC ROFS AGND 10 TO 21, 24 TO 27 0.2 0 1 IOUT1 16 DATA INPUTS 0.4 –1.0 15pF 3 R1 0.6 –0.8 – 7 + VREF = 10V VOUT = ±10V BIPOLAR 0.8 LT1468 VOUT = –VREF TO VREF 22 1591/97 TA01 INTEGRAL NONLINEARITY (LSB) ■ 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1591/97 TA03 15917fa 1 LTC1591/LTC1597 U W W W ABSOLUTE MAXIMUM RATINGS (Note 1) VCC to AGND ............................................... – 0.5V to 7V VCC to DGND .............................................. – 0.5V to 7V AGND to DGND ............................................. VCC + 0.5V DGND to AGND ............................................. VCC + 0.5V REF, ROFS, RFB, R1, RCOM to AGND, DGND .......... ±25V Digital Inputs to DGND ............... – 0.5V to (VCC + 0.5V) IOUT1 to AGND ............................ – 0.5V to( VCC + 0.5V) Maximum Junction Temperature .......................... 125°C Operating Temperature Range LTC1591C/LTC1591-1C LTC1597C/LTC1597-1C .......................... 0°C to 70°C LTC1591I/LTC1591-1I LTC1597I/LTC1597-1I ....................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER INFORMATION ORDER PART NUMBER ORDER PART NUMBER TOP VIEW TOP VIEW REF 1 28 CLR RCOM 2 27 NC R1 3 26 NC ROFS 4 25 D0 RFB 5 24 D1 IOUT1 6 23 VCC AGND 7 22 DGND LD 8 21 D2 WR 9 20 D3 D13 10 19 D4 D12 11 LTC1591CG LTC1591CN LTC1591IG LTC1591IN LTC1591-1CG LTC1591-1CN LTC1591-1IG LTC1591-1IN REF 1 28 CLR RCOM 2 27 D0 R1 3 26 D1 ROFS 4 25 D2 RFB 5 24 D3 IOUT1 6 23 VCC AGND 7 22 DGND LD 8 21 D4 WR 9 20 D5 D15 10 19 D6 18 D5 D14 11 18 D7 D11 12 17 D6 D13 12 17 D8 D10 13 16 D7 D12 13 16 D9 D9 14 15 D8 D11 14 15 D10 G PACKAGE 28-LEAD PLASTIC SSOP N PACKAGE 28-LEAD NARROW PDIP TJMAX = 125°C, θJA = 95°C/ W (G) TJMAX = 125°C, θJA = 70°C/ W (N) G PACKAGE 28-LEAD PLASTIC SSOP N PACKAGE 28-LEAD NARROW PDIP TJMAX = 125°C, θJA = 95°C/ W (G) TJMAX = 125°C, θJA = 70°C/ W (N) LTC1597ACG LTC1597ACN LTC1597BCG LTC1597BCN LTC1597-1ACG LTC1597-1ACN LTC1597-1BCG LTC1597-1BCN LTC1597AIG LTC1597AIN LTC1597BIG LTC1597BIN LTC1597-1AIG LTC1597-1AIN LTC1597-1BIG LTC1597-1BIN Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. 15917fa 2 LTC1591/LTC1597 ELECTRICAL CHARACTERISTICS VCC = 5V ±10%, VREF = 10V, IOUT1 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted. SYMBOL PARAMETER LTC1591/-1 LTC1597B/-1B MIN TYP MAX MIN TYP MAX CONDITIONS LTC1597A/-1A MIN TYP MAX UNITS Accuracy INL DNL GE Resolution ● 14 16 16 Bits Monotonicity ● 14 16 16 Bits Integral Nonlinearity (Note 2) TA = 25°C TMIN to TMAX ● ±1 ±1 ±2 ±2 ±0.25 ±0.35 ±1 ±1 LSB LSB TA = 25°C TMIN to TMAX ● ±1 ±1 ±1 ±1 ±0.2 ±0.2 ±1 ±1 LSB LSB Unipolar Mode (Note 3) TA = 25°C TMIN to TMAX ● ±4 ±6 ±16 ±24 2 3 ±16 ±16 LSB LSB Bipolar Mode (Note 3) TA = 25°C TMIN to TMAX ● ±4 ±6 ± 16 ± 24 2 3 ± 16 ± 16 LSB LSB (Note 4) ΔGain/ΔTemperature ● 2 1 2 Differential Nonlinearity Gain Error Gain Temperature Coefficient PSRR OUT1 Leakage Current 2 1 ppm/°C TA = 25°C TMIN to TMAX ● ±3 ±5 ± 10 ± 16 ±5 ±8 LSB LSB (Note 5) TA = 25°C TMIN to TMAX ● ±5 ±15 ±5 ±15 ±5 ±15 nA nA VCC = 5V ±10 ● ±2 LSB/V Bipolar Zero-Scale Error ILKG 1 Power Supply Rejection Ratio ±0.1 ±1 ±0.4 ±2 ±0.4 VCC = 5V ±10%, VREF = 10V, IOUT1 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Reference Input RREF DAC Input Resistance (Unipolar) (Note 6) ● 4.5 6 10 kΩ R1/R2 R1/R2 Resistance (Bipolar) (Notes 6, 13) ● 9 12 20 kΩ ROFS, RFB Feedback and Offset Resistances (Note 6) ● 9 12 20 kΩ AC Performance (Note 4) THD Output Current Settling Time (Notes 7, 8) 1 μs Midscale Glitch Impulse (Note 12) 2 nV-s Digital-to-Analog Glitch Impulse (Note 9) 1 nV-s Multiplying Feedthrough Error VREF = ±10V, 10kHz Sine Wave 1 mVP-P Total Harmonic Distortion (Note 10) 108 dB Output Noise Voltage Density (Note 11) 10 nV/√Hz Harmonic Distortion (Digital Waveform Generation) Unipolar Mode (Note 14) 2nd Harmonic 3rd Harmonic SFDR 94 101 94 dB dB dB Bipolar Mode (Note 14) 2nd Harmonic 3rd Harmonic SFDR 94 101 94 dB dB dB 15917fa 3 LTC1591/LTC1597 ELECTRICAL CHARACTERISTICS The ● denotes specifications that apply over the full operating temperature range. VCC = 5V ±10%, VREF = 10V, IOUT1 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 115 70 130 80 pF pF Analog Outputs (Note 4) COUT Output Capacitance (Note 4) DAC Register Loaded to All 1s: COUT1 DAC Register Loaded to All 0s: COUT1 ● ● Digital Inputs VIH Digital Input High Voltage ● VIL Digital Input Low Voltage ● IIN Digital Input Current ● CIN Digital Input Capacitance 2.4 V 0.001 ● (Note 4) VIN = 0V 0.8 V ±1 μA 8 pF Timing Characteristics tDS Data to WR Setup Time ● 60 ns tDH Data to WR Hold Time ● 0 ns tWR WR Pulse Width ● 60 ns tLD LD Pulse Width ● 110 ns tCLR Clear Pulse Width ● 60 ns tLWD WR to LD Delay Time ● 0 ns ● 4.5 Power Supply VDD Supply Voltage IDD Supply Current Digital Inputs = 0V or VCC Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: ±1LSB = ±0.006% of full scale = ±61ppm of full scale for the LTC1591/LTC1591-1. ±1LSB = ±0.0015% of full scale = ±15.3ppm of full scale for the LTC1597/LTC1597-1. Note 3: Using internal feedback resistor. Note 4: Guaranteed by design, not subject to test. Note 5: I(OUT1) with DAC register loaded to all 0s. Note 6: Typical temperature coefficient is 100ppm/°C. Note 7: IOUT1 load = 100Ω in parallel with 13pF. Note 8: To 0.006% for a full-scale change, measured from the rising edge of LD for the LTC1591/LTC1591-1. To 0.0015% for a full-scale change, measured from the rising edge of LD for the LTC1597/LTC1597-1. ● 5 5.5 V 10 μA Note 9: VREF = 0V. DAC register contents changed from all 0s to all 1s or all 1s to all 0s. Note 10: VREF = 6VRMS at 1kHz. DAC register loaded with all 1s. Note 11: Calculation from en = √4kTRB where: k = Boltzmann constant (J/°K), R = resistance (Ω), T = temperature (°K), B = bandwidth (Hz). Note 12: Midscale transition code: 01 1111 1111 1111 to 10 0000 0000 0000 for the LTC1591/LTC1591-1 and 0111 1111 1111 1111 to 1000 0000 0000 0000 for the LTC1597/LTC1597-1. Note 13: R1 and R2 are measured between R1 and RCOM, REF and RCOM. Note 14: Measured using the LT1468 op amp in unipolar mode for I/V converter and LT1468 I/V and LT1001 reference inverter in bipolar mode. Sample Rate = 50kHz, Signal Frequency = 1kHz, VREF = 5V, TA = 25°C. 15917fa 4 LTC1591/LTC1597 U W TYPICAL PERFOR A CE CHARACTERISTICS (LTC1591/LTC1597) Midscale Glitch Impulse 40 Full-Scale Settling Waveform – 40 SIGNAL/(NOISE + DISTORTION) (dB) USING AN LT1468 CFEEDBACK = 30pF VREF = 10V 30 LD PULSE 5V/DIV 20 10 0 GATED SETTLING WAVEFORM 500μV/DIV 1nV-s TYPICAL –10 –20 0.2 0.4 0.8 0.6 TIME (μs) 1.0 – 50 VCC = 5V USING AN LT1468 CFEEDBACK = 30pF REFERENCE = 6VRMS – 60 – 70 – 80 500kHz FILTER – 90 80kHz FILTER –100 USING LT1468 OP AMP CFEEDBACK = 20pF 0V to 10V STEP 30kHz FILTER –110 10 100 1k 10k FREQUENCY (Hz) Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Zeros – 40 Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Ones – 40 SIGNAL/(NOISE + DISTORTION) (dB) VCC = 5V USING TWO LT1468s CFEEDBACK = 15pF REFERENCE = 6VRMS – 50 – 60 – 70 – 80 500kHz FILTER – 90 –100 30kHz FILTER 10 100 VCC = 5V USING TWO LT1468s CFEEDBACK = 15pF REFERENCE = 6VRMS – 50 – 60 – 70 – 80 500kHz FILTER – 90 80kHz FILTER –100 80kHz FILTER –110 1k 10k FREQUENCY (Hz) 30kHz FILTER –110 10 100k 100 1k 10k FREQUENCY (Hz) Supply Current vs Input Voltage Logic Threshold vs Supply Voltage 3.0 VCC = 5V ALL DIGITAL INPUTS TIED TOGETHER 4 2.5 3 2 1 0 100k 1591/97 G05 1591/97 G04 5 100k 1591/97 G03 1591/97 G01 LOGIC THRESHOLD (V) 0 SIGNAL/(NOISE + DISTORTION) (dB) – 40 1591/97 G02 500ns/DIV – 30 SUPPLY CURRENT (mA) OUTPUT VOLTAGE (mV) Unipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency 2.0 1.5 1.0 0.5 0 0 1 3 2 INTPUT VOLTAGE (V) 4 5 1591/97 G06 0 1 5 2 3 4 SUPPLY VOLTAGE (V) 6 7 1591/97 G07 15917fa 5 LTC1591/LTC1597 U W TYPICAL PERFOR A CE CHARACTERISTICS (LTC1591) Differential Nonlinearity (DNL) 1.0 1.0 0.8 0.8 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 INTEGRAL NONLINEARITY (LSB) 1.0 DIFFERENTIAL NONLINEARITY (LSB) INTEGRAL NONLINEARITY (LSB) Integral Nonlinearity (INL) 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 12280 8192 4096 DIGITAL INPUT CODE 0 16383 12280 8192 4096 DIGITAL INPUT CODE 0.4 0.2 0 – 0.2 – 0.4 – 0.6 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 16383 1591 G01 Differential Nonlinearity vs Reference Voltage in Bipolar Mode 1.0 1.0 DIFFERENTIAL NONLINEARITY (LSB) 0.8 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 0.8 DIFFERENTIAL NONLINEARITY (LSB) 1.0 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 10 8 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 10 Differential Nonlinearity vs Supply Voltage in Unipolar Mode 1.0 0.8 0.8 0.2 VREF = 10V VREF = 2.5V 0 VREF = 10V VREF = 2.5V – 0.2 – 0.4 – 0.6 – 0.8 0.6 0.4 VREF = 10V VREF = 2.5V 0.2 0 VREF = 2.5V – 0.2 VREF = 10V – 0.4 – 0.6 – 0.8 –1.0 –1.0 0 1 4 3 2 5 SUPPLY VOLTAGE (V) 6 7 1591 G07 6 DIFFERENTIAL NONLINEARITY (LSB) 1.0 0.8 INTEGRAL NONLINEARITY (LSB) 1.0 0.4 10 1591 G06 Integral Nonlinearity vs Supply Voltage in Bipolar Mode 0.6 8 1591 G05 1591 G04 Integral Nonlinearity vs Supply Voltage in Unipolar Mode 10 1591 G03 Differential Nonlinearity vs Reference Voltage in Unipolar Mode 0.6 8 1591 G02 Integral Nonlinearity vs Reference Voltage in Bipolar Mode INTEGRAL NONLINEARITY (LSB) 0.6 – 0.8 –1.0 0 INTEGRAL NONLINEARITY (LSB) Integral Nonlinearity vs Reference Voltage in Unipolar Mode 0.6 0.4 VREF = 10V VREF = 2.5V 0.2 0 VREF = 10V VREF = 2.5V – 0.2 – 0.4 – 0.6 – 0.8 –1.0 0 1 4 3 2 5 SUPPLY VOLTAGE (V) 6 7 1591 G08 0 1 4 3 2 5 SUPPLY VOLTAGE (V) 6 7 1591 G09 15917fa LTC1591/LTC1597 U W TYPICAL PERFOR A CE CHARACTERISTICS (LTC1591) Differential Nonlinearity vs Supply Voltage in Bipolar Mode Unipolar Multiplying Mode Frequency Response vs Digital Code 0 ALL BITS ON D13 ON D12 ON D11 ON D10 ON D9 ON D8 ON D7 ON D6 ON D5 ON D4 ON D3 ON D2 ON D1 ON D0 ON 0.8 – 20 0.6 0.4 0.2 ATTENUATION (dB) DIFFERENTIAL NONLINEARITY (LSB) 1.0 VREF = 10V VREF = 2.5V 0 VREF = 10V VREF = 2.5V – 0.2 – 0.4 – 0.6 – 40 – 60 – 80 – 100 – 0.8 ALL BITS OFF –1.0 0 1 4 3 2 5 SUPPLY VOLTAGE (V) 7 6 – 120 100 1k 1M 10k 100k FREQUENCY (Hz) 1591G11 1591 G10 VREF 30pF 3 2 1 4 5 6 – LT1468 + LTC1591 7 22 – 40 – 60 – 80 ALL BITS OFF D12 ON D12 AND D11 ON D12 TO D10 ON D12 TO D9 ON D12 TO D8 ON D12 TO D7 ON D12 TO D6 ON D12 TO D5 ON D12 TO D4 ON D12 TO D3 ON D12 TO D2 ON D12 TO D1 ON D12 TO D0 ON D13 ON* – 20 ATTENUATION (dB) – 20 ATTENUATION (dB) 0 ALL BITS ON D13 AND D12 ON D13 AND D11 ON D13 AND D10 ON D13 AND D9 ON D13 AND D8 ON D13 AND D7 ON D13 AND D6 ON D13 AND D5 ON D13 AND D4 ON D13 AND D3 ON D13 AND D2 ON D13 AND D1 ON D13 AND D0 ON D13 ON* – 40 – 60 – 80 CODES FROM MIDSCALE TO FULL SCALE – 100 CODES FROM MIDSCALE TO ZERO SCALE – 100 10 100 1k 10k 100k FREQUENCY (Hz) 1M VOUT Bipolar Multiplying Mode Frequency Response vs Digital Code Bipolar Multiplying Mode Frequency Response vs Digital Code 0 10M 100 10 100k 1k 10k FREQUENCY (Hz) 1M *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 84dB TYPICAL (–70dB MAX) VREF VREF + + LT1468 – LT1468 – VOUT VOUT 12pF 12pF 12pF 12pF 15pF 15pF 3 10M 1591G13 1591 G12 *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 84dB TYPICAL (–70dB MAX) 10M 2 1 4 5 LTC1591 3 6 7 22 – LT1468 + 1 4 5 2 LTC1591 6 7 22 – LT1468 + 15917fa 7 LTC1591/LTC1597 U W TYPICAL PERFOR A CE CHARACTERISTICS (LTC1597) Differential Nonlinearity (DNL) 1.0 1.0 0.8 0.8 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 INTEGRAL NONLINEARITY (LSB) 1.0 DIFFERENTIAL NONLINEARITY (LSB) 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 0 49152 32768 16384 DIGITAL INPUT CODE 0 65535 49152 32768 16384 DIGITAL INPUT CODE 1597 G01 0.4 0.2 0 – 0.2 – 0.4 – 0.6 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 65535 1597 G02 0.8 0.8 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 DIFFERENTIAL NONLINEARITY (LSB) 1.0 DIFFERENTIAL NONLINEARITY (LSB) 1.0 0.8 0.4 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 10 1597 G04 1.5 INTEGRAL NONLINEARITY (LSB) 2.0 0.8 0.6 VREF = 10V 0.2 VREF = 2.5V 0 VREF = 10V – 0.2 – 0.6 4 5 6 SUPPLY VOLTAGE (V) 7 1597 G07 8 – 0.6 – 0.8 8 10 1597 G06 1.0 1.0 0.5 VREF = 10V VREF = 2.5V 0 VREF = 10V VREF = 2.5V –1.0 –2.0 –1.0 3 – 0.4 Differential Nonlinearity vs Supply Voltage in Unipolar Mode –1.5 – 0.8 2 0 – 0.2 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 10 – 0.5 VREF = 2.5V – 0.4 0.4 0.2 Integral Nonlinearity vs Supply Voltage in Bipolar Mode 1.0 0.4 8 0.6 1597 G05 Integral Nonlinearity vs Supply Voltage in Unipolar Mode 10 Differential Nonlinearity vs Reference Voltage in Bipolar Mode 1.0 0.6 8 1597 G03 Differential Nonlinearity vs Reference Voltage in Unipolar Mode Integral Nonlinearity vs Reference Voltage in Bipolar Mode INTEGRAL NONLINEARITY (LSB) 0.6 – 0.8 –1.0 DIFFERENTIAL NONLINEARITY (LSB) INTEGRAL NONLINEARITY (LSB) Integral Nonlinearity (INL) INTEGRAL NONLINEARITY (LSB) Integral Nonlinearity vs Reference Voltage in Unipolar Mode 0.8 0.6 0.4 VREF = 10V VREF = 2.5V 0.2 0 – 0.2 VREF = 10V VREF = 2.5V – 0.4 – 0.6 – 0.8 –1.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1597 G08 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1597 G09 15917fa LTC1591/LTC1597 U W TYPICAL PERFOR A CE CHARACTERISTICS (LTC1597) Unipolar Multiplying Mode Frequency Response vs Digital Code Differential Nonlinearity vs Supply Voltage in Bipolar Mode 0 ALL BITS ON D15 ON D14 ON D13 ON D12 ON D11 ON D10 ON D9 ON D8 ON D7 ON D6 ON D5 ON D4 ON D3 ON D2 ON D1 ON D0 ON 0.8 – 20 0.6 0.4 0.2 ATTENUATION (dB) DIFFERENTIAL NONLINEARITY (LSB) 1.0 VREF = 10V 0 VREF = 2.5V – 0.2 VREF = 10V VREF = 2.5V – 0.4 – 0.6 – 40 – 60 – 80 – 100 – 0.8 ALL BITS OFF –1.0 7 4 5 6 SUPPLY VOLTAGE (V) 3 2 – 120 100 1k 1M 10k 100k FREQUENCY (Hz) 10M 1597G11 1597 G10 VREF 30pF 3 2 1 4 5 6 – LT1468 + LTC1597 7 22 Bipolar Multiplying Mode Frequency Response vs Digital Code ATTENUATION (dB) 0 ALL BITS ON D15 AND D14 ON D15 AND D13 ON D15 AND D12 ON D15 AND D11 ON D15 AND D10 ON D15 AND D9 ON D15 AND D8 ON D15 AND D7 ON D15 AND D6 ON D15 AND D5 ON D15 AND D4 ON D15 AND D3 ON D15 AND D2 ON – 20 – 40 – 60 – 80 100 10 ALL BITS OFF D14 ON D14 AND D13 ON D14 TO D12 ON D14 TO D11 ON D14 TO D10 ON D14 TO D9 ON D14 TO D8 ON D14 TO D7 ON D14 TO D6 ON – 20 CODES FROM MIDSCALE TO FULL SCALE – 40 – 60 D14 TO D5 ON D14 TO D4 ON D14 TO D3 ON D14 TO D2 ON D14 TO D1 ON – 80 D15 AND D1 ON D15 AND D0 ON D15 ON* – 100 Bipolar Multiplying Mode Frequency Response vs Digital Code ATTENUATION (dB) 0 1M 10 10M CODES FROM MIDSCALE TO ZERO SCALE D14 TO D0 ON D15 ON* – 100 100k 1k 10k FREQUENCY (Hz) VOUT 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 1597 G13 1597 G12 *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) VREF VREF + + LT1468 – 12pF LT1468 – VOUT 12pF 12pF VOUT 12pF 15pF 3 2 1 4 5 LTC1597 6 7 22 – LT1468 + 15pF 3 2 1 4 5 LTC1597 6 7 22 – LT1468 + 15917fa 9 LTC1591/LTC1597 U U U PIN FUNCTIONS LTC1591 REF (Pin 1): Reference Input and 4-Quadrant Resistor R2. Typically ±10V, accepts up to ±25V. In 2-Quadrant mode this is the reference input. In 4-quadrant mode, this pin is driven by external inverting reference amplifier. RCOM (Pin 2): Center Tap Point of the Two 4-Quadrant Resistors R1 and R2. Normally tied to the inverting input of an external amplifier in 4-quadrant operation, otherwise shorted to the REF pin. See Figures 1a and 2a. R1 (Pin 3): 4-Quadrant Resistor R1. In 2-quadrant operation short to the REF pin. In 4-quadrant mode tie to ROFS (Pin 4). ROFS (Pin 4): Bipolar Offset Resistor. Typically swings ±10V, accepts up to ±25V. In 2-quadrant operation tie to RFB. In 4-quadrant operation tie to R1. IOUT1 (Pin 6): DAC Current Output. Tie to the inverting input of the current to voltage converter op amp. AGND (Pin 7): Analog Ground. Tie to ground. LD (Pin 8): DAC Digital Input Load Control Input. When LD is taken to a logic high, data is loaded from the input register into the DAC register, updating the DAC output. WR (Pin 9):DAC Digital Write Control Input. When WR is taken to a logic low, data is loaded from the digital input pins into the 14-bit wide input register. DB13 to D2 (Pins 10 to 21): Digital Input Data Bits. DGND (Pin 22): Digital Ground. Tie to ground. VCC (Pin 23): The Positive Supply Input. 4.5V ≤ VCC ≥ 5.5V. Requires a bypass capacitor to ground. DB1, DB0 (Pins 24, 25): Digital Input Data Bits. RFB (Pin 5): Feedback Resistor. Normally tied to the output of the current to voltage converter op amp. Swings to ±VREF. VREF is typically ±10V. NC (Pins 26, 27): No Connect. LTC1597 IOUT1 (Pin 6): DAC Current Output. Tie to the inverting input of the current to voltage converter op amp. REF (Pin 1): Reference Input and 4-Quadrant Resistor R2. Typically ±10V, accepts up to ±25V. In 2-Quadrant mode this is the reference input. In 4-quadrant mode, this pin is driven by external inverting reference amplifier. RCOM (Pin 2): Center Tap Point of the Two 4-Quadrant Resistors R1 and R2. Normally tied to the inverting input of an external amplifier in 4-quadrant operation, otherwise shorted to the REF pin. See Figures 1b and 2b. R1 (Pin 3): 4-Quadrant Resistor R1. In 2-quadrant operation short to the REF pin. In 4-quadrant mode tie to ROFS (Pin 4). ROFS (Pin 4): Bipolar Offset Resistor. Typically swings ±10V, accepts up to ±25V. In 2-quadrant operation tie to RFB. In 4-quadrant operation tie to R1. RFB (Pin 5): Feedback Resistor. Normally tied to the output of the current to voltage converter op amp. Swings to ±VREF. VREF is typically ±10V. CLR (Pin 28):Digital Clear Control Function for the DAC. When CLR is taken to a logic low, it sets the DAC output and all internal registers to zero code for the LTC1591 and midscale code for the LTC1591-1. AGND (Pin 7): Analog Ground. Tie to ground. LD (Pin 8): DAC Digital Input Load Control Input. When LD is taken to a logic high, data is loaded from the input register into the DAC register, updating the DAC output. WR (Pin 9):DAC Digital Write Control Input. When WR is taken to a logic low, data is loaded from the digital input pins into the 16-bit wide input register. DB15 to D4 (Pins 10 to 21): Digital Input Data Bits. DGND (Pin 22): Digital Ground. Tie to ground. VCC (Pin 23): The Positive Supply Input. 4.5V ≤ VCC ≥ 5.5V. Requires a bypass capacitor to ground. DB3 to DB0 (Pins 24 to 27): Digital Input Data Bits. CLR (Pin 28):Digital Clear Control Function for the DAC. When CLR is taken to a logic low, it sets the DAC output and all internal registers to zero code for the LTC1597 and midscale code for the LTC1597-1. 15917fa 10 LTC1591/LTC1597 TRUTH TABLE Table 1 CONTROL INPUTS CLR WR LD REGISTER OPERATION 0 X X Reset Input and DAC Register to All 0s for LTC1591/LTC1597 and Midscale for LTC1591-1/LTC1597-1 (Asynchronous Operation) 1 0 0 Load Input Register with All 14/16 Data Bits 1 1 1 Load DAC Register with the Contents of the Input Register 1 0 1 1 Input and DAC Register Are Transparent CLK = LD and WR Tied Together. The 14/16 Data Bits Are Loaded into the Input Register on the Falling Edge of the CLK and Then Loaded into the DAC Register on the Rising Edge of the CLK 1 1 0 No Register Operation W BLOCK DIAGRA SM LTC1591 48k REF 48k 5 RFB 1 12k 48k RCOM 2 48k 48k 48k 48k 48k 96k 48k 96k 96k 96k 12k 12k 4 ROFS 12k R1 3 6 IOUT1 VCC 23 7 AGND DECODER LD 8 WR 9 LOAD 22 DGND D13 (MSB) D12 D10 D11 D9 ••• DAC REGISTER D0 (LSB) INPUT REGISTER WR RST 28 CLR RST 1591 BD 10 11 D13 D12 •••• 21 24 25 26 27 D2 D1 D0 NC NC 15917fa 11 LTC1591/LTC1597 W BLOCK DIAGRA SM LTC1597 48k REF 48k 5 RFB 1 12k 48k RCOM 2 48k 48k 48k 48k 48k 96k 48k 96k 96k 96k 12k 12k 4 ROFS 12k R1 3 6 IOUT1 VCC 23 7 AGND DECODER LOAD LD 8 WR 9 22 DGND D15 (MSB) D14 D12 D13 D11 ••• DAC REGISTER D0 (LSB) RST INPUT REGISTER WR 28 CLR RST 1597 BD 10 11 D15 D14 •••• 21 24 25 26 27 D4 D3 D2 D1 D0 WU W TI I G DIAGRA tWR WR DATA tDS tDH tLWD LD tLD tCLR CLR 1591/97TD 15917fa 12 LTC1591/LTC1597 U U W U APPLICATIONS INFORMATION Description Digital Section The LTC1591/LTC1597 are 14-/16-bit multiplying, current output DACs with a full parallel 14-/16-bit digital interface. The devices operate from a single 5V supply and provide both unipolar 0V to – 10V or 0V to 10V and bipolar ±10V output ranges from a 10V or –10V reference input. They have three additional precision resistors on chip for bipolar operation. Refer to the block diagrams regarding the following description. The LTC1591/LTC1597 are 14-/16-bit wide full parallel data bus inputs. The devices are double-buffered with two 14-/16-bit registers. The double-buffered feature permits the update of several DACs simultaneously. The input register is loaded directly from a 16-bit microprocessor bus when the WR pin is brought to a logic low level. The second register (DAC register) is updated with the data from the input register when the LD pin is brought to a logic high level. Updating the DAC register updates the DAC output with the new data. To make both registers transparent for flowthrough mode, tie WR low and LD high. However, this defeats the deglitcher operation and output glitch impulse may increase. The deglitcher is activated on the rising edge of the LD pin. The versatility of the interface also allows the use of the input and DAC registers in a master slave or edge-triggered configuration. This mode of operation occurs when WR and LD are tied together. The asynchronous clear pin resets the LTC1591/LTC1597 to zero scale and the LTC1591-1/ LTC1597-1 to midscale. CLR resets both the input and DAC registers. These devices also have a power-on reset. Table 1 shows the truth table for the LTC1591/LT1597. The 14-/16-bit DACs consist of a precision R-2R ladder for the 11/13LSBs. The 3MSBs are decoded into seven segments of resistor value R. Each of these segments and the R-2R ladder carries an equally weighted current of one eighth of full scale. The feedback resistor RFB and 4-quadrant resistor ROFS have a value of R/4. 4-quadrant resistors R1 and R2 have a magnitude of R/4. R1 and R2 together with an external op amp (see Figure 2) inverts the reference input voltage and applies it to the 14-/16-bit DAC input REF, in 4-quadrant operation. The REF pin presents a constant input impedance of R/8 in unipolar mode and R/12 in bipolar mode. The output impedance of the current output pin IOUT1 varies with DAC input code. The IOUT1 capacitance due to the NMOS current steering switches also varies with input code from 70pF to 115pF. An added feature of these devices, especially for waveform generation, is a proprietary deglitcher that reduces glitch energy to below 2nV-s over the DAC output voltage range. Unipolar Mode (2-Quadrant Multiplying, VOUT = 0V to – VREF) The LTC1591/LTC1597 can be used with a single op amp to provide 2-quadrant multiplying operation as shown in Figure 1. With a fixed – 10V reference, the circuits shown give a precision unipolar 0V to 10V output swing. 5V 0.1μF VREF 2 3 R1 RCOM R1 1 REF 23 VCC 4 5 ROFS RFB ROFS R2 33pF RFB IOUT1 14 DATA INPUTS LTC1591 14-BIT DAC 10 TO 21, 24, 25 DGND WR LD CLR WR LD CLR 9 8 28 – 6 AGND NC 26 NC 22 Unipolar Binary Code Table 7 + LT1001 VOUT = 0V TO –VREF DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 0000 0000 ANALOG OUTPUT VOUT 1111 0000 0000 0000 1111 0000 0000 0000 11 00 01 00 27 –VREF (16,383/16,384) –VREF (8,192/16,384) = –VREF/ 2 –VREF (1/16,384) 0V 1591/97 F01a Figure 1a. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to – VREF 15917fa 13 LTC1591/LTC1597 U U W U APPLICATIONS INFORMATION 5V 0.1μF VREF 2 3 R1 RCOM R1 R2 1 REF 23 VCC 4 5 ROFS RFB ROFS 33pF RFB IOUT1 16 DATA INPUTS LTC1597 10 TO 21, 24 TO 27 – 6 16-BIT DAC AGND DGND 7 22 WR LD CLR WR LD CLR 9 8 Unipolar Binary Code Table + LT1001 VOUT = 0V TO –VREF DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 0000 0000 ANALOG OUTPUT VOUT 1111 0000 0000 0000 1111 0000 0000 0000 1111 0000 0001 0000 28 –VREF (65,535/65,536) –VREF (32,768/65,536) = –VREF/2 –VREF (1/65,536) 0V 1591/97 F01b Figure 1b. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to – VREF Bipolar Mode (4-Quadrant Multiplying, VOUT = – VREF to VREF) The LTC1591/LTC1597 contain on chip all the 4-quadrant resistors necessary for bipolar operation. 4-quadrant multiplying operation can be achieved with a minimum of external components, a capacitor and a dual op amp, as shown in Figure 2. With a fixed 10V reference, the circuit shown gives a precision bipolar – 10V to 10V output swing. Op Amp Selection Because of the extremely high accuracy of the 14-/16-bit LTC1591/LTC1597, thought should be given to op amp selection in order to achieve the exceptional performance of which the part is capable. Fortunately, the sensitivity of INL and DNL to op amp offset has been greatly reduced compared to previous generations of multiplying DACs. Op amp offset will contribute mostly to output offset and gain and will have minimal effect on INL and DNL. For the LTC1597, a 500μV op amp offset will cause about 0.55LSB INL degradation and 0.15LSB DNL degradation with a 10V full-scale range. The main effects of op amp offset will be a degradation of zero-scale error equal to the op amp offset, and a degradation of full-scale error equal to twice the op amp offset. For the LTC1597, the same 500μV op amp offset (2mV offset for LTC1591) will cause a 3.3LSB zero-scale error and a 6.5LSB full-scale error with a 10V full-scale range. Op amp input bias current (IBIAS) contributes only a zeroscale error equal to IBIAS(RFB/ROFS) = IBIAS(6k). For a thorough discussion of 16-bit DAC settling time and op amp selection, refer to Application Note 74, “Component and Measurement Advances Ensure 16-Bit DAC Settling Time.” Reference Input and Grounding For optimum performance the reference input of the LTC1597 should be driven by a source impedance of less than 1kΩ. However, these DACs have been designed to minimize source impedance effects. An 8kΩ source impedance degrades both INL and DNL by 0.2LSB. As with any high resolution converter, clean grounding is important. A low impedance analog ground plane and star grounding should be used. AGND must be tied to the star ground with as low a resistance as possible. 15917fa 14 LTC1591/LTC1597 U U W U APPLICATIONS INFORMATION VREF + 5V 0.1μF 1/2 LT1112 – 2 3 R1 1 REF RCOM R1 5 23 4 VCC ROFS ROFS R2 RFB IOUT1 14 DATA INPUTS 1/2 LT1112 AGND 10 TO 21, 24, 25 WR LD CLR 9 NC 28 8 26 + 7 VOUT = –VREF TO VREF 22 DGND WR LD CLR – 6 14-BIT DAC LTC1591-1 Bipolar Offset Binary Code Table 33pF RFB NC DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 1000 0111 0000 ANALOG OUTPUT VOUT 1111 0000 0000 1111 0000 1111 0000 0000 1111 0000 11 01 00 11 00 27 VREF (8,191/8,192) VREF (1/8,192) 0V –VREF (1/8,192) –VREF 1591/97 F02a Figure 2a. Bipolar Operation (4-Quadrant Multiplication) VOUT = – VREF to VREF VREF + 5V 0.1μF 1/2 LT1112 – 2 3 R1 1 REF RCOM R1 ROFS R2 5 23 4 VCC ROFS RFB IOUT1 16 DATA INPUTS LTC1597-1 1/2 LT1112 16-BIT DAC DGND WR LD CLR WR LD CLR 9 8 – 6 AGND 10 TO 21, 24 TO 27 Bipolar Offset Binary Code Table 33pF RFB 22 7 + VOUT = –VREF TO VREF DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 1000 0111 0000 ANALOG OUTPUT VOUT 1111 0000 0000 1111 0000 28 1111 0000 0000 1111 0000 1111 0001 0000 1111 0000 VREF (32,767/32,768) VREF (1/32,768) 0V –VREF (1/32,768) –VREF 1591/97 F02b Figure 2b. Bipolar Operation (4-Quadrant Multiplication) VOUT = – VREF to VREF 15917fa 15 LTC1591/LTC1597 U TYPICAL APPLICATIONS Noninverting Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to VREF + 5V 0.1μF 1/2 LT1112 – 2 1 RCOM VREF REF 5 23 4 VCC ROFS RFB 33pF 3 R1 R1 R2 ROFS RFB IOUT1 16 DATA INPUTS LTC1597 1/2 LT1112 DGND WR LD CLR WR LD CLR 16-BIT DAC AGND 10 TO 21, 24 TO 27 9 8 – 6 7 + VOUT = 0V TO VREF 22 1591/97 F06 28 15917fa 16 LTC1591/LTC1597 U TYPICAL APPLICATIONS 16-Bit VOUT DAC Programmable Unipolar/Bipolar Configuration 16 15 14 LTC203AC UNIPOLAR/ BIPOLAR 1 2 3 + 15V 2 – LT1468 LT1236A-10 4 6 + 5V 0.1μF – 3 2 R1 RCOM R1 LT1001 R2 1 23 REF VCC 4 ROFS ROFS 5 RFB 15pF RFB IOUT1 16 DATA INPUTS LTC1597 DGND WR LD CLR WR LD CLR 16-BIT DAC AGND 10 TO 21, 24 TO 27 9 8 – 6 7 + LT1468 VOUT 22 1591/97 F04 28 15917fa 17 LTC1591/LTC1597 U TYPICAL APPLICATIONS Digital Waveform Generator 15V 2 LT1236A-10 4 6 + 5V LT1001 0.1μF – FREQUENCY CONTROL SERIAL OR BYTE LOAD REGISTER n PARALLEL n DELTA PHASE REGISTER M n = 24 TO 32 BITS PHASE ACCUMULATOR n 3 2 R1 RCOM R1 R2 1 REF 5 23 4 VCC ROFS ROFS RFB 15pF RFB IOUT1 Σ n PHASE REGISTER n SIN ROM LOOKUP TABLE 16 DATA INPUTS LTC1597 – 6 16-BIT DAC AGND 7 + LT1468 LOWPASS FILTER fO = CLOCK PHASE TRUNCATION 16 BITS 10 TO 21, 24 TO 27 DGND WR LD CLR 9 8 22 (M)(fC) 2n 1591/97 F05 28 fO 15917fa 18 LTC1591/LTC1597 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 0.397 – 0.407* (10.07 – 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.301 – 0.311 (7.65 – 7.90) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.205 – 0.212** (5.20 – 5.38) 0.068 – 0.078 (1.73 – 1.99) 0° – 8° 0.0256 (0.65) BSC 0.022 – 0.037 (0.55 – 0.95) 0.005 – 0.009 (0.13 – 0.22) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.002 – 0.008 (0.05 – 0.21) 0.010 – 0.015 (0.25 – 0.38) G28 SSOP 0694 N Package 28-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.370* (34.789) MAX 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.255 ± 0.015* (6.477 ± 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) 0.020 (0.508) MIN 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 ) 0.125 (3.175) MIN 0.065 (1.651) TYP 0.005 (0.127) MIN 0.100 ± 0.010 (2.540 ± 0.254) 0.018 ± 0.003 (0.457 ± 0.076) N28 1197 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 15917fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC1591/LTC1597 U TYPICAL APPLICATION 17-Bit Sign Magnitude DAC with Bipolar Zero Error of 140μV (0.92LSB at 17 Bits) at 25°C 16 15 14 LTC203AC 15V 2 1 LT1236A-10 4 2 3 6 + 5V 0.1μF – LT1468 15pF SIGN BIT 3 2 R1 RCOM R1 1 REF 5 23 4 VCC ROFS R2 ROFS RFB 20pF RFB IOUT1 16 DATA INPUTS LTC1597 16-BIT DAC AGND 10 TO 21, 24 TO 27 DGND WR LD CLR WR LD CLR 9 8 – 6 7 + LT1468 VOUT 22 1591/97 F03 28 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Op Amps LT1001 Precision Operational Amplifier Low Offset, Low Drift LT1112 Dual Low Power, Precision Picoamp Input Op Amp Low Offset, Low Drift LT1468 90MHz, 22V/μs, 16-Bit Accurate Op Amp Precise, 1μs Settling to 0.0015% LTC1595/LTC1596 Serial 16-Bit Current Output DACs Low Glitch, ±1LSB Maximum INL, DNL LTC1650 Serial 16-Bit Voltage Output DAC Low Noise and Glitch Rail-to-Rail VOUT LTC1658 Serial 14-Bit Voltage Output DAC Low Power, 8-Lead MSOP Rail-to-Rail VOUT LTC1418 14-Bit, 200ksps 5V Sampling ADC 16mW Dissipation, Serial and Parallel Outputs LTC1604 16-Bit, 333ksps Sampling ADC ±2.5V Input, SINAD = 90dB, THD = 100dB LTC1605 Single 5V, 16-Bit 100ksps ADC Low Power, ±10V Inputs Precision Reference Ultralow Drift, 5ppm/°C, High Accuracy 0.05% DACs ADCs References LT1236 15917fa 20 Linear Technology Corporation LT 0507 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com © LINEAR TECHNOLOGY CORPORATION 1998