EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description Features ! ! ! ! ! ! ! ! Fully integrated PLL-stabilized VCO Frequency range from 850 MHz to 930 MHz Single-ended RF output FSK through crystal pulling allows modulation from DC to 40 kbit/s High FSK deviation possible for wideband data transmission ASK achieved by on/off keying of internal power amplifier up to 40 kbit/s Wide power supply range from 1.95 V to 5.5 V Very low standby current Microcontroller clock output On-chip low voltage detector High over-all frequency accuracy FSK deviation and center frequency independently adjustable Adjustable output power range from -11 dBm to +9.5 dBm ! Adjustable current consumption from 5.5 mA to 13.8 mA ! Conforms to EN 300 220 and similar standards ! ! ! ! ! ! Ordering Information Part No. (see paragraph 5) EVB72036-868-FSK-C EVB72036-915-FSK-C Note: EVB default population is FSK, ASK modification according to section 3.1. Y R A N I M I L E R P Application Examples ! ! ! ! ! ! ! ! ! Evaluation Board Example General digital data transmission Tire Pressure Monitoring Systems (TPMS) Remote Keyless Entry (RKE) Wireless access control Alarm and security systems Garage door openers Remote Controls Home and building automation Low-power telemetry systems General Description The TH72036 evaluation board is designed to demonstrate the performance of the transmitter IC for conductive measurements. The power amplifier is matched to 50 Ohms by means of a π-matching network to operate at a resonant frequency of 868 and 915 MHz. The EVB72036 also features a clock output applicable to drive a microcontroller. The clock frequency can be selected by an external logic signal. 3901272036 01 Rev. 002 Page 1 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description Document Content 1 2 3 Theory of Operation ...................................................................................................3 1.1 General............................................................................................................................. 3 1.2 Block Diagram .................................................................................................................. 3 Functional Description ..............................................................................................3 2.1 Crystal Oscillator .............................................................................................................. 3 2.2 FSK Modulation ................................................................................................................ 4 2.3 Crystal Pulling................................................................................................................... 4 2.4 ASK Modulation................................................................................................................ 5 2.5 Output Power Selection.................................................................................................... 5 2.6 Lock Detection.................................................................................................................. 5 2.7 Low Voltage Detection...................................................................................................... 5 2.8 Mode Control Logic .......................................................................................................... 6 2.9 Clock Output..................................................................................................................... 6 2.10 Timing Diagrams .............................................................................................................. 6 50Ω Connector Board Circuit Diagram.....................................................................7 Y R A N I M I L E R P 3.1 Board Component Values ................................................................................................ 7 3.2 50Ω Connector Board PCB Top View .............................................................................. 8 3.3 Board Connection............................................................................................................. 8 4 Evaluation Board Layout ...........................................................................................9 5 Board Variants............................................................................................................9 6 Package Description ................................................................................................10 7 6.1 Soldering Information ..................................................................................................... 10 6.2 Recommended PCB Footprints ...................................................................................... 10 Disclaimer .................................................................................................................12 3901272036 01 Rev. 002 Page 2 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 1 Theory of Operation 1.1 General As depicted in Fig.1, the TH72036 transmitter consists of a fully integrated voltage-controlled oscillator (VCO), a divide-by-32 divider (div32), a phase-frequency detector (PFD) and a charge pump (CP). An internal loop filter determines the dynamic behavior of the PLL and suppresses reference spurious signals. A Colpitts crystal oscillator (XOSC) is used as the reference oscillator of a phase-locked loop (PLL) synthesizer. The VCO’s output signal feeds the power amplifier (PA). The RF signal power Pout can be adjusted in four steps from Pout = –11 dBm to +9.5 dBm, either by changing the value of resistor RPS or by varying the voltage VPS at pin PSEL. The open-collector output (OUT) can be used either to directly drive a loop antenna or to be matched to a 50Ohm load. Bandgap biasing ensures stable operation of the IC at a power supply range of 1.95 V to 5.5 V. 1.2 Block Diagram RPS R1 ASKDTA CKDIV VCC 7 10 PSEL 6 PLL CKOUT 5 ROI 3 32 2 OUT antenna matching network Y R A N I M I L E R P XBUF CP FSKSW 8 PA PFD XOSC XTAL CX2 CX1 div 8 div 32 VCO 1 mode control 4 ENTX 9 FSKDTA VEE Fig. 1: Block diagram with external components 2 Functional Description 2.1 Crystal Oscillator A Colpitts crystal oscillator with integrated functional capacitors is used as the reference oscillator for the PLL synthesizer. The equivalent input capacitance CRO offered by the crystal oscillator input pin ROI is about 18pF. The crystal oscillator is provided with an amplitude control loop in order to have a very stable frequency over the specified supply voltage and temperature range in combination with a short start-up time. 3901272036 01 Rev. 002 Page 3 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 2.2 FSK Modulation FSK modulation can be achieved by pulling the crystal oscillator frequency. A CMOScompatible data stream applied at the pin FSKDTA digitally modulates the XOSC via an integrated NMOS switch. Two external pulling capacitors CX1 and CX2 allow the FSK deviation Δf and the center frequency fc to be adjusted independently. At FSKDTA = 0, CX2 is connected in parallel to CX1 leading to the lowfrequency component of the FSK spectrum (fmin); while at FSKDTA = 1, CX2 is deactivated and the XOSC is set to its high frequency fmax. An external reference signal can be directly ACcoupled to the reference oscillator input pin ROI. Then the transmitter is used without a crystal. Now the reference signal sets the carrier frequency and may also contain the FSK (or FM) modulation. Fig. 2: Crystal pulling circuitry VCC ROI XTAL FSKSW CX2 CX1 VEE FSKDTA Description 0 fmin= fc - Δf (FSK switch is closed) 1 fmax= fc + Δf (FSK switch is open) 2.3 Crystal Pulling A crystal is tuned by the manufacturer to the required oscillation frequency f0 at a given load capacitance CL and within the specified calibration tolerance. The only way to pull the oscillation frequency is to vary the effective load capacitance CLeff seen by the crystal. Figure 3 shows the oscillation frequency of a crystal as a function of the effective load capacitance. This capacitance changes in accordance with the logic level of FSKDTA around the specified load capacitance. The figure illustrates the relationship between the external pulling capacitors and the frequency deviation. It can also be seen that the pulling sensitivity increases with the reduction of CL. Therefore, applications with a high frequency deviation require a low load capacitance. For narrow band FSK applications, a higher load capacitance could be chosen in order to reduce the frequency drift caused by the tolerances of the chip and the external pulling capacitors. f XTAL Y R A N I M I L E R P L1 f max C0 C1 CL eff R1 fc f min CX1 CRO CX1+CRO Fig. 3: CL (CX1+CX2) CRO CX1+CX2+CRO CL eff Crystal pulling characteristic For ASK applications CX2 can be omitted. Then CX1 has to be adjusted for center frequency. 3901272036 01 Rev. 002 Page 4 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 2.4 ASK Modulation The TH72036 can be ASK-modulated by applying data directly at pin PSEL. This turns the PA on and off which leads to an ASK signal at the output. 2.5 Output Power Selection The transmitter is provided with an output power selection feature. There are four predefined output power steps and one off-step accessible via the power selection pin PSEL. A digital power step adjustment was chosen because of its high accuracy and stability. The number of steps and the step sizes as well as the corresponding power levels are selected to cover a wide spectrum of different applications. The implementation of the output power control logic is shown in figure 4. There are two matched current sources with an amount of about 8 µA. One current source is directly applied to the PSEL pin. The other current source is used for the generation of reference voltages with a resistor ladder. These reference voltages are defining the thresholds between the power steps. The four comparators deliver thermometer-coded control signals depending on the voltage level at the pin PSEL. In order to have a certain amount of ripple tolerance in a noisy environment the comparators are provided with a little hysteresis of about 20 mV. With these control signals, weighted current sources of the power amplifier are switched on or off to set the desired output power level (Digitally Controlled Current Source). The LOCK, ASK signal and the output of the low voltage detector are gating this current source. RPS PSEL & & & & & Y R A N I M I L E R P Fig. 4: OUT Block diagram of output power control circuitry There are two ways to select the desired output power step. First by applying a DC voltage at the pin PSEL, then this voltage directly selects the desired output power step. This kind of power selection can be used if the transmission power must be changed during operation. For a fixed-power application a resistor can be used which is connected from the PSEL pin to ground. The voltage drop across this resistor selects the desired output power level. For fixed-power applications at the highest power step this resistor can be omitted. The pin PSEL is in a high impedance state during the “TX standby” mode. 2.6 Lock Detection The lock detection circuitry turns on the power amplifier only after PLL lock. This prevents from unwanted emission of the transmitter if the PLL is unlocked. 2.7 Low Voltage Detection The supply voltage is sensed by a low voltage detect circuitry. The power amplifier is turned off if the supply voltage drops below a value of about 1.85 V. This is done in order to prevent unwanted emission of the transmitter if the supply voltage is too low. 3901272036 01 Rev. 002 Page 5 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 2.8 Mode Control Logic The mode control logic allows two different modes of operation as listed in the following table. The mode control pin EN is pulled-down internally. This guarantees that the whole circuit is shut down if this pin is left floating. 2.9 EN Mode Description 0 TX standby TX disabled 1 TX active CKOUT active TX / CKOUT enabled Clock Output The clock output CKOUT is CMOS-compatible and can be used to drive a microcontroller. The frequency of the clock can be changed by the clock divider control signal CKDIV, that can be selected according to the following table. A capacitor at pin CKOUT can be used to control the clock voltage swing and the spurious emission. CKDIV Clock divider ratio Clock frequency / fc=433.92 MHz 0 4 3.39 MHz 1 16 848 kHz 2.10 Timing Diagrams After enabling the transmitter by the EN signal, the power amplifier remains inactive for the time ton, the transmitter start-up time. The crystal oscillator starts oscillation and the PLL locks to the desired output frequency within the time duration ton. After successful PLL lock, the LOCK signal turns on the power amplifier, and then the RF carrier can be FSK or ASK modulated. high EN low high LOCK low high FSKDTA low Y R A N I M I L E R P high EN low high LOCK low high PSEL low RF carrier t t t on t on Fig. 5: Timing diagrams for FSK and ASK modulation For more detailed information, please refer to the latest TH72036 data sheet revision. 3901272036 01 Rev. 002 Page 6 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 3 50Ω Connector Board Circuit Diagram Circuit diagram with 50 Ω matching network Fig. 6: 3.1 Y R A N I M I L E R P Board Component Values Part Size CM1 0805 CM2 0805 CM3 0805 LM 0805 LT 0805 CX1_FSK 0805 Value @ 868.3 MHz Value @ 915 MHz Tolerance 1.8 pF 2.2 pF ±5% impedance matching capacitor 5.6 pF 5.6 pF ±5% impedance matching capacitor Description 68 pF 68 pF ±5% impedance matching capacitor r 12 nH 10 nH ±5% impedance matching inductor 15 nH 10 nH ±5% output tank inductor 22 pF 22 pF ±5% 27 pF 27 pF ±5% XOSC FSK capacitor (Δf = ±20 kHz), note 1 XOSC ASK capacitor, trimmed to fC, note 1 12pF 12 pF ±5% CX1_ASK 0805 CX2 0805 CCK 0805 15 pF/ 180 pF ±5% XOSC capacitor (Δf = ±20 kHz), note 1, only for FSK capacitor to control clock voltage swing (CKDIV 0 / 1) RPS 0805 NIP ±5% power-select resistor, see data sheet section 4.6 R1 0805 ±5% ASK jumper (for ASK only), see data sheet sect. 4.7 CB0 1206 0Ω 220 nF ±20% de-coupling capacitor CB1 0805 330 pF ±10% de-coupling capacitor XTAL SMD 6x3.5 CK 0805 27.13438 MHz 28.59375 MHz ±30ppm cali., ±30ppm temp 1 nF fundamental mode crystal, CL = 12 pF, C0, max = 7 pF, R1 = 40 Ω ±10% ROI coupling capacitor, only required for external reference frequency input Note 1: depends on crystal parameters, other ∆f values can be selected with other CX1, CX2 values NIP – not in place, may be used optionally 3901272036 01 Rev. 002 Page 7 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 3.2 50Ω Connector Board PCB Top View Y R A N I M I L E R P Board size is 27 mm x 42 mm 3.3 VCC Board Connection Power supply (1.95 V to 5.5 V) CKDIV FSKD Input for FSK data (CMOS, see section 2.2) ASKD Input for ASK data (CMOS, see section 2.4) EN CKOUT Clock output, (CMOS, see section 2.9) RO External reference frequency input Several ground pins Mode control pin (see par. 2.8) 3901272036 01 Rev. 002 Clock divider input, (CMOS, see sect. 2.9) Page 8 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 4 Evaluation Board Layout EVB720X6 _1 Board layout data in Gerber format are available, board size is 27mm x 42mm x 1mm FR4. Y R A N I M I L E R P PCB bottom view PCB top view 5 Board Variants Type EVB72005 Frequency/MHz Modulation –315 –FSK –433 –ASK –868 –FM according to section 3.1 Board Execution –A antenna version –C connector version –915 Note: 3901272036 01 Rev. 002 available EVB setups Page 9 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 6 Package Description The device TH72016 is RoHS compliant. D D2 10 6 L 0.23 exposed pad E2 E 0.36 0.225x45° 5 1 b A3 A The “exposed pad” is not connected to internal ground, it should not be connected to the PCB. A1 Fig. 7: e 10L QFN 3x3 Dual all Dimensions in mm min max D E D2 E2 A A1 A3 L e b 2.85 3.15 2.85 3.15 2.23 2.48 1.49 1.74 0.80 1.00 0 0.05 0.20 0.3 0.5 0.50 0.18 0.30 Y R A N I M I L E R P all Dimensions in inch min 0.112 0.112 0.0878 0.051 0.0315 0 0.0118 0.0071 0.0079 0.0197 max 0.124 0.124 0.0976 0.055 0.0393 0.002 0.0197 0.0118 6.1 Soldering Information • 6.2 The device TH72036 is qualified for MSL3 with soldering peak temperature 260 deg C according to JEDEC J-STD-20 Recommended PCB Footprints e C PL X Y 10 6 Z G E2 th 1 5 min max G D2th E2th X Y CPL e 3.55 3.90 1.9 2.3 3.2 3.6 1.3 1.7 0.25 0.30 0.7 1.0 0.3 0.5 0.5 all Dimensions in inch solder stop Fig. 8: 3901272036 01 Rev. 002 Z min 0.1398 0.0748 0.1260 0.0512 0.0098 0.0276 0.0591 0.0197 max 0.1535 0.0906 0.1417 0.0669 0.0118 0.0394 0.0197 D2 th solder pad all Dimensions in mm PCB land pattern style Page 10 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description Your Notes Y R A N I M I L E R P 3901272036 01 Rev. 002 Page 11 of 12 EVB Description June/07 EVB72036 868/915MHz FSK/ASK Transmitter Evaluation Board Description 7 Disclaimer 1) The information included in this documentation is subject to Melexis intellectual and other property rights. Reproduction of information is permissible only if the information will not be altered and is accompanied by all associated conditions, limitations and notices. 2) Any use of the documentation without the prior written consent of Melexis other than the one set forth in clause 1 is an unfair and deceptive business practice. Melexis is not responsible or liable for such altered documentation. 3) The information furnished by Melexis in this documentation is provided ’as is’. Except as expressly warranted in any other applicable license agreement, Melexis disclaims all warranties either express, implied, statutory or otherwise including but not limited to the merchantability, fitness for a particular purpose, title and non-infringement with regard to the content of this documentation. 4) Notwithstanding the fact that Melexis endeavors to take care of the concept and content of this documentation, it may include technical or factual inaccuracies or typographical errors. Melexis disclaims any responsibility in connection herewith. 5) Melexis reserves the right to change the documentation, the specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. 6) Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the information in this documentation. Y R A N I M I L E R P 7) The product described in this documentation is intended for use in normal commercial applications. Applications requiring operation beyond ranges specified in this documentation, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. 8) Any supply of products by Melexis will be governed by the Melexis Terms of Sale, published on www.melexis.com. © Melexis NV. All rights reserved. For the latest version of this document, go to our website at: www.melexis.com Or for additional information contact Melexis Direct: Europe, Africa: Americas: Asia: Phone: +32 1367 0495 E-mail: [email protected] Phone: +1 603 223 2362 E-mail: [email protected] Phone: +32 1367 0495 E-mail: [email protected] ISO/TS 16949 and ISO14001 Certified 3901272036 01 Rev. 002 Page 12 of 12 EVB Description June/07