ams AS1372 350ma dual rail linear regulator Datasheet

D a ta s h e e t
AS1372
350mA Dual Rail Linear Regulator
1 General Description
2 Key Features
The AS1372 is a Dual Supply Rail Linear Regulator
designed for providing ultra-low voltages.
!
Input Voltage: 0.7V to 4.5V
!
Bias Supply Voltage: 2.5V to 5.5V
In a typical application the battery is directly connected
to VBIAS and VIN is connected to the output of a DC-DC
Converter.
!
Output Voltage: 0.5V to 2.2V in 100mV steps
!
Output Voltage Accuracy: ±1.5%
!
Dropout Voltage 135mV @ 350mA load
!
Max. Output Current: 350mA
!
Load Transient Response: ±15mV (typ.)
!
Superior Efficiency
!
Low Shutdown Current: 10nA
!
High PSRR: >80dB @ 10Hz-1kHz, 60db @100kHz
!
Noise Voltage: 50µVRMS from 10Hz to 1000kHz
!
Integrated Overtemperature/Overcurrent Protection
!
Chip Enable Input
!
Operating Temperature Range: -40°C to +85°C
!
5-bumps CS-WLP Package
The very low quiescent currents together with the
excellent transient features and the superior dropout are
making the AS1372 an ideal device for applications
running on batteries.
The robust design ensures that no under-voltage failure
can occur and the device is also equipped with an
internal protection against over-temperature and overcurrent.
The device is available in fixed output voltages from
0.5V up to 2.2V in 100mV steps (50mV from 0.5V to
1.1V).
The AS1372 is available in a 5-bumps CS-WLP package
and is qualified for -40°C to +85°C operation.
3 Applications
The devices are ideal for powering cordless and mobile
phones, MP3 players, PDAs, hand-held computers,
digital cameras, and any other hand-held and/or batterypowered device.
Figure 1. AS1372 - Typical Application Diagram
!
" #$!
%
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AS1372
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
1
3
2
4
5
Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
2
Pin Name
VOUT
GND
3
EN
4
VBIAS
5
VIN
Description
Regulated Output Voltage. Bypass this pin with a capacitor to GND.
Ground.
Enable. Pull this pin to low to disable the device. This pin has an internal 1.6MΩ (typ.)
pull-down resistor.
Bias Supply Voltage. 2.5V to 5.5V, Bypass this pin with a capacitor to GND.
Unregulated Input Voltage. 0.7V to 4.5V, VIN ≤ VBIAS, Bypass this pin with a
capacitor to GND.
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AS1372
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical
Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
Notes
VIN, VBIAS and EN to GND
-0.3
+6.5
V
VIN < VBIAS or equal in operating
conditions
VOUT to GND
-0.3
VIN + 0.3
V
Output Short-Circuit Duration
Indefinite
ESD
2
kV
HBM MIL-Std. 883E 3015.7 methods
+100
mA
JEDEC 78
Latch-Up
-100
Operating Temperature Range
-40
+85
ºC
Storage Temperature Range
-65
+150
ºC
+125
ºC
Junction Temperature
Package Body Temperature
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+260
Revision 1.01
ºC
The reflow peak soldering temperature
(body temperature) specified is in
accordance with IPC/JEDEC J-STD020D “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid
State Surface Mount Devices”.
The lead finish for Pb-free leaded
packages is matte tin (100% Sn).
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AS1372
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VIN = VOUT + 0.2V, VBIAS = VOUT + 1.5V (or 2.5V whichever is larger), EN = VBIAS, CIN = COUT = CBIAS = 1µF, TAMB = 40°C to +85ºC, Typical Values are at TAMB = +25ºC (unless otherwise specified).
Table 3. Electrical Characteristics
Symbol
Parameter
Conditions
Min
VIN
Input Voltage
VIN ≤ VBIAS
VBIAS
Bias Supply Voltage
VOUT
Output Voltage
Output Voltage Accuracy
VOUT > 1.2V
VOUT(NOM)
- VOUT
Output Voltage Accuracy
VOUT ≤ 1.2V
Typ
Max
Units
0.7
4.5
V
2.5
5.5
V
Available in 50mV or 100mV steps
(see Ordering Information on page
13)
0.5
2.2
V
IOUT = 100µA
-1.5
+1.5
IOUT = 100µA to 350mA, VIN =
VOUT(NOM)+0.2V to 4.5V, VBIAS =
VOUT(NOM)+1.5V to 5.5V
-2
+2
IOUT = 100µA
-2
+2
IOUT = 100µA to 350mA, VIN =
VOUT(NOM)+0.2V to 4.5V, VBIAS =
VOUT(NOM)+1.5V to 5.5V
-2.5
+2.5
%
%
ΔVOUT /
ΔVIN
Line Regulation VIN
VIN = VOUT(NOM)+0.2V to 4.5V,
VBIAS = 5.5V, IOUT = 100µA
40
µV/V
ΔVOUT /
ΔVBIAS
Line Regulation VBIAS
VBIAS = VOUT(NOM)+1.5V to 5.5V,
IOUT = 100µA
100
µV/V
ΔVLDR
Load Regulation
IOUT = 1mA to 350mA
6
µV/mA
IOUT
Output Current
ILIM
Current Limit
VDROP VIN
VDROP VBIAS
EN
PSRR VIN
PSRR VBIAS
1
350
mA
500
VBIAS = VOUT + 1.5V, IOUT = 350mA
135
VBIAS = VOUT + 1.8V, IOUT = 350mA
115
VBIAS = 5.5V, IOUT = 350mA
110
Output Voltage Dropout VBIAS
IOUT = 100mA
1.1
Output Voltage Noise
VOUT ≤ 1.2V, f = 10Hz to 100kHz
50
f = 100Hz
85
f = 1kHz
80
f = 10kHz
70
f = 100kHz
60
f = 100Hz
75
f = 1kHz
60
f = 10kHz
50
f = 100kHz
50
Output Voltage Dropout VIN
Power-Supply Rejection Ratio
Sine modulated VIN
Power-Supply Rejection
Ratio Sine modulated VBIAS
IQ_VBIAS
Quiescent Current into VBIAS
IQ_VIN
Quiescent Current into VIN
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IOUT = 0mA
Revision 1.01
mA
mV
1.5
V
µVRMS
dB
dB
40
75
6.5
10
µA
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AS1372
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics
Symbol
Parameter
ISHDN VBIAS
Shutdown Current into VBIAS
ISHDN VIN
Shutdown Current into VIN
Conditions
Min
Typ
Max
Units
10
VEN = 0V
nA
10
Logic Levels
VIH
VIL
IEN
1
Enable Input Threshold
Enable Input Bias Current
0.4
EN = GND
V
0.01
nA
Thermal Protection
TSHDN
Thermal Shutdown
Temperature
150
ºC
ΔTSHDN
Thermal Shutdown Hysteresis
25
ºC
Transient Characteristics
ΔVOUT
Dynamic Load Transient
Response
Pulsed ILOAD from 0mA to 300mA in
10µs rise time
15
mV
tON
Exit Delay from Shutdown
VOUT ≤ 1.2V, setting to 95%
70
µs
COUT
Output Capacitor
Load Capacitor Range
1
10
µF
Maximum ESR Load
1
500
mΩ
1. guaranteed by design
Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or
SQC (Statistical Quality Control) methods.
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AS1372
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VIN = 1.2V, VBIAS = 2.5V, VOUT = 1.0V, EN = VBIAS, CIN = COUT = CBIAS = 1µF, TAMB = -40°C to +85ºC, Typical Values
are at TAMB = +25ºC (unless otherwise specified).
Figure 4. Bias Supply Current vs. Bias Supply Voltage
50
50
45
45
Bias Supply Current (µA)
Bias Supply Current (µA)
Figure 3. Bias Supply Current vs. Bias Supply Voltage
40
35
30
no load
25
Iout = 350mA
no load
40
35
30
- 40°C
+ 25°C
25
+85 °C
20
20
2.5
3
3.5
4
4.5
5
5.5
2.5
3
Bias Supply Voltage (V)
Figure 5. Ground Current vs. VIN; VBIAS = 5.5V
4
4.5
5
60
55
55
50
45
40
- 40°C
+ 25°C
35
50
45
40
35
- 40°C
+ 25°C
+85 °C
+85 °C
30
30
2.5
3
3.5
4
4.5
2.5
Input Voltage (V)
3.5
4
4.5
Figure 8. Ground Current vs. Load Current
60
55
55
Ground Current (µA)
60
50
45
40
35
3
Input Voltage / Bias Supply Voltage (V)
Figure 7. Ground Current vs. Bias Supply Voltage
Ground Current (µA)
5.5
Figure 6. Ground Current vs. VIN / VBIAS;
60
Ground Current (µA)
Ground Current (µA)
3.5
Bias Supply Voltage (V)
50
45
40
35
no load
- 40°C
+ 25°C
+ 85°C
Iout = 350mA
30
30
2.5
3
3.5
4
4.5
5
5.5
2.5
Bias Supply Voltage (V)
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3
3.5
4
4.5
5
5.5
Load Current (mA)
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AS1372
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 9. PSRR VIN; VIN = 3VDC + 250mVpk
Figure 10. PSRR VBIAS; VBIAS = 3.5VDC + 500mVpk
-40
Bias Supply Voltage - PSRR (dB)
Input Voltage - PSRR (dB)
-40
-50
-60
-70
-80
-90
-100
100
1000
10000
-50
-60
-70
-80
-90
-100
100
100000
1000
Frequency (Hz)
100000
Figure 12. Line Regulation: VOUT vs. VBIAS
1.015
1.015
1.01
1.01
Output Voltage (V)
Output Voltage (V)
Figure 11. Line Regulation: VOUT vs. VIN; VBIAS = 5.5V
1.005
1
0.995
0.99
1.005
1
0.995
0.99
0.985
0.985
1.2 1.5 1.8 2.1 2.4 2.7 3 3.3 3.6 3.9 4.2 4.5
2.5 2.75
Input Voltage (V)
3
3.25 3.5 3.75
4
4.25 4.5
Bias Supply Voltage (V)
Figure 13. Load Regulation: VOUT vs. IOUT
Figure 14. Output Voltage vs. Temperature; IOUT = 1mA
1.015
1.015
1.01
1.01
Output Voltage (V)
Output Voltage (V)
10000
Frequency (Hz)
1.005
1
0.995
0.99
1.005
1
0.995
0.99
0.985
0
50
100
150
200
250
300
350
0.985
-45
Output Current (mA)
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-25
-5
15
35
55
75
Temperature (°C)
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AS1372
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 15. Dropout VIN vs. Temp.; IOUT = 350mA
Figure 16. Enable Start-up
200
500mV/Div
VEN
150
125
75
50
-45
500mV/Div
100
VOUT
Dropout VIN (mV)
175
-25
-5
15
35
55
75
20µs/Div
Temperature (°C)
50µs/Div
100µs/Div
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20mV/Div
0mA
IOUT
350mA
Figure 18. Load Transient Response; VIN = 2.0V
VOUT
VOUT
20mV/Div
VIN
2.0V 2.5V
Figure 17. Line Transient Response; IOUT = 350mA
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AS1372
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1372 is a low-dropout, low-quiescent-current linear regulator intended for LDO regulator applications where
output current load requirements range from no load to 350mA. All devices come with fixed output voltage from 0.5V to
2.2V. (see Ordering Information on page 13).
Shutdown current for the whole regulator is typically 10nA. The device features integrated short-circuit and over
current protection. Under-Voltage lockout prevents erratic operation when the input voltage is slowly decaying (e.g. in a
battery powered application). Thermal Protection shuts down the device when die temperature reaches 150°C. This is
a useful protection when the device is under sustained short circuit conditions.
As illustrated in Figure 19, the devices comprise voltage reference, error amplifier, N-channel MOSFET pass transistor,
internal voltage divider, current limiter, thermal sensor and shutdown logic.
The bandgap reference is connected to the inverting input of the error amplifier. The error amplifier compares this
reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference
voltage, the N-channel MOSFET gate is pulled higher, allowing more current to pass to the output, and increases the
output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled down, allowing less current to pass
to the output. The output voltage feeds back through an internal resistor voltage divider connected to pin OUT.
Figure 19. AS1372 - Block Diagram
VIN
VBIAS
EN
Thermal
Overload
Protection
Bandgap Voltage
&
Current Reference
Shutdown/
Power-On
Control Logic
Error
Amplifier
+
NMOS
OUT
Trimmable
Reference
Voltage
AS1372
GND
Output Voltages
Standard products are factory-set with output voltages from 0.5V to 2.2V. A two-digit suffix of the part number identifies
the nominal output (see Ordering Information on page 13). Non-standard devices are available.
For more information contact: http://www.austriamicrosystems.com/contact
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AS1372
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
Advantages of dual supply architecture vs. traditional single supply approach.
If compared to the traditional single supply approach, the dual rail architecture ensures improved performances in a
LDO at the expense of an additional supply voltage and a dedicated pin.
Anyhow, it is worth to note that the additional supply voltage comes for free in all those applications where the LDO is
supplied by the output of a DCDC step-down converter: Vin pin is coupled to the step-down output and Vbias is
shorted to the DCDC converter supply.
Figure 20. Single vs. Dual Supply
Single Supply
Dual Supply
VBIAS
VIN
Bandgap
Bandgap
PMOS
core
blocks
+
error
amplifier
VOUT
core
blocks
VIN
+
error
amplifier
NMOS
VOUT
The former is based on a PMOS output transistor connected in a common source configuration: the supply voltage at
its source is shared with all the circuit. On the other side, the dual supply approach is based on a NMOS transistor in
common drain configuration having its source coincident with the regulated output of the LDO: the supply voltage at
the drain is not shared with the remaining blocks of the circuit and its value can be chosen independently.
The second solution allows improved efficiency and dropout at low output reference voltage and faster transient time
response.
Improved efficiency
At heavy current load the power consumption is almost entirely located in the output transistor. This means that
keeping drain to source voltage, that is the difference between input and output voltage of the LDO, as small as
possible is the key factor for a good efficiency. It holds, approximately: Efficiency = (Vout / Vin)x100 [%]
While this achievement is little challenging in case the output voltage is large enough, traditional implementations
based on a PMOS device face a serious bottleneck at low output voltage. In fact the supply voltage cannot be made
consequently small because of dynamic range limitations in the core of the LDO circuitry. In many commercial cases
the supply voltage cannot be made smaller than 2 or 2,5V which gives only 25% or 20% efficiency for a 500mV
reference output.
On the contrary, the possibility to have a dedicated supply voltage for the output transistor offers the possibility to set
the drain to source voltage of the output transistor independently from the dynamic range limitations inside the core of
the circuit. Thus, even at very small output voltage, the drain to source voltage can be made quite small and guarantee
optimal efficiency performance. For instance, by setting Vin at 800mV makes more than 60% efficiency for an output
voltage as small as 500mV still ensuring excellent analog performances in the LDO.
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AS1372
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Improved dropout
Dropout mainly refers to the resistivity of the output transistor when its gate is driven to ground and the feedback
regulation loop is open. Moreover when the output transistor is in dropout input and output voltages are nearly
coincident. In this way, in a traditional approach, the gate to source voltage that determines the resistivity of the output
PMOS in dropout is nearly equal to the output voltage. This means that a smaller output voltage brings worse dropout
performances. In the dual supply approach, on the contrary, in dropout conditions the gate of the output transistor is
pushed to Vbias voltage and only Vin drops nearly coincident to Vout. As Vbias can be chosen independently from Vin,
even at small output voltages a large overdrive at the output transistor can be ensured and an extremely reduced
dropout value comes out.
Faster response
In a traditional approach, the output of the LDO is coincident with the drain of the output PMOS transistor. In this way,
if the load current suddenly changes, any variation at the output voltage is not able to vary the output current of the
LDO until it is amplified to the gate of the output PMOS by the error amplifier. A delay comes, unavoidably. On the
contrary, in the dual supply approach it is the source of the output transistor to be coincident with the output voltage. In
this way a change in the output voltage immediately modulates the current from the LDO and a better regulation in fast
load transient is achieved.
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AS1372
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The device is available in a 5-bumps CS-WLP package.
Figure 21. 5-bumps CS-WLP Package
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AS1372
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products listed in Table 4.
Table 4. Ordering Information
Ordering Code
AS1372-BWLT-07
Marking
Output
Description
*)
0.7V
350mA Dual Rail Linear Regulator
Delivery Form
Package
Tape and Reel 5-bumps CS-WLP
AS1372-BWLT-10
ASSN
1.0V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-12
ASSQ
1.2V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-13
ASSO
1.3V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-14
*)
1.4V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-15
ASSR
1.5V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-16
*)
1.6V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-18
ASSS
1.8V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-20
*)
2.0V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-24
*)
2.4V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-28
*)
2.8V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-30
*)
3.0V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
AS1372-BWLT-33
*)
3.3V
350mA Dual Rail Linear Regulator
Tape and Reel
5-bumps CS-WLP
*) on request
Non-standard devices from 0.5V to 1.1V are available in 50mV steps and from 1.1V to 2.2V in 100mV steps. For more
information and inquiries contact http://www.austriamicrosystems.com/contact
Note: All products are RoHS compliant and Pb-free.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
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AS1372
Datasheet
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