MPS MP2497DN 3a, 50v, 100khz step-down converter with programmable output ovp threshold Datasheet

MP2497
3A, 50V, 100kHz Step-Down Converter
with Programmable Output OVP Threshold
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2497 is a monolithic step-down switch
mode converter with a programmable output
current limit. It achieves 3A continuous output
current over a wide input supply range with
excellent load and line regulation. An internal
2~4ms soft start prevents inrush current at turning
on. And it is capable of providing output line drop
compensation.
•
•
•
•
•
•
•
•
•
•
•
MP2497 achieves low EMI signature with well
controlled switching edges.
Fault condition protection includes hiccup current
limit and short circuit protection, programmable
output over voltage protection and thermal
shutdown.
•
The MP2497 requires a minimum number of
readily available standard external components.
The MP2497 is available in SOIC8 and SOIC8E
package.
Wide 4.5V to 50V Operating Input Range
Programmable
Output
Over
Voltage
Protection
Output Adjustable from 0.8V to 25V
0.15Ω Internal Power MOSFET Switch
Internal 4ms Soft Start
Stable with Low ESR Output Ceramic
Capacitors
Fixed 100kHz Frequency
Low EMI Signature
Thermal Shutdown
Output Line Drop Compensation
Hiccup Circuit Limit and Short Circuit
Protection
Available in SOIC8 and SOIC8E Package
APPLICATIONS
•
•
•
USB Power Supplies
Automotive Cigarette Lighter Adapters
Power Supply for Linear Chargers
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency vs.
Output Current
R6
0O
C6
0.1µF
C2
2.2µF
VIN
C1
220µF
BST
C3
C4
C10
100µF 22µF 0.1µF
+
VIN
D1
C 11
0.1µF
OVP
R4
10kO
MP2497
GND
R3
39kO
ISP
C7
10nF
GND
FB
ISN
C8
10nF
R7
1kO
R5
1kO
C9
150pF
R1
R2
301kO
57.6kO
MP2497 Rev. 1.12
12/22/2011
VOUT=5V
R SENSE
33mO
95
V OUT
SW
C5
0.1µF
VIN=12V
90
GND
EFFICIENCY (%)
L1
33µH
85
80
75
70
65
VIN=24V
VIN=50V
60
55
0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9
OUTPUT CURRENT (A)
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1
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number
MP2497DS*
MP2497DN**
Package
SOIC8
SOIC8E
Top Marking
MP2497
MP2497
Operating Temperature (TJ)
-40°C to +125°C
-40°C to +125°C
* For Tape & Reel, add suffix –Z (e.g. MP2497DS–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. MP2497DS–LF–Z).
** For Tape & Reel, add suffix –Z (e.g. MP2497DN–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. MP2497DN–LF–Z).
PACKAGE REFERENCE
SOIC8
SOIC8E
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Input Voltage VIN .......................................... 60V
VISN, VISP ..............................................0V to 25V
|VISN -VISP| ...........................................0V to 0.4V
VSW ........................................-0.3V to VIN + 0.3V
VBST ................................................... VSW + 6.5V
All Other Pins ...............................-0.3V to +6.5V
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
(2)
Continuous Power Dissipation (TA = +25°C)
SOIC8 ...................................................... 1.38W
SOIC8E...................................................... 2.5W
SOIC8..................................... 90 ...... 45... °C/W
SOIC8E .................................. 50 ...... 10... °C/W
Recommended Operating Conditions
(3)
(4)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Input Voltage VIN ..............................4.5V to 50V
Output Voltage VOUT (VIN>26.5V) .....0.8V to 25V
Output Voltage VOUT (VIN<=26.5V) ......................
.........................................0.8V to (VIN–1.5)V
Maximum Junction Temp. (TJ) ................+125°C
MP2497 Rev. 1.12
12/22/2011
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2
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol
Feedback Voltage
Feedback Bias Current
VFB
Condition
Min
Typ
Max
Units
4.5V ≤ VIN ≤ 50V
0.78
0.8
0.82
V
IBIAS(FB)
VFB = 0.8V
VOVREF
TA=-40°C to +85°C
Output
Over
Voltage
Reference
Input Bias Current (OVP)
IBIAS(OVP)
Switch On Resistance
RDS(ON)
VOVP = 2V, VSW = 0V
Current Limit
Duty Cycle=10%
fSW
1.10
VOVP=1.23V
Switch Leakage
Oscillator Frequency
10
VFB = 0.6V
1.23
nA
1.36
0.1
μA
0.15
Ω
0.1
10
5
80
V
100
μA
A
120
kHz
Boot-Strap Voltage
VBST - VSW
4.5
V
Minimum On Time
tON
100
ns
SW Rising Edge
tRISE
50
ns
SW Falling Edge
tFALL
50
ns
Under Voltage Lockout Threshold
Rising
Under Voltage Lockout Threshold
Hysteresis
Load Line Compensation
VISP-VISN=100mV, check IFB
GLLC
Gain
Current Sense Voltage
VISP –VISN VISP, VISN 0.5–15V
Input Bias Current (ISN, ISP)
IBIAS (ISN,ISP) VISP, VISN 0.5–15V
Supply Current (Quiescent)
VOVP = 0V, VFB = 1V
2.9
3.4
3.9
200
V
mV
15
20
25
μA/V
90
-1
100
-0.5
110
+1
mV
μA
1.2
1.5
mA
Thermal Shutdown
150
°C
Thermal Shutdown Hysteresis
30
°C
MP2497 Rev. 1.12
12/22/2011
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3
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
Name
1
VIN
2
GND,
Exposed
Pad
3
FB
4
OVP
5
ISN
6
ISP
7
BST
8
SW
MP2497 Rev. 1.12
12/22/2011
Description
Supply Voltage. The MP2497 operates from a +4.5V to +50V unregulated input. CIN is
needed to prevent large voltage spikes from appearing at the input. Put CIN as close to
the IC as possible. It is the drain of the internal power device and power supply for the
whole chip.
Ground. This pin is the voltage reference for the regulated output voltage. For this reason
care must be taken in its layout. This node should be placed outside of the D1 to CIN
ground path to prevent switching current spikes from inducing voltage noise into the part.
Connect exposed pad to GND plane for optimal thermal performance.
Feedback. An external resistor divider from the output to GND tapped to the FB pin sets
the output voltage. To prevent current limit run away during a short circuit fault condition
the frequency-fold-back comparator lowers the oscillator frequency when the FB voltage
is below 250mV.
Output Over Voltage Protection. Connect OVP to the center point of an external resistor
divider from output to GND. The OVP reference is 1.23V.
Negative Current Sense Input. It is used for load current limiting and output line drop
compensation.
Positive Current Sense Input. It is used for load current limiting and output line drop
compensation.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BST pins to form a floating supply across the
power switch driver. An on-chip regulator is used to charge up the external boot-strap
capacitor. If the on-chip regulator is not strong enough, one optional diode can be
connected from IN or OUT to charge the external boot-strap capacitor.
Switch Output. It is the source of power device.
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4
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
C1=220μF, C2=2.2μF, C3=100μF, C4=22μF, L=33μH, RSENSE=33mΩ, TA=25ºC，unless otherwise
noted.
Output Line Drop
Compensation
80
GAIN (dB)
VOUT (V)
4.98
VIN=24V
4.96
4.94
VIN=50V
4.9
0
0.5
1
VOUT=5V
200
95
150
90
40
100
85
20
50
0
0
1.5 2 2.5
IOUT (A)
3
-100
-60
-150
-80
0.1
3.5
-50
-40
Load Regulation
1
10
100
FREQUENCY(kHz)
-200
1000
4.985
VFB VOLTAGE(V)
VIN=50V
4.975
VIN=12V
4.97
4.965
VIN=24V
4.96
70
60
55
0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9
IOUT (A)
EMI Radiation
VIN=12V, VOUT=5V, IOUT=3A
Resistor Load
80
70
60
0.8
50
0.798
EN55022
40
30
0.796
20
10
0.794
4.955
VIN=50V
65
90
0.802
4.98
VIN=24V
75
VIN=12V
0.804
VIN=12V
80
VFB vs. Temperature
4.99
VOUT (V)
Gain
-20
Connect ISP, ISN to GND
4.95
0
Phase
60
VIN=12V
4.92
VIN=12V, VOUT=5V, IOUT=3A
Resistor Load
EFFICIENCY (%)
5
Efficiency vs.
Output Current
PHASE (degree)
5.02
Loop Gain with
Phase Margin
0
0.5
MP2497 Rev. 1.12
12/22/2011
1
1.5 2 2.5
IOUT (A)
3
3.5
0.792
-50
-20 10 40 70 100 130
TEMPERATURE (oC)
-10
30
100
FREQUENCY(MHz)
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1000
5
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
C1=220μF, C2=2.2μF, C3=100μF, C4=22μF, L=33μH, RSENSE=33mΩ, TA=25ºC，unless otherwise
noted.
MP2497 Rev. 1.12
12/22/2011
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6
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
BLOCK DIAGRAM
VIN
CURRENT SENSE
AMPLIFIER
GND
Σ
REGULATOR
63mO
BST
RAMP
REFERENCE
REGULATOR
OSCILLATOR
DRIVER
CLK
RSENSE
SW
S
IN
Q
R
PWM
COMPARATOR
6.2uA
200mV
600mV
Hiccup
Current Limit
ISP
X6
ISN
RS1
RS2
R1
FB
6pF
72.8pF
10000kO
2483kO
10pF
SS Circuit
1.23V
ERRPR
AMPLIFIER
R2
800mV
400kO
OVP
COMPARATOR
OVP
Figure 1—Functional Block Diagram
MP2497 Rev. 1.12
12/22/2011
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7
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
OPERATION
Main Control Loop
The MP2497 is a current mode buck regulator.
That is, the EA output voltage is proportional to
the peak inductor current.
At the beginning of a cycle SW is off; the Error
Amplifier output voltage is higher than the
Current Sense Amplifier output. The rising edge
of the 100kHz CLK signal sets the RS Flip-Flop.
Its output turns on SW thus connecting the SW
pin and inductor to the input supply.
The increasing inductor current is sensed and
amplified by the Current Sense Amplifier. Ramp
Compensation is summed to Current Sense
Amplifier output and compared to the Error
Amplifier output by the PWM Comparator.
When the Current Sense Amplifier plus Slope
Compensation signal exceeds the Error
Amplifier output voltage, the RS Flip-Flop is
reset and the MP2497 reverts to its initial SW
off state.
If the Current Sense Amplifier plus Slope
Compensation signal does not exceed the
COMP voltage, then the falling edge of the CLK
resets the Flip-Flop.
The output of the Error Amplifier integrates the
voltage difference between the feedback and
the reference. The polarity is such that an FB
pin voltage is lower than 0.8V increases the EA
output voltage. Since the EA output voltage is
proportional to the peak inductor current, an
increase in its voltage increases current
delivered to the output. An external Schottky
Diode (D1) carries the inductor current when
SW is off.
MP2497 Rev. 1.12
12/22/2011
Hiccup Mode Current Limit Protection
The output current information for current limit
protection is sensed via the ISP and ISN pins.
The sense voltage limit threshold is set at
100mV. MP2497 has hiccup over current limit
function. Once the VSENSE exceeds the 100mV,
the current limit loop will turn off high side
switch immediately. Meanwhile, internal soft
start circuit will be reset after FB is lower than
0.3V, and then the high side switch turns on
and MP2497 restarts with a full soft start. This
hiccup process is repeated until the fault is
removed. And, current limit value can be
programmed to be lower by internal current
source and external resistors connected to ISN
and ISP pins, when output voltage is lower than
200mV. Then, the average short circuit current
can be greatly reduced.
Output Over Voltage Protection
The MP2497 has output over voltage protection.
The OVP reference 1.23V is on the positive
input of the OVP comparator. The output
voltage is fed to OVP pin through an external
resistor divider. If the voltage on OVP pin is
higher than 1.23V, the high side switch will be
turned off immediately and part will be lathed off
after a timer delay.
Output Line Drop Compensation
If the trace from MP2497 output terminator to
the load is too long, there will be a voltage drop
on the long trace which is variable with load
current. MP2497 is capable of compensating
the output voltage drop to keep a constant
voltage at load, whatever the load current is.
The output voltage is compensated by feeding
a current to the top feedback resistance R1.
The load line compensation gain can be
programmed according to RSENSE and RTRACE
(Figure 2) values.
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8
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Line Drop Compensation
Figure 2 shows the block of output line drop
compensation.
If the trace to the load is long, there is a voltage
drop between VOUT and VLOAD. VOUT (voltage at
output terminator) is not equal to VLOAD(voltage
at load). The voltage drop can be described by:
VDROP = IOUT × R TRACE
VOUT
RSENSE
SW
(2)
RTRACE2
MP2497 offers a compensation method, by
adjusting the FB voltage slightly according to
the load current.
The relation between VOUT and VFB can be
described by:
VOUT − VFB VFB IOUT × RSENSE × 6
(3)
=
+
R1
R2
400kΩ
Load
X6
ISN
R1
FB
R2
Hiccup
Current Limit
600mV
10000kO
10pF
0.8V
Where, VFB is 0.8V.
400kO
Then, the VOUT can be calculated by:
The VLOAD is determined by:
I × RSENSE × 6 × R1
R1
) × 0.8V + OUT
(5)
R2
400kΩ
−IOUT × RTRACE
To maintain the VLOAD is not variable with load
current. The equation below should be satisfied:
IOUT × RSENSE × 6 × R1
= IOUT × R TRACE
400kΩ
ERRPR
AMPLIFIER
Internal Block
I × RSENSE × 6 × R1
R1
(4)
) × 0.8V + OUT
R2
400kΩ
VLOAD = (1 +
VLOAD
R TRACE
ISP
To keep an accurate and constant load voltage,
the output line drop compensation is necessary.
VOUT = (1 +
RTRACE1
(1)
Where, the RTRACE is the resistance of the
output line. ( RTRACE = RTRACE1 + RTRACE2 )
Then, the VLOAD is:
VLOAD = VOUT − IOUT × R TRACE
In the formula above, RSENSE is known. And
RTRACE can be tested or evaluated. So, we can
select a proper top feedback resistor R1
according to the RTRACE and RSENSE to
compensate the output line voltage drop.
(6)
Figure 2—Output Line Drop Compensation
Setting the Output Voltage
The external resistor divider is used to set the
output voltage (see the typical application circuit
on the front page). The feedback resistor R1 is
decided by output line drop compensation. R2
is then given by:
R2 =
R1
VOUT
−1
0 .8 V
(8)
Simplify the formula above, we can get:
R1 =
MP2497 Rev. 1.12
12/22/2011
R TRACE × 400kΩ
6 × RSENSE
(7)
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9
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
Selecting the Inductor
A 10µH to 47µH inductor with a DC current
rating of at least 25% percent higher than the
maximum load current is recommended for
most applications. For highest efficiency, the
inductor DC resistance should be less than
200mΩ. For most designs, the inductance value
can be derived from the following equation.
L=
VOUT × (VIN − VOUT )
VIN × ΔIL × fOSC
(9)
Choose inductor current ripple to be
approximately 30% of the maximum load
current, 3A. The maximum inductor peak
current is:
ΔIL
2
(10)
Under light load conditions below 100mA, larger
inductance is recommended for improving
efficiency.
Selecting the Input Capacitor
The input capacitor reduces the surge current
drawn from the input and also the switching
noise from the device. The input capacitor
impedance at the switching frequency should
be less than the input source impedance to
prevent high frequency switching current from
passing to the input. Ceramic capacitors with
X5R
or
X7R
dielectrics
are
highly
recommended because of their low ESR and
small temperature coefficients. For most
applications, a 4.7µF capacitor is sufficient.
Selecting the Output Capacitor
The output capacitor keeps output voltage small
and ensures regulation loop stability. The
output capacitor impedance should be low at
the switching frequency. Ceramic capacitors
with X5R or X7R dielectrics are recommended.
Setting the Output OVP Threshold
The output OVP threshold is set by connecting
an external resistor divider (R3, R4 see the
typical application circuit on the front page) at
OVP pin. Choose R3 to be 39kΩ for lower
power dissipation. Then, R4 is given by:
MP2497 Rev. 1.12
12/22/2011
R3
VOVP
−1
VOVREF
(kΩ)
(11)
Where, VOVREF is the OVP reference, 1.23V.
VOVP is over voltage protection threshold.
Setting the Current Limit
The hiccup current limit can be set by the DC
resistance (DCR) of the inductor, as shown in
Figure 3a.
For more accurate sensing, use a more
accurate sense resistor.
Where ΔIL is the inductor ripple current.
IL(MAX) = ILOAD +
R4 =
In Figure 3a, the output current limit is set as:
IOUT _ L =
100mV
DCR
(12)
Where, DCR is the DC resistance of the
inductor winding. Ra and Ca is a low pass filter.
In Figure 3b, the output current limit is set as:
IOUT _ L =
100mV
RSENSE
(13)
SW
Ra
ISP
Ca
RS1
RS2
ISN
(a)
RSENSE
SW
RS1
ISP
RS2
ISN
(b)
Figure 3—Current Sensing Methods
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10
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
Programming the Short Circuit Current Limit
The hiccup current limit at output short
condition can be programmed to be lower by
external resisters (RS1, RS2, RS1=RS2), as shown
in figure 4.
When output voltage is lower than 200mV, the
current limit is described by:
100mV − 6.2μA × RS1
RSENSE
(15)
>65%) and high
output voltage (VOUT>12V) applications.
5V
RSENSE
SW
N
I
cycle operation (when
The current limit at output short condition is:
IOUT _ SL =
This diode is also recommended for high duty
T
U
(14)
It is recommended that an external bootstrap
diode be added when the system has a 5V
fixed input or the power supply generates a 5V
output. This helps improve the efficiency of the
regulator. The bootstrap diode can be a low
cost one such as IN4148 or BAT54.
V OV
IOUT _ SL × RSENSE + 6.2μA × RS1 = 100mV
External Bootstrap Diode
BS
MP2497
SW
ISP
RS1
ISN
RS2
6.2uA
200mV
Figure 4—Short Circuit Current Limit
PC Board Layout
The high frequency path (IN, SW and GND)
should be placed very close to the device with
short, direct and wide traces. The input
capacitor needs to be as close as possible to
the IN and GND pins. The external feedback
resistors should be placed next to the FB pin.
Keep the switching node SW short and away
from the feedback network.
MP2497 Rev. 1.12
12/22/2011
10nF
Figure 5—External Bootstrap Diode
Design Example
Below is a design example following the
application guidelines for the specifications:
VIN
VOUT
VOVP
FSW
IOUT-L
8 to 50V
5V
6V
100kHz
3A
The detailed application schematic is shown in
Figure 6. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
possible applications of this device, please refer
to related Evaluation Board Data Sheets.
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11
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
D1
NS
R6
0O
VCC
C2
2.2µF
VIN
C1
220µF
BST
SW
C6
0.1µF
L1
33µH
R10
100mO R11
910O
+
VIN
D2
PDS560
C11
0.1µF
R8
100O
OVP
R4
10kO
MP2497
GND
R9
50mO
C3
C4
C10
100µF 22µF 0.1µF
R3
39kO
R13
0O
V OUT
C5
0.1µF
C12
NS
GND
ISP
GND
FB
ISN
C7
10nF
R7
1kO
C8
10nF
R5
1kO
C9
150pF
R1
R2
301kO
57.6kO
R12
0O
Figure 6—Detailed Application Schematic
MP2497 Rev. 1.12
12/22/2011
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12
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
8
0.050(1.27)
0.024(0.61)
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
MP2497 Rev. 1.12
12/22/2011
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH
,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
13
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
8
0.124(3.15)
0.136(3.45)
5
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
4
TOP VIEW
B OTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SID E VIEW
0.050(1.27)
BSC
FR ON T VIEW
0.010(0.25)
x 45 o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.024(0.61)
0.050(1.27)
0 o-8 o
0.016(0.41)
0.050(1.27)
0.063(1.60)
D ETA IL " A"
0.103(2.62)
0.138(3.51)
R EC OMMEN D ED LA N D PA TTER N
0.213(5.40)
N OTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH
,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
14