TI1 LMC6772AIM Dual micropower rail-to-rail input cmos comparator with open drain output Datasheet

LMC6772
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SNOS749F – SEPTEMBER 1995 – REVISED MARCH 2013
Dual Micropower Rail-To-Rail Input CMOS Comparator with Open Drain Output
Check for Samples: LMC6772
FEATURES
DESCRIPTION
1
(Typical Unless Otherwise Noted)
2
•
•
•
•
•
•
•
•
Low Power Consumption (Max): IS = 10
μA/comp
Wide Range of Supply Voltages: 2.7V to 15V
Rail-to-Rail Input Common Mode Voltage
Range
Open Drain Output
Short Circuit Protection: 40 mA
Propagation Delay (@VS = 5V, 100 mV
Overdrive): 5 μs
LMC6772Q is AEC-Q Qualified
LMC6772Q has −40°C to 125°C Temperature
Range
APPLICATIONS
•
•
•
•
•
•
•
Laptop Computers
Mobile Phones
Metering Systems
Hand-Held Electronics
RC Timers
Alarm and Monitoring Circuits
Window Comparators, Multivibrators
The LMC6772 is an ultra low power dual comparator
with a maximum 10 μA/comparator power supply
current. It is designed to operate over a wide range of
supply voltages, with a minimum supply voltage of
2.7V.
The common mode voltage range of the LMC6772
exceeds both the positive and negative supply rails, a
significant advantage in single supply applications.
The open drain output of the LMC6772 allows for
wired-OR configurations. The open drain output also
offers the advantage of allowing the output to be
pulled to any voltage rail up to 15V, regardless of the
supply voltage of the LMC6772.
The LMC6772 is targeted for systems where low
power consumption is the critical parameter. Ensured
operation at supply voltages of 2.7V and rail-to-rail
performance makes this comparator ideal for batterypowered applications.
Refer to the LMC6762 datasheet for a push-pull
output stage version of this device.
Connection Diagram
8-Pin PDIP/SOIC/VSSOP - Top View
See Package Number P0008E/D0008A/DGK0008A
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2013, Texas Instruments Incorporated
LMC6772
SNOS749F – SEPTEMBER 1995 – REVISED MARCH 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
Value
ESD Tolerance (2)
Unit
1.5
kV
Differential Input Voltage
(V+)+0.3V to (V−)−0.3
V
Voltage at Input/Output Pin
(V+)+0.3V to (V−)−0.3
V
Supply Voltage (V+–V−)
16
V
Current at Input Pin (3)
±5
mA
±30
mA
40
mA
260
°C
−65°C to 150
°C
150
°C
Current at Output Pin (4)
(5)
Current at Power Supply Pin, LMC6772
Lead Temperature (Soldering, 10 seconds)
Storage Temperature Range
Junction Temperature (6)
(1)
(2)
(3)
(4)
(5)
(6)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
Human body model, 1.5 kΩ in series with 100 pF. The output pins of the two comparators (pin 1 and pin 7) have an ESD tolerance of
1.5 kV. All other pins have an ESD tolerance of 2 kV.
Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
Do not short circuit output to V+, when V+ is > 12V or reliability will be adversely affected.
The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) – TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Operating Ratings (1)
Value
Supply Voltage
Unit
2.7 ≤ VS ≤ 15
V
Junction Temperature Range
−40°C ≤ TJ ≤ 85
°C
−40°C ≤ TJ ≤ 125
°C
8-Pin PDIP
100
°C/W
8-Pin SOIC
172
°C/W
LMC6772AI, LMC6772BI
LMC6772Q
Thermal Resistance (θJA)
(1)
2
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
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2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Temperature
Drift
Input Offset Voltage Average
Drift
Conditions
Typ (1)
3
See (3)
LMC6772AI LMC6772BI
Limit (2)
Limit (2)
5
8
15
18
LMC6772Q
Limit (2)
Units
10
13
mV
max
2.0
μV/°C
3.3
μV/Mont
h
IB
Input Current
0.02
pA
IOS
Input Offset Current
0.01
pA
CMRR
Common Mode Rejection Ratio
75
dB
PSRR
Power Supply Rejection Ratio
±1.35V < VS < ±7.5V
80
dB
AV
Voltage Gain
(By Design)
100
dB
VCM
Input Common-Mode Voltage
Range
CMRR > 55 dB
3.0
2.9
2.7
2.9
2.7
2.9
2.7
V
min
−0.3
−0.2
0.0
−0.2
0.0
−0.2
0.2
V
max
VOL
Output Voltage Low
ILOAD = 2.5 mA
0.2
0.3
0.4
0.3
0.4
0.3
0.45
V
max
IS
Supply Current
For Both Comparators
(Output Low)
12
20
25
20
25
20
25
μA
max
ILeakage
Output Leakage Current
VIN(+) = 0.5V,
VIN(−) = 0V, VO = 15V
0.1
500
500
500
1000
nA
(1)
(2)
(3)
Typical Values represent the most likely parametric norm.
All limits are specified by testing or statistical analysis.
Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.
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5.0V and 15.0V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5.0V and 15.0V, V− = 0V, VCM = V+/2. Boldface limits apply
at the temperature extremes.
Symbol
Parameter
Conditions
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Temperature V+ = 5V
Drift
V+ = 15V
IB
Typ (1)
3
LMC6772AI LMC6772BI
Limit (2)
Limit (2)
5
8
15
18
LMC6772Q
Limit (2)
Units
10
13
mV
max
μV/°C
2.0
4.0
Input Offset Voltage Average
Drift
V+ = 5V (3)
3.3
V+ = 15V (3)
4.0
Input Current
V = 5V
0.04
pA
pA
+
IOS
Input Offset Current
V = 5V
0.02
CMRR
Common Mode Rejection Ratio
V+ = 5V
75
V+ = 15V
82
μV/Mont
h
dB
PSRR
Power Supply Rejection Ratio
±2.5V < VS < ±5V
80
AV
Voltage Gain
(By Design)
100
VCM
Input Common-Mode Voltage
Range
V+ = 5.0V
CMRR > 55 dB
5.3
5.2
5.0
5.2
5.0
5.2
5.0
V
min
−0.3
−0.2
0.0
−0.2
0.0
−0.2
0.0
Vmax
15.3
15.2
15.0
15.2
15.0
15.2
15.0
V
min
−0.3
−0.2
0.0
−0.2
0.0
−0.2
0.0
V
max
V+ = 5V
ILOAD = 5 mA
0.2
0.4
0.55
0.4
0.55
0.4
0.55
V
max
V+ = 15V
ILOAD = 5 mA
0.2
0.4
0.55
0.4
0.55
0.4
0.55
V
max
20
25
20
25
20
25
μA
max
+
V = 15.0V
CMRR > 55 dB
VOL
Output Voltage Low
IS
Supply Current
For Both Comparators
(Output Low)
12
ISC
Short Circuit Current
V+ = 15V, Sinking, VO =
12V (4)
45
(1)
(2)
(3)
(4)
4
dB
dB
mA
Typical Values represent the most likely parametric norm.
All limits are specified by testing or statistical analysis.
Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.
Do not short circuit output to V+, when V+ is > 12V or reliability will be adversely affected.
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AC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2. Boldface limits apply at the
temperature extreme.
Symbol
Parameter
Typ (1)
Conditions
LMC6772AI
Limit (2)
LMC6772BI
Limit (2)
Units
tRISE
Rise Time
f = 10 kHz, CL = 50 pF,
Overdrive = 10 mV (3)
0.3
μs
tFALL
Fall Time
f = 10 kHz, CL = 50 pF,
Overdrive = 10 mV (3)
0.3
μs
tPHL
Propagation Delay
(High to Low)
f = 10 kHz,
CL = 50 pF (3)
10 mV
10
μs
100 mV
4
μs
10
μs
V+ = 2.7V,
f = 10 kHz,
tPLH
Propagation Delay
(Low to High)
10 mV
CL = 50 pF (3)
100 mV
4
μs
f = 10 kHz,
CL = 50 pF (3)
10 mV
10
μs
100 mV
4
μs
8
μs
4
μs
+
V = 2.7V,
f = 10 kHz,
CL = 50 pF (3)
(1)
(2)
(3)
10 mV
100 mV
Typical Values represent the most likely parametric norm.
All limits are specified by testing or statistical analysis.
CL inlcudes the probe and jig capacitance. The rise time, fall time and propagation delays are measured with a 2V input step.
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Typical Performance Characteristics
+
V = 5V, Single Supply, TA = 25°C unless otherwise specified
6
Supply Current
vs.
Supply Voltage (Output High)
Supply Current
vs.
Supply Voltage (Output Low)
Figure 1.
Figure 2.
Input Current
vs.
Common-Mode Voltage
Input Current
vs.
Common-Mode Voltage
Figure 3.
Figure 4.
Input Current
vs.
Common-Mode Voltage
Input Current
vs.
Temperature
Figure 5.
Figure 6.
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Typical Performance Characteristics (continued)
+
V = 5V, Single Supply, TA = 25°C unless otherwise specified
ΔVOS
vs
ΔVCM, VS = 2.7V
ΔVOS
vs
ΔVCM, VS = 5V
Figure 7.
Figure 8.
ΔVOS
vs
ΔVCM, VS = 15V
Output Voltage
vs.
Output Current (Sinking)
Figure 9.
Figure 10.
Output Voltage
vs.
Output Current (Sinking)
Output Voltage
vs.
Output Current (Sinking)
Figure 11.
Figure 12.
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Typical Performance Characteristics (continued)
+
V = 5V, Single Supply, TA = 25°C unless otherwise specified
8
Output Short Circuit Current (Sinking)
vs.
Supply Voltage
Leakage Current
vs.
Output Voltage
Figure 13.
Figure 14.
Response Time for Overdrive (tPLH)
Response Time for Overdrive (tPHL)
Figure 15.
Figure 16.
Response Time for Overdrive (tPLH)
Response Time for Overdrive (tPHL)
Figure 17.
Figure 18.
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Typical Performance Characteristics (continued)
+
V = 5V, Single Supply, TA = 25°C unless otherwise specified
Response Time for Overdrive (tPLH)
Response Time for Overdrive (tPHL)
Figure 19.
Figure 20.
Response Time
vs.
Capacitive Load
Figure 21.
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LMC6772Q
Supply Current
vs.
Supply Voltage (Output High)
Supply Current
vs.
Supply Voltage (Output Low)
20
20
85°C
18
125°C
16
14
SUPPLY CURRENT (PA)
(Both Comparators)
SUPPLY CURRENT (PA)
(Both Comparators)
18
25°C
-40°C
12
10
8
6
4
-40°C
10
8
6
Pos Input = 0.0V
Neg Input = 0.1V
0
2 3 4 5 6 7 8 9 10 11 12 13 14 15
2 3 4 5 6 7 8 9 10 11 12 13 14 15
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
600
Figure 22.
Figure 23.
Output Voltage
vs.
Output Current (Sinking)
Output Voltage
vs.
Output Current (Sinking)
700
VS = 2.7V
VS = 5V
600
500
125°C
OUTPUT VOLTAGE (mV)
OUTPUT VOLTAGE (mV)
25°C
12
2
0
400
85°C
300
25°C
200
-40°C
100
125°C
500
85°C
400
25°C
300
200
-40°C
100
0
0
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
2
3
4
5
6
7
8
9
10
OUTPUT CURRENT (mA)
Figure 24.
Figure 25.
Output Voltage
vs.
Output Current (Sinking)
Output Short Circuit Current
vs.
Supply
OUTPUT SHORT CIRCUIT CURRENT (mA)
VS = 15V
600
125°C
500
85°C
400
300
25°C
200
-40°C
100
0
0
1
OUTPUT CURRENT (mA)
700
OUTPUT VOLTAGE (mV)
125°C
14
4
Pos Input = 0.1V
Neg Input = 0.0V
2
10
85°C
16
1
2
3
4
5
6
7
8
9
10
140
120
100
80
-40°C
60
25°C
40
85°C
20
125°C
0
2
3
4
5
6
7
8
9
10 11 12
OUTPUT CURRENT (mA)
SUPPLY VOLTAGE (V)
Figure 26.
Figure 27.
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LMC6772Q (continued)
Output Leakage
vs.
Output Voltage
100
125°C
OUTPUT LEAKAGE (nA)
10
85°C
0
0.1
25°C
0.01
0.001
-40°C (estimated)
VS = 2.7V
0.0001
2 3 4 5 6 7 8 9 10 11 12 13 14 15
OUTPUT VOLTAGE (V)
Figure 28.
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APPLICATION INFORMATION
INPUT COMMON-MODE VOLTAGE RANGE
At supply voltages of 2.7V, 5V and 15V, the LMC6772 has an input common-mode voltage range which exceeds
both supplies. As in the case of operational amplifiers, CMVR is defined by the VOS shift of the comparator over
the common-mode range of the device. A CMRR (ΔVOS/ΔVCM) of 75 dB (typical) implies a shift of < 1 mV over
the entire common-mode range of the device. The absolute maximum input voltage at V+ = 5V is 200 mV beyond
either supply rail at room temperature.
Figure 29. An Input Signal Exceeds the LMC6772 Power Supply Voltages with No Output Phase
Inversion
A wide input voltage range means that the comparator can be used to sense signals close to ground and also to
the power supplies. This is an extremely useful feature in power supply monitoring circuits.
An input common-mode voltage range that exceeds the supplies, 20 fA input currents (typical), and a high input
impedance makes the LMC6772 ideal for sensor applications. The LMC6772 can directly interface to sensors
without the use of amplifiers or bias circuits. In circuits with sensors which produce outputs in the tens to
hundreds of millivolts, the LMC6772 can compare the sensor signal with an appropriately small reference
voltage. This reference voltage can be close to ground or the positive supply rail.
LOW VOLTAGE OPERATION
Comparators are the common devices by which analog signals interface with digital circuits. The LMC6772 has
been designed to operate at supply voltages of 2.7V, without sacrificing performance, to meet the demands of 3V
digital systems.
At supply voltages of 2.7V, the common-mode voltage range extends 200 mV (ensured) below the negative
supply. This feature, in addition to the comparator being able to sense signals near the positive rail, is extremely
useful in low voltage applications.
Figure 30. Even at Low-Supply Voltage of 2.7V, an Input Signal which Exceeds the Supply Voltages
Produces No Phase Inversion at the Output
At V+ = 2.7V, propagation delays are tPLH = 4 μs and tPHL = 4 μs with overdrives of 100 mV. Please refer to the
performance curves for more extensive characterization.
12
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OUTPUT SHORT CIRCUIT CURRENT
The LMC6772 has short circuit protection of 40 mA. However, it is not designed to withstand continuous short
circuits, transient voltage or current spikes, or shorts to any voltage beyond the supplies. A resistor is series with
the output should reduce the effect of shorts. For outputs which send signals off PC boards additional protection
devices, such as diodes to the supply rails, and varistors may be used.
HYSTERESIS
If the input signal is very noisy, the comparator output might trip several times as the input signal repeatedly
passes through the threshold. This problem can be addressed by making use of hysteresis as shown below.
Figure 31. Canceling the Effect of Input Capacitance
The capacitor added across the feedback resistor increases the switching speed and provides more short term
hysteresis. This can result in greater noise immunity for the circuit.
SPICE MACROMODEL
A
•
•
•
Spice Macromodel is available for the LMC6772. The model includes a simulation of:
Input common-mode voltage range
Quiescent and dynamic supply current
Input overdrive characteristics
and many more characteristics as listed on the macromodel disk.
A SPICE macromodel of this and many other op amps is available at no charge from the WEBENCH Design
Center Team at www.ti.com
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TYPICAL APPLICATIONS
UNIVERSAL LOGIC LEVEL SHIFTER
The output of the LMC6772 is the uncommitted drain of the output NMOS transistor. Many drains can be tied
together to provide an output OR'ing function. An output pullup resistor can be connected to any available power
supply voltage within the permitted power supply range.
Figure 32. Universal Logic Level Shifter
The two 1 kΩ resistors bias the input to half of the power supply voltage. The pull-up resistor should go to the
output logic supply. Due to its wide operating range, the LMC6772 is ideal for the logic level shifting applications.
ONE-SHOT MULTIVIBRATOR
Figure 33. One-Shot Multivibrator
A monostable multivibrator has one stable state in which it can remain indefinitely. It can be triggered externally
to another quasi-stable state. A monostable multivibrator can thus be used to generate a pulse of desired width.
The desired pulse width is set by adjusting the values of C2 and R4. The resistor divider of R1 and R2 can be
used to determine the magnitude of the input trigger pulse. The LMC6772 will change state when V1 < V2. Diode
D2 provides a rapid discharge path for capacitor C2 to reset at the end of the pulse. The diode also prevents the
non-inverting input from being driven below ground.
BI-STABLE MULTIVIBRATOR
Figure 34. Bi-Stable Multivibrator
14
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A bi-stable multivibrator has two stable states. The reference voltage is set up by the voltage divider of R2 and
R3. A pulse applied to the SET terminal will switch the output of the comparator high. The resistor divider of R1,
R4, and R5 now clamps the non-inverting input to a voltage greater than the reference voltage. A pulse applied to
RESET will now toggle the output low.
ZERO CROSSING DETECTOR
Figure 35. Zero Crossing Detector
A voltage divider of R4 and R5 establishes a reference voltage V1 at the non-inverting input. By making the series
resistance of R1 and R2 equal to R5, the comparator will switch when VIN = 0. Diode D1 insures that V3 never
drops below −0.7V. The voltage divider of R2 and R3 then prevents V2 from going below ground. A small amount
of hysteresis is setup to ensure rapid output voltage transitions.
OSCILLATOR
Figure 36. Square Wave Generator
Figure 36 shows the application of the LMC6772 in a square wave generator circuit. The total hysteresis of the
loop is set by R1, R2 and R3. R4 and R5 provide separate charge and discharge paths for the capacitor C. The
charge path is set through R4 and D1. So, the pulse width t1 is determined by the RC time constant of R4 and C.
Similarly, the discharge path for the capacitor is set by R5 and D2. Thus, the time t2 between the pulses can be
changed by varying R5, and the pulse width can be altered by R4. The frequency of the output can be changed
by varying both R4 and R5.
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Figure 37. Time Delay Generator
The circuit shown above provides output signals at a prescribed time interval from a time reference and
automatically resets the output when the input returns to ground. Consider the case of VIN = 0. The output of
comparator 4 is also at ground. This implies that the outputs of comparators 1, 2, and 3 are also at ground.
When an input signal is applied, the output of comparator 4 swings high and C charges exponentially through R.
This is indicated above. The output voltages of comparators 1, 2, and 3 swtich to the high state when VC1 rises
above the reference voltages VA, VB and VC. A small amount of hysteresis has been provided to insure fast
switching when the RC time constant is chosen to give long delay times.
16
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REVISION HISTORY
Changes from Revision E (March 2013) to Revision F
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
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1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMC6772AIM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
-40 to 85
LMC67
72AIM
LMC6772AIM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
-40 to 85
LMC67
72AIM
LMC6772AIMM
NRND
VSSOP
DGK
8
1000
TBD
Call TI
Call TI
-40 to 85
C21
LMC6772AIMM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
C21
LMC6772AIMMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
C21
LMC6772AIMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 85
LMC67
72AIM
LMC6772AIMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
-40 to 85
LMC67
72AIM
LMC6772BIM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
-40 to 85
LMC67
72BIM
LMC6772BIM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
-40 to 85
LMC67
72BIM
LMC6772BIMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
-40 to 85
LMC67
72BIM
LMC6772BIMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
SN | CU SN
Level-1-260C-UNLIM
-40 to 85
LMC67
72BIM
LMC6772BIN
NRND
PDIP
P
8
40
TBD
Call TI
Call TI
-40 to 85
LMC6772
BIN
LMC6772BIN/NOPB
ACTIVE
PDIP
P
8
40
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 85
LMC6772
BIN
LMC6772QMM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AX5A
LMC6772QMMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AX5A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMC6772, LMC6772-Q1 :
• Catalog: LMC6772
• Automotive: LMC6772-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMC6772AIMM
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMC6772AIMM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMC6772AIMMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMC6772AIMX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMC6772AIMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMC6772BIMX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMC6772BIMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LMC6772QMM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMC6772QMMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMC6772AIMM
VSSOP
DGK
8
1000
210.0
185.0
35.0
LMC6772AIMM/NOPB
VSSOP
DGK
8
1000
210.0
185.0
35.0
LMC6772AIMMX/NOPB
VSSOP
DGK
8
3500
367.0
367.0
35.0
LMC6772AIMX
SOIC
D
8
2500
367.0
367.0
35.0
LMC6772AIMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LMC6772BIMX
SOIC
D
8
2500
367.0
367.0
35.0
LMC6772BIMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LMC6772QMM/NOPB
VSSOP
DGK
8
1000
210.0
185.0
35.0
LMC6772QMMX/NOPB
VSSOP
DGK
8
3500
367.0
367.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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Texas Instruments:
LMC6772AIM LMC6772AIM/NOPB LMC6772AIMM LMC6772AIMM/NOPB LMC6772AIMMX
LMC6772AIMMX/NOPB LMC6772AIMX LMC6772AIMX/NOPB LMC6772BIM LMC6772BIM/NOPB LMC6772BIMX
LMC6772BIMX/NOPB LMC6772BIN LMC6772BIN/NOPB LMC6772QMM/NOPB LMC6772QMMX/NOPB