Sanyo LA74310LP Monolithic linear ic audio interface for dsc video driver Datasheet

Ordering number : ENA0904
Monolithic Linear IC
LA74310LP
Audio Interface for DSC
+ Video Driver
Overview
The LA74310LP is an AV interface IC for digital still cameras (DSCs). It incorporates all the functions necessary for
analog audio signal processing for microphone and loudspeaker amplifiers. It also incorporates video output drivers that
require no output coupling capacity. The IC is ideal for reducing the number of components and further miniaturization of
digital still cameras.
Features
AUDIO INTERFACE block
• Three-wire type SERIAL communication • MIC AMP,
MIC power supply incorporated (with built-in pull-up resistor)
• ALC
• PB input method: Analog or digital for inputting (∆Σ) signal
• 3rd order LPF (for REC/PB switching control, option of fc=4kHz or 11kHz)
• SPEAKER AMP (The BEEP signal can be mixed.),
with electronic VOLUME (controlled by Serial communication)
• LINE output (with SERIAL MUTE)
• STANDBY control (current drain < 10µA)
VIDEO DRIVER block
• Not requires output coupling capacity
• Low voltage drive (VCC=2.7V to 3.6V)
• V sag does not occur
• 6th order LPF (fc=9MHz) is built-in.
• 0µA current dissipation on standby mode.
• 3 ways amplifier gains (6, 12, 16dB) can be selected. (Pin control (GND/Open/VCC))
• The video output has the capacity where one load of 75Ω impedance can be driven.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
91207 TI IM B8-9167 No.A0904-1/22
LA74310LP
Specifications
Maximum Ratings at Ta=25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VCC max
Allowable power dissipation
Pd max
Operating temperature
Topr
-10 to +80
°C
Storage temperature
Tstg
-55 to +150
°C
Ta≤80°C *
4.0
V
550
mW
* Substrate mounting condition (40mm × 50mm × 0.8mm: glass epoxy) 2S2P (Four layers substrate)
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
Conditions
Ratings
3.1
V
VCCA
3.0
V
3.3
V
VCC
2.7 to 3.6
V
VCCA
2.7 to 3.6
V
2.7 to 3.6
V
VCCSP
Allowable operating voltage range
Unit
VCC
VCCSP
Take care not to exceed Pd max.
Electrical Characteristics of AUDIO Block at Ta=25°C, VCCA=3.0V, VCCSP=3.3V, f=1kHz, with the VREF
capacitance charging circuit in the OFF MODE
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Circuit current
VCCA current dissipation at no signal 1
ICCA1
VCCA=3.0V
7
9.4
11.8
mA
VCCA current dissipation at no signal 2
ICCA2
VCCA=3.0V: REC BLOCK (MIC/ALC/REC AMP)
POWER SAVE MODE
5
6.7
8.4
mA
VCCA current dissipation at no signal 3
ICCA3
VCCA=3.0V: LINE AMP POWER SAVE MODE
6.5
8.7
10.9
mA
VCCA standby current dissipation
ICCAS
VCCA=3.0V: during standby control
(23PIN=0V application)
1
µA
Current dissipation at no signal 5
ICCSP1
VCCSP=3.3V: SPK POWER ON MODE
Current dissipation at no signal 6
ICCSP2
VCCSP=3.3V: SPK POWER SAVE MODE
VCCSP standby current dissipation
ICCSPS
VCCSP=3.3V: during standby control
(23PIN=0V application)
REC reference output LEVEL
VOR
ALC IN, VIN=-49dBV
REC reference output distortion
HDR
ALC IN, VIN=-49dBV, THD: from 2nd to 5th harmonic
ALC characteristics 1
ALM1
ALC IN, VIN=-33dBV (standard+16dB)
ALC distortion 1
ALMD1
ALC IN, VIN=-33dBV (standard+16dB),
THD: from 2nd to 5th harmonic
1.2
2.5
5
mA
0.05
0.1
mA
5.5
10
µA
-15.5
-14.5
0.05
0.1
%
-8
-5
dBV
0.15
0.5
%
-8
-5
dBV
0.2
1
%
REC output system
ALC characteristics 2
ALM2
ALC IN, VIN=-17dBV (standard+32dB)
ALC distortion 2
ALMD2
ALC IN, VIN=-17dBV (standard+32dB),
-16.5
-11
-11
THD: from 2nd to 5th harmonic
ALC IN max input level
VINRMX
ALC IN LEVEL at which REC output THD
-10
dBV
-77
-68
dBV
-3.5
-2
dB
-33
-25
dB
-60
-55
dB
(from 2nd to 5th harmonic) becomes 3% or less.
REC output noise voltage
VNOR
ALC IN, no input, JIS-A Filter
REC output frequency characteristics 1
FEQR1
ALC IN, VIN=-33dBV,
comparison of f=4kHz/1kHz
REC output frequency characteristics 2
FEQR2
ALC IN, VIN=-33dBV,
comparison of f=22kHz/1kHz
REC output frequency characteristics 3
FEQR3
ALC IN, VIN=-33dBV,
comparison of f=100kHz/1kHz
-5
dBV
Continued on next page.
No.A0904-2/22
LA74310LP
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
LINE output system
LINE reference output LEVEL
VOL
PB IN, VIN=-15dBV
-11
-10
LINE reference output distortion rate
HDL
PB IN, VIN=-15dBV, THD: from 2nd to 5th harmonic
0.1
0.2
%
LINE reference output noise voltage
VNOL
PB IN, no input, JIS-A Filter
-85
-77
dBV
PB IN max input LEVEL
VINPMX
-5
dBV
-3.5
-2
dB
-33
-25
dB
-65
-60
dB
-13
-11.5
-10
dBV
-5
-2
1
dBV
0.4
1
%
-12
PB IN LEVEL at which LINE output THD
(from 2nd to 5th harmonic) becomes 3% or less.
LINE output frequency characteristics 1
FEQP1
PB IN, VIN=-8dBV, comparison of f=4kHz/1kHz
LINE output frequency characteristics 2
FEQP2
PB IN, VIN=-8dBV, comparison of f=22kHz/1kHz
LINE output frequency characteristics 3
FEQP3
PB IN, VIN=-8dBV,
-5
comparison of f=100kHz/1kHz
LINE output level (∆Σ mode)
VIDVOL
PB IN, PWM signals, digital input MODE
(see supplements: p.8 Note26)
dBV
SP output system (SP load = as measured at both ends of 8Ω)
SP reference output LEVEL1 (Vol.MAX)
VOSP1
PB IN, VIN=-15dBV, Vol=MAX (Serial DATA=31)
SP reference output distortion
THDSP
PB IN, VIN=-15dBV, Vol=MAX,
THD: from 2nd to 5th harmonic
SP reference output LEVEL2 (Vol.TYP)
VOSP2
PB IN, VIN=-15dBV, Vol=TYP (Serial DATA=17)
-13
-7
dBV
SP reference output LEVEL3 (Vol.MIN)
VOSP3
PB IN, VIN=-15dBV, Vol=MIN (Serial DATA=0),
JIS-A Filter
-80
-70
dBV
SP reference output noise voltage
VNOSP
PB IN, no input, Vol=MAX, JIS-A Filter
-76
-70
dBV
SP maximum ratings output
VOMSP
PB IN, Vol=MAX, LEVEL at which THD=10%
-19
200
340
19
20
mW
MIC output system
MIC voltage gain
VGMIC
MIC IN, VIN=-39dBV
MIC output distortion
HDMIC
MIC IN, VIN=-39dBV, THD: from 2nd to 5th harmonic
MIC output noise voltage
VNOMIC
MIC IN, no input, JIS-A Filter
MIC IN max input level
VINMMX
VMIC
0.1
%
-94
-83
dBV
-22
dBV
1.7
1.9
V
1.25
1.5
MHz
MIC IN LEVEL at which the MIC output THD
At 6.2kΩ load
1.5
dB
0.02
(from 2nd to 5th harmonic) becomes 3% or less.
MIC VCC output voltage
21
Control system
Serial CLOCK frequency
FCLK
Serial input LOW level
SERLO
Serial input HIGH level
SERHI
0
0.7
V
2.3
3.5
V
No.A0904-3/22
LA74310LP
Electrical Characteristics of VIDEO Block at Ta=25°C, VCC=3.1V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Circuit current
VCC current dissipation 1 (VIN =White50%)
ICC
Input=White50%, 34PIN=Low
VCC current dissipation 2 (Non-signal mode)
ICC2
Input=no input, 34PIN=Low
VCC current dissipation 3 (Standby mode)
ICC-Stby
34pin=Open (High)
14
22
30
mA
7
11.5
15
mA
0
5
µA
dB
VIDEO block
Voltage gain V6
Vg-L
VIN=1Vpp 100% White, 32PIN=Low (GND)
5.7
6.2
6.7
Voltage gain V12
Vg-M
VIN=0.5Vpp 100% White, 32PIN=MID (Open)
11.7
12.2
12.7
dB
Voltage gain V16
Vg-H
VIN=0.317Vpp 100% White, 32PIN=High (VCC)
15.7
16.2
16.7
dB
Frequency characteristics
Vf
f=100kHz/5MHz
-1.5
-0.5
+0.5
dB
DG / Differential Gain
Dg
VOUT=2Vpp (Modulated Ramp)
-2.0
0.0
+2.0
%
DP / Differential Phase
Dp
VOUT=2Vpp (Modulated Ramp)
-2.0
0.0
+2.0
Deg
Vth-Stby-H
Voltage range of the pin 34 to achieve ICC≤5µA
VCC-0.5
VCC
V
GND
0.3
V
VCC-0.3
VCC
V
1.4
V
0.3
V
Control pin block
Standby control pin H voltage
(SET=STANDBY MODE)
Standby control pin L voltage
Vth-Stby-L
Voltage range of the pin 34 to achieve active
(SET=ACTIVE MODE)
mode
Gain selection control pin H voltage
Vth-G-H
Voltage range of the pin 32 to achieve an amp.
(SET=16dB)
gain of 16dB
Gain selection control pin M voltage
Vth-G-M
Voltage range of the pin 32 to achieve an amp.
(SET=12dB)
gain of 12dB
Gain selection control pin L voltage
Vth-G-L
Voltage range of the pin 32 to achieve an amp.
(SET=6dB)
gain of 6dB
1.0
GND
1.2
(Open)
Package Dimensions
unit : mm (typ)
3302A
Top View
Bottom View
0.35
5.0
40
(0.7)
0.4
5.0
31
0.35
30
21
20
11
0.05
0 NOM
0.85MAX
10
1
0.2
(0.7)
SANYO : VQLP40(5.0X5.0)
No.A0904-4/22
LA74310LP
Description of the Content of Serial Communication
DATA No.
Parameter
Default
0
DUMMY
1
LPF Cut-off frequency SW
0:11kHz, 1:4kHz
1
0
2
VREF capacitor charging circuit control SW
0:ON, 1:OFF
0
3
MIC AMP POWER SW
0:ON, 1:OFF
0
4
ALC AMP POWER SW
0:ON, 1:OFF
0
5
LPF1 MODE SW
0:PB MODE1, 1:REC MODE
0
6
LPF1/LPF2 selection SW
0:LPF1, 1:LPF2
0
7
REC BLOCK POWER SW
0:ON, 1:OFF
0
8
LINE OUT POWER SW
0:ON, 1:OFF
1
9
LINE MUTE SW
0:ON, 1:OFF
0
10
SPK POWER SW
0:ON, 1:OFF
1
11
DATA=1
1 1 1 1 1: VOL MAX
0
to
0
12
DATA=2
13
DATA=4
14
DATA=8
15
DATA=16
0 0 0 0 0: VOL MIN (MUTE)
0
* EVR setting (the numeral shown in the left is decimal.
For characteristics, see P12.)
0
0
Serial Transmission Timing
VIH
VIL
CS
tCS
tWH tWL
fMAX
tCH
tWC
VIH
CLOCK
VIL
tDS
tDH
VIH
DATA
VIL
LSB
• fMAX
• tWL
• tWH
• tCS
• tCH
• tDS
• tDH
• tWC
• VIH
• VIL
MSB
(Max clock frequency)
(Clock pulse width: Low)
(Clock pulse width: High)
(Chip enable setup time)
(Chip enable hold time)
(Data setup time)
(Data hold time)
(Chip enable pulse width)
(High voltage lower limit)
(Low voltage upper limit)
1.5MHz
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
2.3V to 3.5V
0V to 0.7V
No.A0904-5/22
LA74310LP
POWER ON Condition (SERIAL communication)
H
Power Supply
L
H
↑
HIGH to cancel STANDBY
STANDBY control
(Pin No 23)
L
H
HIGH period for about 2ms
POWER ON PULSE
(IC inside)
c
d
L
H
e
C.S.
f
L
Dummy communication
← First DATA →
communication
←
→
Delay of several
hundreds ns
H
POWER ON RESET
(IC inside)
g
L
POWER ON RESET state
→
←SERIAL communication condition
↑
First DATA hold
The POWER ON RESET state covers a period up to the rise f of the second C.S. input after fall d of POWER ON
PULSE c generated inside IC when the power is applied and the STANDBY control is canceled. e is the dummy
communication.
Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in g and the normal
SERIAL communication condition begins after g.
No.A0904-6/22
Pin
ICCA2
ICCA3
ICCAS
ICCS1
ICCS2
ICCSPS
2
3
4
5
6
7
29
29
29
16
16
16
VCCA=3.0V
No input
VCCA=3.0V
No input
VCCA=3.0V
No input
VCCSP=3.3V
No input
VCCSP=3.3V
No input
VCCSP=3.3V
No input
29
29
16
16
16
29
29
29
Pin
VCCA=3.0V
No input
Conditions
5
5
5
5
f=1kHz
No input
VIN=-33dBV
f=4kHz
VIN=-33dBV
f=22kHz
VIN=-33dBV
f=100kHz
7
7
7
7
7
14 VINRMX
VNOR
FEQR1
15
16
FEQR2
FEQR3
17
18
5&7
5
VIN=-17dBV
f=1kHz
7
ALMD2
13
5
VIN=-17dBV
f=1kHz
7
ALM2
12
5
VIN=-33dBV
f=1kHz
7
ALMD1
11
5
VIN=-33dBV
f=1kHz
7
ALM1
10
5
VIN=-49dBV
f=1kHz
7
HDR1
9
5
VIN=-49dBV
f=1kHz
VOR
8
7
REC output system
ICCA1
1
Circuit current
No. Symbol
Input
f=100kHz/1kHz level ratio
f=22kHz/1kHz level ratio
f=4kHz/1kHz level ratio
3.3V
3.3V
3.3V
3.3V
3.3V
400 to 20kHz LPF used
Pin 7 level at which pin 5 becomes
THD = 3% (from 2nd to 5th harmonic)
JIS-A FILTER used
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
0V
3.3V
3.3V
0V
3.3V
3.3V
3.3V
Voltage
applied to
pin 23
STANDBY
pin
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
400 to 20kHz LPF used
With the STANDBY pin (23PIN)=0V
VREF capacitance charging circuit in the OFF MODE
SPK AMP POWER SAVE MODE
VREF capacitance charging circuit in the OFF MODE
SPK AMP ON MODE
With the STANDBY pin (23PIN)=0V
VREF capacitance charging circuit in the OFF MODE
LINE AMP POWER SAVE MODE
VREF capacitance charging circuit in the OFF MODE
MIC/ALC/REC AMP POWER SAVE MODE
VREF capacitance charging circuit
in the OFF MODE
Major conditions
(for the serial control setting,
see the table in the right)
Output
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*
*
0
0:11kHz
1:4kHz
DMY
1
LPF
C SW
0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
CHRG
P SW
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
MIC
P SW
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
ALC
P SW
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0:ON
1:OFF
(0,1):PB Digital
(1,*):REC
(0,0):PB Analog
7
REC
P SW
6
LPF MODESW
5
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
0
0
0:ON
1:OFF
LINE
P SW
8
Serial control setting
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:ON
1:OFF
LINE
Mute
10
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0:ON
1:OFF
SPK
P SW
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
LA74310LP
Method of Measuring Electric Characteristics of AUDIO Block at Ta=25°C, VCCL=3.0V,
VCCSP=3.3V, f=1kHz VREF capacitor charging circuit OFF MODE
No.A0904-7/22
Pin
Conditions
2
2
2
2
2
2
HDL
VNOL
FEQP2
FEQP3
VIDVOL
21
22 VINPMX
FEQP1
20
23
24
25
26
VIN=-8dBV
f=4kHz
VIN=-8dBV
f=22kHz
VIN=-8dBV
f=100kHz
Input PWM signal
shown in Figure 26
f=1kHz
No input
VIN=-15dBV
f=1kHz
VIN=-15dBV
f=1kHz
400 to 20kHz LPF used
f=100kHz/1kHz level ratio
24
24
f=22kHz/1kHz level ratio
10
37
No.A0904-8/22
No input
f=1kHz
11
8 & 10
8
3.3V
3.3V
3.3V
400 to 20kHz LPF used Pin 10 level at which pin 8
becomes THD = 3% (from 2nd to 5th harmonic)
PIN 18:Measurement of output
voltage (under 6.2kΩ load)
3.3V
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
JIS-A FILTER used
3.3V
3.3V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:11kHz
1:4kHz
*
*
0
CHRG
P SW
LPF
C SW
DMY
0:ON
1:OFF
2
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
MIC
P SW
3
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
ALC
P SW
4
5
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
(0,1):PB Digital
(0,0):PB Analog
(1,*):REC
LPF MODESW
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0:ON
1:OFF
REC
P SW
7
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0:ON
1:OFF
LINE
P SW
8
Serial control setting
Supplements: (Note 26) The line out signal level shall be VIDVOL when inputting the PWM waveform in Figure 26 into the pin 2.
VMIC
10
36 VINMMX
No input
8
VIN=-39dBV
f=1kHz
10
10
HDMIC
34
8
VIN=-39dBV
f=1kHz
10
35 VNOMIC
VGMIC
33
MIC output system
f=1kHz
3.3V
3.3V
3.3V
3.3V
3.3V
400 to 20kHz LPF used
400 to 20kHz LPF used Level at which Vol=MAX
and THD=10% (from 2nd to 5th harmonic)
15
17
2
32 VOSSP
JIS-A FILTER used
Vol.=MAX
No input
15
17
2
31 VNOSP
JIS-A FILTER used
Vol.=MIN
15
17
VIN=-15dBV
f=1kHz
2
VOSP3
30
400 to 20kHz LPF used
Vol.=TYP
15
17
VIN=-15dBV
f=1kHz
2
VOSP2
29
400 to 20kHz LPF used
Vol.=MAX, THD: from 2nd to 5th harmonic
15
17
VIN=-15dBV
f=1kHz
2
THDSP
28
400 to 20kHz LPF used
Vol.=MAX
15
17
VIN=-15dBV
f=1kHz
2
VOSP1
27
3.3V
3.3V
3.3V
3.3V
3.3V
400 to 20kHz LPF used Pin 2 level at which pin 24
becomes THD = 3% (from 2nd to 5th harmonic)
f=4kHz/1kHz level ratio
3.3V
3.3V
JIS-A FILTER used
3.3V
400 to 20kHz LPF used
THD: from 2nd to 5th harmonic
Voltage
applied to
pin 23
STANDBY
pin
400 to 20kHz LPF used
Major conditions
(for the serial control setting,
see the table in the right)
24
24
24 & 2
24
24
24
Pin
Output
SPK output system (both ends of SPK: measured with 8Ω)
2
2
VOL1
19
LINE output system
No. Symbol
Input
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0:ON
1:OFF
LINE
Mute
9
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0:ON
1:OFF
SPK
P SW
10
0
0
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR1
DATA
11
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR2
DATA
12
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR4
DATA
13
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR8
DATA
14
0
0
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0:OFF
1:ON
EVR16
DATA
15
LA74310LP
LA74310LP
100%
15%
1kHz sine wave
PWM waveform input into the pin 2
4
3.3V
3
Voltage [V]
2
1
0V
0
-1
0.E+00
2.E-04
4.E-04
6.E-04
8.E-04
1.E-03
1.E-03
1.E-03
2.E-03
2.E-03
2.E-03
Time [s]
Figure 26. PWM waveform input into the pin 2 when measuring VIDVOL
No.A0904-9/22
LA74310LP
Description of Pin Functions
Pin No.
1
Pin Description
VCC (Power source for VIDEO)
Pin purpose
For VIDEO
2
PB input
For AUDIO
3
A GND
For AUDIO
4
NC
5
REC output
For AUDIO
6
ALC detection
For AUDIO
7
ALC input
For AUDIO
8
MIC output
For AUDIO
9
MIC GND
For AUDIO
10
MIC input
For AUDIO
11
INT power supply for MIC
For AUDIO
12
Ripple rejection for VREFL
For AUDIO
13
NC
14
SPK GND
For AUDIO
15
Speaker positive-phase output
For AUDIO
16
VCCSP
For AUDIO
17
Speaker negative-phase output
For AUDIO
18
SPK GND
For AUDIO
19
NC
20
Speaker input
For AUDIO
21
MIX output
For AUDIO
22
BEEP input
For AUDIO
23
STANDBY control
For AUDIO
24
LINE output
For AUDIO
25
C.S. input
For AUDIO
26
CLOCK input
For AUDIO
27
DATA input
For AUDIO
28
NC
29
VCCA
30
Analog GND
31
NC
For AUDIO
For VIDEO
32
Gain select pin
33
Video input
For VIDEO
For VIDEO
34
Power save mode select pin
For VIDEO
35
GND
For VIDEO
36
NC
37
CLOCK output
For VIDEO
38
Charge transfer
For VIDEO
39
Negative VCC
For VIDEO
40
Video output
For VIDEO
No.A0904-10/22
LA74310LP
LA74310LP Internal Equivalent Diagram and Recommended Circuit Diagram
To MCOM VDD
VCCA
DATA
CLOCK
CS
LINE STANDBY
LOW
OUT
BEEPIN
1µF
0.1µF
0.01µF
NC
30
29
28
27
26
25
24
23
22
21
0.047µF
LOGIC
MIX ratio
+
1:1
NC 31
20
MUTE
GAIN CTL
TO VCC
32
19
From
DAC
LPF
33
STANDBY HIGH
NC
EVR
1µF
- +
34
18
SPK
8Ω
17
VCCSP
16
+16dB
35
1µF
NC 36
CLOCKOUT
37
2.2µF
ND
VCCN
38
Minus
Voltage
Generator
15
See Table 2
LPF1
See Table 1
14
CB A
13 NC
CHARGE
LPF2
39
12
VREF
4.7µF
2.2µF
ALC
75Ω
Video
OUT
2
1
VCC
4.7µF
3
4
5
6
Input Zo=50kΩ
DET
40
7
11
70kΩ
+
2.2kΩ
MIC
VCC
8
9
10
0.01µF
NC
MIC IN
0.47µF
0.01µF
REC
OUT
1BiT
DA IN
ILA07164
NC PIN handling
This pin is electrically open and can be connected to GND with no problem.
However, we recommend you to make a foot pattern of a form similar to other pins to assure good balance after
mounting.
Table 1: Logic of external capacitor charging circuit
SERIAL
No.2
ON
0
OFF
1
Initially “ON”
Table 2: LPF SW control logic
SERIAL
No.5
A
1
No.6
*
B
0
0
C
0
1
*) Don’t care.
No.A0904-11/22
LA74310LP
LA74310LP EVR characteristics
10
0
-10
EVR attenuation (dB)
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
5
10
15
20
25
30
Serial data set value (decimal numbers)
Table of Input/Output Forms of LA74310LP (Audio Block)
Pin No.
Pin Name
DC voltage
2
PB IN
1.64V
AC voltage
Reference input level
Description of functions
Equivalent circuit diagram in pin
PB input pin
VCCA(=3.0V)
=-15dBV
∆ΣSignal
input MODE
Maximum input level
= -5dBV
In analog input mode
7.5kΩ 17.5kΩ
2
= 3.465Vpp
25kΩ
In ∆Σ input mode
VREFL
3
A GND
4
NC
5
REC OUT
0V
Analog Signal
Input MODE
GND pin for analog signal part
NC pin
1.50V
At PB reference input
REC output pin
VCCA(=3.0V)
Output level = -15dBV
500Ω
20kΩ
5
3kΩ
VREF
Continued on next page.
No.A0904-12/22
LA74310LP
Continued from preceding page.
Pin No.
Pin Name
6
ALC DET
DC voltage
AC voltage
Description of functions
Equivalent circuit diagram in pin
ALC detection pin
VCCA(=3.0V)
1kΩ
6
500Ω
7
ALC IN
1.64V
At MIC reference input
ALC input pin
VCCA(=3.0V)
Output level = -49dBV
Max input level
500Ω
=-10dBV
7
50kΩ
VREF
8
MIC OUT
1.6V
At MIC reference input
MIC output pin
VCCA(=3.0V)
Output level = -49dBV
9.7kΩ
500Ω
8
1kΩ
VREF
9
MIC GND
0V
10
MIC IN
1.64V
For MIC Amp blocking GND pin
Reference input level
MIC input pin
VCCA(=3.0V)
=-69dBV
Maximum input level
=-30dBV
500Ω
10
70kΩ
VREFL
11
MIC VCC
2.30V
MIC power pin
VCCA(=3.0V)
2.2kΩ
11
23kΩ
Continued on next page.
No.A0904-13/22
LA74310LP
Continued from preceding page.
Pin No.
Pin Name
DC voltage
12
VREFL
2.30V
AC voltage
Description of functions
Equivalent circuit diagram in pin
MIC VCC and VREFL ripple
VCCA(=3.0V)
rejection pin
400Ω
12
500Ω
200kΩ
13
NC
NC pin
14
SP GND
0V
15
SPK OUT+
1.27V
Speaker GND pin
At PB reference input
Speaker positive-phase output
Output level = -8dBV
pin
VCCSP(=3.3V)
(EVR MAX)
10kΩ
15
10.7kΩ
17
16
VCCSP
3.3V
17
SP OUT-
1.27V
Speaker power pin
At PB reference input
Pin for output of speaker reversed
Output level = -8dBV
phase
VCCSP(=3.3V)
(EVR MAX)
10kΩ 11kΩ
20
20
SPK IN
1.27V
At PB reference input
17
Speaker input pin
Output level = -8dBV
(EVR MAX)
18
SP GND
19
NC
21
MIX OUT
0V
Speaker GND pin
NC pin
1.58V
At PB reference input
VCCA(=3.0V)
EVR output pin
Output level = -8dBV
400Ω
35kΩ
21
3.9kΩ
VREFL
22
BEEP IN
1.64V
Maximum input level
VCCA(=3.0V)
= -8dBV
2kΩ
22
2kΩ
VREFL
Continued on next page.
No.A0904-14/22
LA74310LP
Continued from preceding page.
Pin No.
Pin Name
23
STANDBY L
DC voltage
AC voltage
Description of functions
Equivalent circuit diagram in pin
STANDBY control pin
45kΩ
2V or more:
23
STANDBY canceled
40kΩ
24
LINE OUT
1.52V
At PB reference input
LINE output pin
VCCA(=3.0V)
Output level = -11dBV
232kΩ
26kΩ
24
500Ω
10.5kΩ
VREFL
25
CS
26
CLOCK
CS input pin
CLOCK input pin
25
500Ω
26
27
DATA input pin
DATA
28
NC
29
VCCA
27
NC pin
3.0V
Power pin for analog signal part
Table of Input/Output Forms of LA74310LP (Video Block)
Pin No.
Pin Name
DC voltage
1
VCC
2.7V
Description of functions
Equivalent circuit diagram in pin
to
3.6V
30
A-GND
31
NC
32
GAIN CTL
0V
Analog GND
NC pin
1.2V
Gain select pin
1
Control of Pin2
VCC
GAIN
H (VCC)
⇒
16dB
M (OPEN)
⇒
12dB
L (GND)
⇒
6dB
2.16V
100kΩ
REF
1.2V
BUF
2kΩ
32
0.72V
35
GND
Continued on next page.
No.A0904-15/22
LA74310LP
Continued from preceding page.
Pin No.
Pin Name
DC voltage
33
VIN
1.1V
Description of functions
Equivalent circuit diagram in pin
Video input terminal
(Sync-tip clamp (input High-impedance))
VCC
1
GAIN SET: 6dB 1.0Vpp
GAIN SET: 12dB 500mVpp
GAIN SET: 16dB 317mVpp
2kΩ
2kΩ
200Ω
33
35
200Ω
VIN
2kΩ
Active:On
Standby:Off
26kΩ
GND
1.05V
34
PSAVCTL
VCC
or
Power save mode select pin
0V
Control of Pin4
VCC
1
50kΩ
MODE
50kΩ
OPEN
H (VCC)
or
50kΩ
⇒
STANDBY
⇒
ACTIVE
VCC±0.5V
L (GND)
0V to 0.3V
PSAVCTL
35
35
GND
36
NC
37
CLKOUT
4kΩ
34
GND
0V
NC pin
+3.0V
Pin37: Clock output terminal
0V
VCC
1
VCC=3.1V
↑↓
3V
37
2V
CLKOUT
37pin
50kΩ
1V
50kΩ
50kΩ
0V
2.4V
GND
38
ND
+0.5V
↑↓
39pin
-2V
-2.6V
(-VCC)
35
-1V
38pin
-3V
1
35
VCC
GND
Pin38: The terminal which transmits
an electric charge
39
VCCN
0V
100kΩ
Pin39: Negative VCC
VCCIN
39
↑↓
-2.5V
(-VCC)
50kΩ
38
40
VOUT
0V
GND
Video output terminal
(Push-pull output Low-impedance)
1
VCC
50kΩ
ACTIVE:Low-impedance
STANDBY:High-impedance
1.4V
500Ω
+
40
VOUT
2Vpp
0V
35
GND
-0.6V
-
100kΩ
50kΩ
39
VCCIN
No.A0904-16/22
LA74310LP
POP Sound Avoiding Sequence
1Upon STANDBY cancellation & control (PBMODE)
Power Supply
(VCCA &
VCCSP)
STANDBY pin
(23PIN)
CS
CLOCK
=Don’t care
=CLOCK
Optional
After 10ms
After 200ms
Before 10ms
After 20ms
DATA sending timing
After 50ms
T0
T1
T2
0
1
DMY
C SW
T3
After 150ms (When pin 24
capacitance is 0.1µF)
T4
T5
T6
T7
T8
Recommended serial control settings
LPF
Timing
Communication content
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 0):
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T1
Standby cancellation
DATA unnecessary
Dummy communication
T2
(only CS)
T3
VREF charging circuit: OFF
0
0/1
1
1
1
0
0/1
1
1
0
1
0
0
0
0
0
T4
Speaker AMP: ON
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
T5
Line AMP: ON
0
0/1
1
1
1
0
0/1
1
0
1
0
0
0
0
0
0
T6
Return to the initial state
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
T7
Standby control
DATA unnecessary
No.A0904-17/22
LA74310LP
2Upon STANDBY cancellation & control (RECMODE)
Power Supply
(VCCA &
VCCSP)
STANDBY pin
(23PIN)
CS
CLOCK
=Don’t care
=CLOCK
Optional
After 10ms
After 200ms
Before 10ms
After 20ms
DATA sending timing
After 30ms
T0
T1
T2
T3
T4
T5
T6
T7
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 0):
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T1
Standby cancellation
DATA unnecessary
Dummy communication
T2
(only CS)
T4
Charging circuit & ALC: OFF,
LPF: REC
ALC: ON
T5
Return to the initial state
T6
Standby control
T3
0
0/1
1
0
1
1
0
0
1
0
1
0
0
0
0
0
0
0/1
1
0
0
1
0
0
1
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
DATA unnecessary
No.A0904-18/22
LA74310LP
3REC → PB (SPK) Switching
4PB (SPK) → REC Switching
CS
CLOCK
=Don’t care
=CLOCK
After 20ms or more
(Capacitance between pins
20&21: 0.1µF)
Optional
DATA sending timing
T0
T1
T2
After 20ms or more
(Capacitance between pins
20&21: 0.1µF)
T3
T4
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
11
12
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
(0, 0):
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T0
Speaker AMP: ON
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
T1
PBMODE: switching EVR: setting
0
0/1
1
1
1
0
0/1
1
1
0
1
a
a
a
a
a
T2
Speaker AMP: ON
0
0/1
1
1
1
0
0/1
1
1
0
0
a
a
a
a
a
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
0
0/1
1
0
0
1
0/1
0
1
0
0
0
0
0
0
0
11
12
13
14
15
T3
RECMODE: switching EVR: MUTE
Speaker AMP: OFF
T4
Speaker AMP: ON
5REC → PB (LINE) Switching
6PB(LINE) → REC Switching
CS
CLOCK
=Don’t care
=CLOCK
DATA sending timing
After 5ms or more
T0
T1
T2
Recommended serial control settings
0
1
DMY
C SW
LPF
Timing
Communication content
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
(0, 0):
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T0
PBMODE: switching
0
0/1
1
1
1
0
0/1
1
1
0
1
0
0
0
0
0
T1
Line AMP: ON Line MUTE: OFF
0
0/1
1
1
1
0
0/1
1
0
1
1
0
0
0
0
0
0
0/1
1
0
0
1
0/1
0
1
0
1
0
0
0
0
0
T2
RECMODE: switching
Line AMP: ON Line MUTE: OFF
No.A0904-19/22
LA74310LP
7EVR Switching (min → max) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
11
12
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
(0, 0):
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T0
EVRDATA=0
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
T1
EVRDATA=7
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
0
T2
EVRDATA=8
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
0
T3
EVRDATA=9
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
0
T4
EVRDATA=10
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
0
T5
EVRDATA=11
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
0
T6
EVRDATA=12
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
0
T7
EVRDATA=13
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
0
T8
EVRDATA=14
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
0
T9
EVRDATA=15
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
0
T10
EVRDATA=16
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
1
T11
EVRDATA=17
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
0
1
T12
EVRDATA=18
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
0
1
T13
EVRDATA=19
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
0
1
T14
EVRDATA=20
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
0
1
T15
EVRDATA=21
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
0
1
T16
EVRDATA=22
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
0
1
T17
EVRDATA=23
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
1
T18
EVRDATA=24
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
1
T19
EVRDATA=25
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
1
T20
EVRDATA=26
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
1
T21
EVRDATA=27
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
1
T22
EVRDATA=28
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
1
T23
EVRDATA=29
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
1
T24
EVRDATA=30
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
1
T25
EVRDATA=31
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
1
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A0904-20/22
LA74310LP
8EVR Switching (max → min) 0.25ms/CS
CS
DATA sending timing
T0
T1
T2
T3
T4
T5
T6
T19 T20 T21 T22 T23
T24
T25
11
12
Recommended serial control settings
0
1
LPF
Timing
Communication content
DMY
C SW
2
3
CHRG MIC
4
ALC
5
6
7
LPF MODESW REC
P SW P SW P SW
8
9
LINE
LINE
10
13
14
15
SPK EVR1 EVR2 EVR4 EVR8 EVR16
P SW P SW MUTE P SW DATA DATA DATA DATA DATA
(1, *): REC
*
0:11kHz 0:ON 0:ON 0:ON
(0, 0):
0:ON 0:ON 0:ON 0:ON 0:OFF 0:OFF 0:OFF 0:OFF 0:OFF
PB Analog
*
(0, 1):
1:4kHz 1:OFF 1:OFF 1:OFF
1:OFF 1:OFF 1:OFF 1:OFF 1:ON 1:ON 1:ON 1:ON 1:ON
PB Digital
T0
EVRDATA=31
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
1
T1
EVRDATA=30
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
1
T2
EVRDATA=29
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
1
T3
EVRDATA=28
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
1
T4
EVRDATA=27
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
1
T5
EVRDATA=26
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
1
T6
EVRDATA=25
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
1
T7
EVRDATA=24
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
1
T8
EVRDATA=23
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
1
T9
EVRDATA=22
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
0
1
T10
EVRDATA=21
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
0
1
T11
EVRDATA=20
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
0
1
T12
EVRDATA=19
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
0
1
T13
EVRDATA=18
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
0
1
T14
EVRDATA=17
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
0
1
T15
EVRDATA=16
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
1
T16
EVRDATA=15
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
1
0
T17
EVRDATA=14
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
1
1
0
T18
EVRDATA=13
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
1
1
0
T19
EVRDATA=12
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
1
1
0
T20
EVRDATA=11
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
0
1
0
T21
EVRDATA=10
0
0/1
1
1
1
0
0/1
1
1
0
0
0
1
0
1
0
T22
EVRDATA=9
0
0/1
1
1
1
0
0/1
1
1
0
0
1
0
0
1
0
T23
EVRDATA=8
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
1
0
T24
EVRDATA=7
0
0/1
1
1
1
0
0/1
1
1
0
0
1
1
1
0
0
T25
EVRDATA=0
0
0/1
1
1
1
0
0/1
1
1
0
0
0
0
0
0
0
Note) DATA1 to 6 are the mute area of EVR characteristics and jumped due to no generation of POP noise.
No.A0904-21/22
LA74310LP
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
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to change without notice.
PS No.A0904-22/22