MC74VHC1G01 Single 2-Input NAND Gate with Open Drain Output The MC74VHC1G01 is an advanced high speed CMOS 2−input NAND gate with an open drain output fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including an open drain output which provides the ability to set output switching level. This allows the MC74VHC1G01 to be used to interface 5 V circuits to circuits of any voltage between VCC and 7 V using an external resistor and power supply. The MC74VHC1G01 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. www.onsemi.com MARKING DIAGRAMS 5 Features • • • • • • • M SC−88A / SOT−353 / SC−70 DF SUFFIX CASE 419A 1 V0 M G G High Speed: tPD = 3.7 ns (Typ) at VCC = 5 V Low Internal Power Dissipation: ICC = 1 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs TSOP−5 / SOT−23 / SC−59 DT SUFFIX CASE 483 Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 62 NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant IN B 1 5 V0 M G V0 M G G = Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. VCC PIN ASSIGNMENT OVT 1 IN A GND 2 3 4 OUT Y IN B 2 IN A 3 GND 4 OUT Y 5 VCC FUNCTION TABLE Figure 1. Pinout (Top View) IN A IN B & Inputs OUT Y Output A B Y L L H H L H L H Z Z Z L Figure 2. Logic Symbol ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2016 December, 2016 − Rev. 16 1 Publication Order Number: MC74VHC1G01/D MC74VHC1G01 MAXIMUM RATINGS Symbol Parameter VCC DC Supply Voltage VIN DC Input Voltage VOUT DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IOUT DC Output Sink Current, per Pin ICC DC Supply Current, VCC and GND Pin TSTG Value Unit *0.5 to )7.0 V −0.5 to +7.0 V *0.5 to VCC )0.5 V VOUT t GND; VOUT u VCC Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature Under Bias qJA Thermal Resistance PD Power Dissipation in Still Air at 85°C MSL Moisture Sensitivity FR Flammability Rating VESD Latchup Performance mA mA 25 mA $25 mA *65 to )150 °C 260 °C )150 °C SC70−5/SC−88A (Note 1) TSOP−5 350 230 °C/W SC70−5/SC−88A TSOP−5 150 200 mW Level 1 Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) u2000 u200 N/A V Above VCC and Below GND at 125°C (Note 5) $500 mA ESD Withstand Voltage ILATCHUP −20 $20 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0.0 5.5 V DC Output Voltage 0.0 7.0 V Operating Temperature Range −55 +125 °C 0 0 100 20 ns/V VOUT TA tr , tf VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V Input Rise and Fall Time Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 TJ = 80°C 117.8 419,300 TJ = 90°C 1,032,200 90 TJ = 100°C 80 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110°C Time, Years TJ = 120°C Time, Hours TJ = 130°C Junction Temperature °C NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES 1 1 10 100 1000 TIME, YEARS 140 8,900 1.0 Figure 3. Failure Rate vs. Time Junction Temperature www.onsemi.com 2 MC74VHC1G01 DC ELECTRICAL CHARACTERISTICS VCC Symbol Parameter Test Conditions (V) Min 1.5 2.1 3.15 3.85 VIH Minimum High−Level Input Voltage 2.0 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage 2.0 3.0 4.5 5.5 VOL Maximum Low−Level Output Voltage VIN = VIH or VIL TA v 855C TA = 255C Typ Max Min Max 1.5 2.1 3.15 3.85 *555C v TA v 1255C Min Max 1.5 2.1 3.15 3.85 Unit V 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 0.0 0.0 0.0 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 ILKG Z−State Output Leakage Current VIN = VIL VOUT = VCC or GND 5.5 $5 $10 $10 mA IIN Maximum Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 $0.1 $1.0 $1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.0 20 40 mA IOFF Power Off−Output Leakage Current VOUT = 5.5 V VIN = 5.5 V 0 0.25 2.5 5 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns TA ≤ 85°C TA = 25°C Symbol tPZL tPLZ CIN Typ Max Max Unit Maximum Output Enable Time, Input A or B to Y VCC = 3.3 ± 0.3 VCL = 15 pF RL = RI = 500 WCL = 50 pF 5.5 8.0 7.9 11.4 9.5 13.0 11.0 15.5 ns VCC = 5.0 ± 0.5 VCL = 15 pF RL = RI = 500 WCL = 50 pF 3.7 5.2 5.5 7.5 6.5 8.5 8.0 10.0 Maximum Output Disable Time VCC = 3.3 ± 0.3 V CL = 50 pF RL = RI = 500 W 8.0 11.4 13.0 15.5 VCC = 5.0 ± 0.5 V CL = 50 pF RL = RI = 500 W 5.2 7.5 8.5 10.0 4 10 10 10 Parameter Min Test Conditions Maximum Input Capacitance Min Max −55 ≤ TA ≤ 125°C Min ns pF Typical @ 25°C, VCC = 5.0V 18 CPD Power Dissipation Capacitance (Note 6) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. www.onsemi.com 3 MC74VHC1G01 VCC VCC − 7 V VCC A or B 50% OVT A GND RL tPZL tPLZ HIGH IMPEDANC B 50% VCC Y Figure 4. Output Voltage Mismatch Application VOL +0.3 V Figure 5. Switching Waveforms VCC VCC x 2 R1 PULSE GENERATOR DUT RT CL RL CL = 50 pF equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W) Figure 6. Test Circuit MC74VHC1G01 VCC VCC A 2.2 kW B MC74VHC1G03 C B 1 A 2 5 R LED 220 W A B 3 E = (A • B) + (C+D) D MC74VHC1G01 1.5 V 3.3 V VCC Figure 7. Complex Boolean Functions 4 Figure 8. LED Driver GTL Figure 9. GTL Driver ORDERING INFORMATION Device Package Shipping† SC−88A / SC70−5 / SOT−353 (Pb−Free) 3000 Units / Tape & Reel TSOP−5 / SOT23−5 / SC59−5 (Pb−Free) 3000 Units / Tape & Reel MC74VHC1G01DFT1G NLV74VHC1G01DFT1G* MC74VHC1G01DFT2G MC74VHC1G01DTT1G NLV74VHC1G01DTT1G* †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 4 MC74VHC1G01 PACKAGE DIMENSIONS SC−88A CASE 419A−02 ISSUE L A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N J C K H SOLDER FOOTPRINT 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 www.onsemi.com 5 SCALE 20:1 mm Ǔ ǒinches INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 MC74VHC1G01 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE M NOTE 5 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X 0.20 C A B 0.10 T M 2X 0.20 T B 5 1 4 2 S 3 K B DETAIL Z G A A TOP VIEW DETAIL Z J C 0.05 H SIDE VIEW C SEATING PLANE MILLIMETERS MIN MAX 2.85 3.15 1.35 1.65 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 0_ 10 _ 2.50 3.00 DIM A B C D G H J K M S END VIEW SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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