LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 LM7171 Very High Speed, High Output Current, Voltage Feedback Amplifier Check for Samples: LM7171 FEATURES DESCRIPTION • • • • • • • • • • The LM7171 is a high speed voltage feedback amplifier that has the slewing characteristic of a current feedback amplifier; yet it can be used in all traditional voltage feedback amplifier configurations. The LM7171 is stable for gains as low as +2 or −1. It provides a very high slew rate at 4100V/μs and a wide unity-gain bandwidth of 200 MHz while consuming only 6.5 mA of supply current. It is ideal for video and high speed signal processing applications such as HDSL and pulse amplifiers. With 100 mA output current, the LM7171 can be used for video distribution, as a transformer driver or as a laser diode driver. 1 23 (Typical Unless Otherwise Noted) Easy-to-Use Voltage Feedback Topology Very High Slew Rate: 4100 V/μs Wide Unity-Gain Bandwidth: 200 MHz −3 dB Frequency @ AV = +2: 220 MHz Low Supply Current: 6.5 mA High Open Loop Gain: 85 dB High Output Current: 100 mA Differential Gain and Phase: 0.01%, 0.02° Specified for ±15V and ±5V Operation APPLICATIONS • • • • • • • • HDSL and ADSL Drivers Multimedia Broadcast Systems Professional Video Cameras Video Amplifiers Copiers/Scanners/Fax HDTV Amplifiers Pulse Amplifiers and Peak Detectors CATV/Fiber Optics Signal Processing Operation on ±15V power supplies allows for large signal swings and provides greater dynamic range and signal-to-noise ratio. The LM7171 offers low SFDR and THD, ideal for ADC/DAC systems. In addition, the LM7171 is specified for ±5V operation for portable applications. The LM7171 is built on TI's advanced VIP™ III (Vertically integrated PNP) complementary bipolar process. Typical Performance Figure 1. Large Signal Pulse Response AV = +2, VS = ±15V 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VIP is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) 2.5 kV Supply Voltage (V+–V−) Differential Input Voltage 36V (3) Output Short Circuit to Ground ±10V (4) Continuous −65°C to +150°C Storage Temperature Range Maximum Junction Temperature (1) (2) (3) (4) (5) (5) 150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not specified. For ensured specifications and the test conditions, see the Electrical Characteristics. Human body model, 1.5 kΩ in series with 100 pF. Input differential voltage is applied at VS = ±15V. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)–TA)/θJA. All numbers apply for packages soldered directly into a PC board. Operating Ratings (1) 5.5V ≤ VS ≤ 36V Supply Voltage Junction Temperature Range −40°C ≤ TJ ≤ +85°C LM7171AI, LM7171BI Thermal Resistance (θJA) (1) 2 8-Pin PDIP 108°C/W 8-Pin SOIC 172°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not specified. For ensured specifications and the test conditions, see the Electrical Characteristics. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 ±15V DC Electrical Characteristics Unless otherwise noted, all limits are specified for TJ = 25°C, V+ = +15V, V− = −15V, VCM = 0V, and RL = 1 kΩ. Boldface limits apply at the temperature extremes Symbol VOS Parameter Conditions Input Offset Voltage Typ (1) 0.2 TC VOS Input Offset Voltage Average Drift 35 IB Input Bias Current 2.7 IOS Input Offset Current RIN Input Resistance RO Open Loop Output Resistance CMRR Common Mode Rejection Ratio PSRR 0.1 40 Differential Mode 3.3 VCM = ±10V Power Supply Rejection Ratio VS = ±15V to ±5V Input Common-Mode Voltage Range AV Large Signal Voltage Gain (3) Output Swing CMRR > 60 dB RL = 1 kΩ 105 90 85 RL = 100Ω 81 RL = 1 kΩ 13.3 RL = 100Ω Output Current (Open Loop) (4) Units 1 3 mV 4 7 max μV/°C 10 10 μA 12 12 max 4 4 μA 6 6 max MΩ Ω 85 75 dB 80 70 min 85 75 dB 80 70 min V 80 75 dB 75 70 min 75 70 dB 70 66 min 13 13 V 12.7 12.7 min −13 −13 V −12.7 −12.7 max 11.8 10.5 10.5 V 9.5 9.5 min −10.5 −9.5 −9.5 V −9 −9 max 105 105 mA 95 95 min 95 95 mA 90 90 max Sourcing, RL = 100Ω 118 Sinking, RL = 100Ω 105 Output Current (in Linear Region) Sourcing, RL = 100Ω 100 Sinking, RL = 100Ω 100 ISC Output Short Circuit Current Sourcing 140 Sinking 135 IS Supply Current (4) Limit (2) ±13.35 −13.2 (1) (2) (3) LM7171BI Limit (2) 15 VCM VO Common Mode LM7171AI 6.5 mA mA 8.5 8.5 mA 9.5 9.5 max Typical values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15V, VOUT = ±5V. For VS = ±5V, VOUT = ±1V. The open loop output current is specified, by the measurement of the open loop output voltage swing, using 100Ω output load. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 3 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com ±15V AC Electrical Characteristics Unless otherwise noted, TJ = 25°C, V+ = +15V, V− = −15V, VCM = 0V, and RL = 1 kΩ. Symbol SR Parameter Slew Rate Conditions (3) AV = +2, VIN = 13 VPP 4100 AV = +2, VIN = 10 VPP 3100 Unity-Gain Bandwidth −3 dB Frequency Typ (1) AV = +2 LM7171AI Limit (2) LM7171BI Limit Units (2) V/μs 200 MHz 220 MHz 50 Deg φm Phase Margin ts Settling Time (0.1%) AV = −1, VO = ±5V RL = 500Ω 42 ns tp Propagation Delay AV = −2, VIN = ±5V, RL = 500Ω 5 ns AD Differential Gain 0.01 % φD (4) Differential Phase (4) Second Harmonic Distortion (5) Third Harmonic Distortion (5) 0.02 Deg fIN = 10 kHz −110 dBc fIN = 5 MHz −75 dBc fIN = 10 kHz −115 dBc fIN = 5 MHz −55 dBc en Input-Referred Voltage Noise f = 10 kHz 14 nV/√Hz in Input-Referred Current Noise f = 10 kHz 1.5 pA/√Hz (1) (2) (3) (4) (5) 4 Typical values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Slew Rate is the average of the raising and falling slew rates. Differential gain and phase are measured with AV = +2, VIN = 1 VPP at 3.58 MHz and both input and output 75Ω terminated. Harmonics are measured with VIN = 1 VPP, AV = +2 and RL = 100Ω. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 ±5V DC Electrical Characteristics Unless otherwise noted, all limits are specified for TJ = 25°C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Boldface limits apply at the temperature extremes Symbol VOS Parameter Conditions Input Offset Voltage Typ (1) 0.3 TC VOS Input Offset Voltage Average Drift 35 IB Input Bias Current 3.3 IOS Input Offset Current RIN Input Resistance 0.1 Common Mode 40 Differential Mode 3.3 RO Output Resistance CMRR Common Mode Rejection Ratio VCM = ±2.5V 104 PSRR Power Supply Rejection Ratio VS = ±15V to ±5V 90 VCM Input Common-Mode Voltage Range CMRR > 60 dB AV Large Signal Voltage Gain (3) RL = 1 kΩ Output Swing RL = 1 kΩ RL = 100Ω Output Current (Open Loop) (4) Sourcing, RL = 100Ω Sinking, RL = 100Ω ISC Output Short Circuit Current IS Supply Current (4) Limit (2) Units 1.5 3.5 mV 4 7 max μV/°C 10 10 μA 12 12 max 4 4 μA 6 6 max MΩ Ω 80 70 dB 75 65 min 85 75 dB 80 70 min ±3.2 78 V 75 70 dB 70 65 min 72 68 dB 67 63 min 3.2 3.2 V 3 3 min −3.4 −3.2 −3.2 V −3 −3 max 3.1 2.9 2.9 V 2.8 2.8 min −2.9 −2.9 V −2.8 −2.8 max 29 29 mA 28 28 min 29 29 mA 28 28 max 76 3.4 −3.0 (1) (2) (3) LM7171BI Limit (2) 15 RL = 100Ω VO LM7171AI 31 30 Sourcing 135 Sinking 100 6.2 mA 8 8 mA 9 9 max Typical values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15V, VOUT = ±5V. For VS = ±5V, VOUT = ±1V. The open loop output current is specified, by the measurement of the open loop output voltage swing, using 100Ω output load. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 5 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com ±5V AC Electrical Characteristics Unless otherwise noted, all limits are specified for TJ = 25°C, V+ = +5V, V− = −5V, VCM = 0V, and RL = 1 kΩ. Symbol SR Parameter Slew Rate (3) Conditions AV = +2, VIN = 3.5 VPP Unity-Gain Bandwidth −3 dB Frequency AV = +2 Typ (1) LM7171AI Limit (2) LM7171BI Limit Units (2) 950 V/μs 125 MHz 140 MHz φm Phase Margin 57 Deg ts Settling Time (0.1%) AV = −1, VO = ±1V, RL = 500Ω 56 ns tp Propagation Delay AV = −2, VIN = ±1V, RL = 500Ω 6 ns (4) AD Differential Gain φD Differential Phase 0.02 % 0.03 Deg fIN = 10 kHz −102 dBc fIN = 5 MHz −70 dBc fIN = 10 kHz −110 dBc (5) Second Harmonic Distortion (6) Third Harmonic Distortion (6) fIN = 5 MHz −51 dBc en Input-Referred Voltage Noise f = 10 kHz 14 nV/√Hz in Input-Referred Current Noise f = 10 kHz 1.8 pA/√Hz (1) (2) (3) (4) (5) (6) Typical values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Slew Rate is the average of the raising and falling slew rates. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not specified. For ensured specifications and the test conditions, see the Electrical Characteristics. Differential gain and phase are measured with AV = +2, VIN = 1 VPP at 3.58 MHz and both input and output 75Ω terminated. Harmonics are measured with VIN = 1 VPP, AV = +2 and RL = 100Ω. Connection Diagram Figure 2. 8-Pin DIP/SOIC Top View 6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Typical Performance Characteristics unless otherwise noted, TA= 25°C Supply Current vs. Supply Voltage Supply Current vs. Temperature Figure 3. Figure 4. Input Offset Voltage vs. Temperature Input Bias Current vs. Temperature Figure 5. Figure 6. Short Circuit Current vs. Temperature (Sourcing) Short Circuit Current vs. Temperature (Sinking) Figure 7. Figure 8. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 7 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 8 Output Voltage vs. Output Current Output Voltage vs. Output Current Figure 9. Figure 10. CMRR vs. Frequency PSRR vs. Frequency Figure 11. Figure 12. PSRR vs. Frequency Open Loop Frequency Response Figure 13. Figure 14. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Open Loop Frequency Response Gain-Bandwidth Product vs. Supply Voltage Figure 15. Figure 16. Gain-Bandwidth Product vs. Load Capacitance Large Signal Voltage Gain vs. Load Figure 17. Figure 18. Large Signal Voltage Gain vs. Load Input Voltage Noise vs. Frequency Figure 19. Figure 20. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 9 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 10 Input Voltage Noise vs. Frequency Input Current Noise vs. Frequency Figure 21. Figure 22. Input Current Noise vs. Frequency Slew Rate vs. Supply Voltage Figure 23. Figure 24. Slew Rate vs. Input Voltage Slew Rate vs. Load Capacitance Figure 25. Figure 26. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Open Loop Output Impedance vs. Frequency Open Loop Output Impedance vs Frequency Figure 27. Figure 28. Large Signal Pulse Response AV = −1, VS = ±15V Large Signal Pulse Response AV = −1, VS = ±5V Figure 29. Figure 30. Large Signal Pulse Response AV = +2, VS = ±15V Large Signal Pulse Response AV = +2, VS = ±5V Figure 31. Figure 32. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 11 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 12 Small Signal Pulse Response AV = −1, VS = ±15V Small Signal Pulse Response AV = −1, VS = ±5V Figure 33. Figure 34. Small Signal Pulse Response AV = +2, VS = ±15V Small Signal Pulse Response AV = +2, VS = ±5V Figure 35. Figure 36. Closed Loop Frequency Response vs. Supply Voltage (AV = +2) Closed Loop Frequency Response vs. Capacitive Load (AV = +2) Figure 37. Figure 38. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Closed Loop Frequency Response vs. Capacitive Load (AV = +2) Closed Loop Frequency Response vs. Input Signal Level (AV = +2) Figure 39. Figure 40. Closed Loop Frequency Response vs. Input Signal Level (AV = +2) Closed Loop Frequency Response vs. Input Signal Level (AV = +2) Figure 41. Figure 42. Closed Loop Frequency Response vs. Input Signal Level (AV = +2) Closed Loop Frequency Response vs. Input Signal Level (AV = +4) Figure 43. Figure 44. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 13 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C (1) 14 Closed Loop Frequency Response vs. Input Signal Level (AV = +4) Closed Loop Frequency Response vs. Input Signal Level (AV = +4) Figure 45. Figure 46. Closed Loop Frequency Response vs. Input Signal Level (AV = +4) Total Harmonic Distortion vs. Frequency (1) Figure 47. Figure 48. Total Harmonic Distortion vs. Frequency (1) Undistorted Output Swing vs. Frequency Figure 49. Figure 50. The THD measurement at low frequency is limited by the test instrument. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Undistorted Output Swing vs. Frequency Undistorted Output Swing vs. Frequency Figure 51. Figure 52. Harmonic Distortion vs. Frequency (2) Harmonic Distortion vs. Frequency (2) Figure 53. Figure 54. Maximum Power Dissipation vs. Ambient Temperature Figure 55. (2) The THD measurement at low frequency is limited by the test instrument. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 15 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Note: M1 and M2 are current mirrors. Figure 56. Simplified Schematic Diagram 16 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 APPLICATION NOTES PERFORMANCE DISCUSSION The LM7171 is a very high speed, voltage feedback amplifier. It consumes only 6.5 mA supply current while providing a unity-gain bandwidth of 200 MHz and a slew rate of 4100V/μs. It also has other great features such as low differential gain and phase and high output current. The LM7171 is a true voltage feedback amplifier. Unlike current feedback amplifiers (CFAs) with a low inverting input impedance and a high non-inverting input impedance, both inputs of voltage feedback amplifiers (VFAs) have high impedance nodes. The low impedance inverting input in CFAs and a feedback capacitor create an additional pole that will lead to instability. As a result, CFAs cannot be used in traditional op amp circuits such as photodiode amplifiers, I-to-V converters and integrators where a feedback capacitor is required. CIRCUIT OPERATION The class AB input stage in LM7171 is fully symmetrical and has a similar slewing characteristic to the current feedback amplifiers. In the LM7171 Simplified Schematic, Q1 through Q4 form the equivalent of the current feedback input buffer, RE the equivalent of the feedback resistor, and stage A buffers the inverting input. The triple-buffered output stage isolates the gain stage from the load to provide low output impedance. SLEW RATE CHARACTERISTIC The slew rate of LM7171 is determined by the current available to charge and discharge an internal high impedance node capacitor. This current is the differential input voltage divided by the total degeneration resistor RE. Therefore, the slew rate is proportional to the input voltage level, and the higher slew rates are achievable in the lower gain configurations. A curve of slew rate versus input voltage level is provided in the “Typical Performance Characteristics”. When a very fast large signal pulse is applied to the input of an amplifier, some overshoot or undershoot occurs. By placing an external resistor such as 1 kΩ in series with the input of LM7171, the bandwidth is reduced to help lower the overshoot. SLEW RATE LIMITATION If the amplifier's input signal has too large of an amplitude at too high of a frequency, the amplifier is said to be slew rate limited; this can cause ringing in time domain and peaking in frequency domain at the output of the amplifier. In the “Typical Performance Characteristics” section, there are several curves of AV = +2 and AV = +4 versus input signal levels. For the AV = +4 curves, no peaking is present and the LM7171 responds identically to the different input signal levels of 30 mV, 100 mV and 300 mV. For the AV = +2 curves, with slight peaking occurs. This peaking at high frequency (>100 MHz) is caused by a large input signal at high enough frequency that exceeds the amplifier's slew rate. The peaking in frequency response does not limit the pulse response in time domain, and the LM7171 is stable with noise gain of ≥+2. LAYOUT CONSIDERATION Printed Circuit Board and High Speed Op Amps There are many things to consider when designing PC boards for high speed op amps. Without proper caution, it is very easy to have excessive ringing, oscillation and other degraded AC performance in high speed circuits. As a rule, the signal traces should be short and wide to provide low inductance and low impedance paths. Any unused board space needs to be grounded to reduce stray signal pickup. Critical components should also be grounded at a common point to eliminate voltage drop. Sockets add capacitance to the board and can affect high frequency performance. It is better to solder the amplifier directly into the PC board without using any socket. Using Probes Active (FET) probes are ideal for taking high frequency measurements because they have wide bandwidth, high input impedance and low input capacitance. However, the probe ground leads provide a long ground loop that will produce errors in measurement. Instead, the probes can be grounded directly by removing the ground leads and probe jackets and using scope probe jacks. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 17 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Component Selection and Feedback Resistor It is important in high speed applications to keep all component leads short. For discrete components, choose carbon composition-type resistors and mica-type capacitors. Surface mount components are preferred over discrete components for minimum inductive effect. Large values of feedback resistors can couple with parasitic capacitance and cause undesirable effects such as ringing or oscillation in high speed amplifiers. For LM7171, a feedback resistor of 510Ω gives optimal performance. COMPENSATION FOR INPUT CAPACITANCE The combination of an amplifier's input capacitance with the gain setting resistors adds a pole that can cause peaking or oscillation. To solve this problem, a feedback capacitor with a value CF > (RG × CIN)/RF (1) can be used to cancel that pole. For LM7171, a feedback capacitor of 2 pF is recommended. Figure 57 illustrates the compensation circuit. Figure 57. Compensating for Input Capacitance POWER SUPPLY BYPASSING Bypassing the power supply is necessary to maintain low power supply impedance across frequency. Both positive and negative power supplies should be bypassed individually by placing 0.01 μF ceramic capacitors directly to power supply pins and 2.2 μF tantalum capacitors close to the power supply pins. Figure 58. Power Supply Bypassing TERMINATION In high frequency applications, reflections occur if signals are not properly terminated. Figure 59 shows a properly terminated signal while Figure 60 shows an improperly terminated signal. 18 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 Figure 59. Properly Terminated Signal Figure 60. Improperly Terminated Signal To minimize reflection, coaxial cable with matching characteristic impedance to the signal source should be used. The other end of the cable should be terminated with the same value terminator or resistor. For the commonly used cables, RG59 has 75Ω characteristic impedance, and RG58 has 50Ω characteristic impedance. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 19 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com DRIVING CAPACITIVE LOADS Amplifiers driving capacitive loads can oscillate or have ringing at the output. To eliminate oscillation or reduce ringing, an isolation resistor can be placed as shown below in Figure 61. The combination of the isolation resistor and the load capacitor forms a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of the isolation resistor; the bigger the isolation resistor, the more damped the pulse response becomes. For LM7171, a 50Ω isolation resistor is recommended for initial evaluation. Figure 62 shows the LM7171 driving a 150 pF load with the 50Ω isolation resistor. Figure 61. Isolation Resistor Used to Drive Capacitive Load Figure 62. The LM7171 Driving a 150 pF Load with a 50Ω Isolation Resistor POWER DISSIPATION The maximum power allowed to dissipate in a device is defined as: PD = (TJ(MAX) − TA)/θJA (2) Where PD is the power dissipation in a device TJ(max) is the maximum junction temperature TA is the ambient temperature θJA is the thermal resistance of a particular package 20 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 For example, for the LM7171 in a SOIC-8 package, the maximum power dissipation at 25°C ambient temperature is 730 mW. Thermal resistance, θJA, depends on parameters such as die size, package size and package material. The smaller the die size and package, the higher θJA becomes. The 8-pin DIP package has a lower thermal resistance (108°C/W) than that of 8-pin SOIC (172°C/W). Therefore, for higher dissipation capability, use an 8pin DIP package. The total power dissipated in a device can be calculated as: PD = PQ + PL (3) PQ is the quiescent power dissipated in a device with no load connected at the output. PL is the power dissipated in the device with a load connected at the output; it is not the power dissipated by the load. Furthermore, PQ: PL: = supply current × total supply voltage with no load = output current × (voltage difference between supply voltage and output voltage of the same side of supply voltage) For example, the total power dissipated by the LM7171 with VS = ±15V and output voltage of 10V into 1 kΩ is PD = PQ + PL = (6.5 mA) × (30V) + (10 mA) × (15V − 10V) = 195 mW + 50 mW = 245 mW Application Circuit Figure 63. Fast Instrumentation Amplifier Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 21 LM7171 SNOS760B – MAY 1999 – REVISED MARCH 2013 www.ti.com Figure 64. Multivibrator Figure 65. Pulse Width Modulator Figure 66. Video Line Driver 22 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 LM7171 www.ti.com SNOS760B – MAY 1999 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision A (March 2013) to Revision B • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 22 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM7171 23 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM7171AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM71 71AIM LM7171AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM71 71AIM LM7171AIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM71 71AIM LM7171AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM71 71AIM LM7171BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM71 71BIM LM7171BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM71 71BIM LM7171BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM71 71BIM LM7171BIN NRND PDIP P 8 40 TBD Call TI Call TI -40 to 85 LM7171 BIN LM7171BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 85 LM7171 BIN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM7171AIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM7171AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM7171BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM7171AIMX SOIC D 8 2500 367.0 367.0 35.0 LM7171AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM7171BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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