HV9910C Universal High-Brightness LED Driver Features Description • • • • • • • • HV9910C is an open-loop, current-mode control, LED driver IC. This IC can be programmed to operate in either a constant frequency or constant off-time mode. It includes a 15 – 450V linear regulator which allows it to work with a wide range of input voltages without the need for an external low voltage supply. HV9910C includes a TTL-compatible, PWM-dimming input that can accept an external control signal with a duty ratio of 0 – 100% and a frequency of up to a few kilohertz. It also includes a 0 – 250mV linear-dimming input which can be used for linear dimming of the LED current. Unlike the HV9910B, the HV9910C is equipped with built-in thermal-shutdown protection. Switch mode controller for single switch LED drivers Enhanced drop-in replacement to the HV9910B Open loop peak current controller Internal 15 to 450V linear regulator Constant frequency or constant off-time operation Linear and PWM dimming capability Requires few external components for operation Over-temperature protection Applications • • • • • • DC/DC or AC/DC LED driver applications RGB back-lighting LED driver Back lighting of flat panel displays General purpose constant current source Signage and decorative LED lighting Chargers 2014 Microchip Technology Inc. HV9910C is ideally suited for buck LED drivers. Since the HV9910C operates in open-loop current mode control, the controller achieves good output current regulation without the need for any loop compensation. Also, being an open-loop controller, PWM-dimming response is limited only by the rate of rise of the inductor current, enabling a very fast rise and fall times of the LED current. HV9910C requires only three external components (apart from the power stage) to produce a controlled LED current. This makes HV9910C an ideal solution for low-cost LED drivers. DS20005323A-page 1 HV9910C TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at [email protected]. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: • Microchip’s Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. DS20005323A-page 2 2014 Microchip Technology Inc. HV9910C Pin Diagram VIN 1 16 NC NC 2 15 NC NC 3 14 RT CS 4 13 LD VIN 1 8 RT GND 5 12 VDD CS 2 7 LD NC 6 11 NC 6 VDD NC 7 10 NC GATE 8 9 PWMD GND 3 GATE 4 5 PWMD 8-Lead SOIC 16-Lead SOIC Typical Application Circuit CIN CO D1 CDD L1 VIN VDD HV9910C LD GATE PWMD RT ROSC 2014 Microchip Technology Inc. Q1 CS GND RCS DS20005323A-page 3 HV9910C 1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS VIN to GND ...................................................... -0.5V to +470V VDD to GND.......................................................................12V CS, LD, PWMD, GATE...........................-0.3V to (VDD + 0.3V) Junction temperature ....................................-40°C to +125°C Storage temperature .....................................-65°C to +150°C Continuous power dissipation (TA = +25°C) 8-lead SOIC ...............................................650 mW 16-lead SOIC ...........................................1300 mW 8-lead SOIC with heat slug ......................1300 mW Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions, above those indicated in the operational listings of this specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1.1 ELECTRICAL SPECIFICATIONS ELECTRICAL CHARACTERISTICS (SHEET 1 OF 2)1 TABLE 1-1: Symbol Parameter Note Min Typ Max Units Conditions Input DC supply voltage range2 3 15 - 450 V Supply current - - 0.8 1.5 mA Pin PWMD to VDD, no capacitance at GATE Shut-down mode supply current - - 0.5 1.0 mA Pin PWMD to GND Internally regulated voltage - 7.25 7.50 7.75 V VIN = 15V, IDD(ext) = 0, PWMD = VDD, 500pF at GATE; ROSC = 249kΩ Line regulation of VDD - 0 - 1.0 V VIN = 15 - 450V, IDD(ext) = 0, PWMD = VDD, 500pF at GATE; ROSC = 249kΩ - 0 - 0.1 V IDD(ext) = 0 - 1.0mA, PWMD = VDD, 500pF at GATE; ROSC = 249kΩ Input VINDC IIN(MAX) IINSD DC input voltage Internal Regulator VDD ∆VDD, line ∆VDD, load Load regulation of VDD UVLO VDD under voltage lockout threshold 3 6.45 6.70 6.95 V VDD rising ∆UVLO VDD under voltage lockout hysteresis - - 500 - mV VDD falling IIN(MAX) Maximum regulator current 4 5.0 - - mA VDD = UVLO - ∆UVLO PWM Dimming VEN(lo) PWMD input low voltage 3 - - 1.0 V VIN = 15 - 450V VEN(hi) PWMD input high voltage 3 2.4 - - V VIN = 15 - 450V Internal pull-down resistance at PWMD - 50 100 150 kΩ VPWMD = 5.0V REN DS20005323A-page 4 2014 Microchip Technology Inc. HV9910C TABLE 1-1: Symbol ELECTRICAL CHARACTERISTICS (CONTINUED) (SHEET 2 OF 2)1 Parameter Note Min Typ Max Units Conditions Current sense pull-in threshold voltage - 225 250 275 mV Offset voltage for LD comparator 3 -12 - +12 mV - 150 215 280 Current Sense Comparator VCS VOFFSET Current sense blanking interval TBLANK tDELAY Delay to output ns - 145 215 315 - - 80 150 ns -40°C < TA < +125°C 0 < TA < +85°C, VLD = VDD, VCS = VCS,TH + 50mV after TBLANK -40 < TA < +125°C, VLD = VDD, VCS = VCS,TH + 50mV after TBLANK VIN = 15V, VLD = 0.15, VCS = 0 to 0.22V after tBLANK Oscillator ROSC = 1.00MΩ - 20 25 30 - 80 100 120 Maximum GATE sourcing current - 0.165 - - A VGATE = 0V ISINK Maximum GATE sinking current - 0.165 - - A VGATE = VDD tRISE GATE output rise time 4 - 30 50 ns CGATE = 500pF tFALL GATE output fall time 4 - 30 50 ns CGATE = 500pF Shut-down temperature - 128 - 150 °C Hysteresis - 10 - 30 °C TSD-mode VIN current - - - 350 μA fOSC Oscillator frequency kHz ROSC = 249kΩ Gate Driver ISOURCE Over-Temperature Protection TSD ∆TSD ISD 1 2 3 4 Specifications are TA = 25°C, VIN = 15V unless otherwise noted. Also limited by package-power dissipation limit; Whichever is lower. Applies over the full operating ambient temperature range of -40°C < TA < +125°C. For design guidance only. TABLE 1-2: THERMAL RESISTANCE Package θja 8-Lead SOIC 101°C/W 16-Lead SOIC 83°C/W 8-Lead SOIC (with heat slug) 84°C/W 2014 Microchip Technology Inc. DS20005323A-page 5 HV9910C 2.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN DESCRIPTION Pin # Function Description 8-Lead SOIC 16-Lead SOIC 1 1 VIN Input of an 15 - 450V linear regulator. 2 4 CS Current sense pin used to sense the FET current by means of an external sense resistor. When this pin exceeds the lower of either the internal 250mV or the voltage at the LD pin, the GATE output goes low. 3 5 GND Ground return for all internal circuitry. Must be electrically connected to the power ground. 4 8 GATE Output GATE driver for an external N-channel power MOSFET. 5 9 PWMD TTL-compatible, PWM-dimming input of the IC. When this pin is pulled to GND or left open, the GATE driver is turned off. When the pin is pulled high, the GATE driver operates normally. 6 12 VDD Power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND (≥0.1μF). 7 13 LD Linear-dimming input and sets the current sense threshold as long as the voltage at the pin is less than 250mV (typ). 8 14 RT Sets the oscillator frequency. When a resistor is connected between RT and GND, the HV9910C operates in constant frequency mode. When the resistor is connected between RT and GATE, the IC operates in constant off-time mode. - 2, 3, 6, 7, 10, 11, 15, 16 NC No connection DS20005323A-page 6 2014 Microchip Technology Inc. HV9910C 3.0 APPLICATION INFORMATION HV9910C is optimized to drive buck LED drivers using open-loop, peak-current mode control. This method of control enables fairly accurate LED current control without the need for high side current sensing or the design of any closed loop controllers. The IC uses very few external components and enables both Linear and PWM-dimming of the LED current. A resistor connected to the RT pin programs the frequency of operation (or the off-time). The oscillator produces pulses at regular intervals. These pulses set the SR flip-flop in the HV9910C which causes the GATE driver to turn on. The same pulses also start the blanking timer, which inhibits the reset input of the SR flip flop and prevents false turn-offs due to the turn-on spike. When the FET turns on, the current through the inductor starts ramping up. This current flows through the external sense resistor, RCS, and produces a ramp voltage at the CS pin. The comparators are constantly comparing the CS pin voltage to both the voltage at the LD pin and the internal 250mV. Once the blanking timer is complete, the output of these comparators is allowed to reset the flip-flop. When the output of either one of the two comparators goes high, the flip-flop is reset and the GATE output goes low. The GATE goes low until the SR flip-flop is set by the oscillator. Assuming a 30% ripple in the inductor, the current sense resistor RCS can be set using: 0.25V orV LD R CS = -----------------------------------1.15 I LED Constant frequency peak current mode control has an inherent disadvantage – at duty cycles greater than 0.5, the control scheme goes into subharmonic oscillations. To prevent this, an artificial slope is typically added to the current sense waveform. This slope compensation scheme will affect the accuracy of the LED current in the present form. However, a constant offtime peak current control scheme does not have this problem and can easily operate at duty cycles greater than 0.5. This control scheme also gives inherent input voltage rejection, making the LED current almost insensitive to input voltage variations. However, this scheme leads to variable frequency operation and the frequency range depends greatly on the input and output voltage variation. Using HV9910C, it is easy to switch between the two modes of operation by changing one connection (see Section 3.3 “Oscillator”). 3.1 Input Voltage Regulator HV9910C can be powered directly from its VIN pin and can work from 15 - 450VDC at its VIN pin. When a voltage is applied at the VIN pin, HV9910C maintains a constant 7.5V at the VDD pin. This voltage is used to power the IC and any external-resistor dividers needed 2014 Microchip Technology Inc. to control the IC. The VDD pin must be bypassed by a low-ESR capacitor to provide a low impedance path for the high frequency current of the output GATE driver. HV9910C can also be operated by supplying a voltage at the VDD pin greater than the internally regulated voltage. This will turn off the internal linear regulator of the IC and the HV9910C will operate directly off the voltage supplied at the VDD pin. This external voltage at the VDD pin should not exceed 12V. Although the VIN pin of the HV9910C is rated up to 450V, the actual maximum voltage that can be applied is limited by the power dissipation in the IC. For example, if an 8-lead SOIC HV9910C (junction to ambient thermal resistance Rθj-a = 101°C/W) draws about IIN = 2.0mA from the VIN pin, and has a maximum allowable temperature rise of the junction temperature limited to ∆T = 75°C, the maximum voltage at the VIN pin would be: T 1 V IN MAX = ----------- -----R ja I IN 75C 1 = --------------------------- ------------101C W 2mA = 371V In these cases, to operate HV9910C from higher input voltages, a Zener diode can be added in series with the VIN pin to divert some of the power loss from HV9910C to the Zener diode. In the above example, using a 100V Zener diode will allow the circuit to easily work up to 450V. Note: The Zener diode will increase the minimum input voltage required to turn on the HV9910C to 115V. The input current drawn from the VIN pin is a sum of the 1.5mA (maximum) current drawn by the internal circuit and the current drawn by the GATE driver. The GATE driver depends on the switching frequency and the GATE charge of the external FET. I IN = 1.5mA + Q g f s In the above equation, fs is the switching frequency and Qg is the GATE charge of the external FET, which can be obtained from the data sheet of the FET. 3.2 Current Sense The current sense input of HV9910C goes to the noninverting inputs of two comparators. The inverting terminal of one comparator is tied to an internal 250mV reference, whereas the inverting terminal of the other comparator is connected to the LD pin. The outputs of both these comparators are fed into an OR GATE and DS20005323A-page 7 HV9910C the output of the OR GATE is fed into the reset pin of the flip-flop. Thus, the comparator which has the lowest voltage at the inverting terminal determines when the GATE output is turned off. The outputs of the comparators also include a 150280ns blanking time which prevents spurious turn-offs of the external FET due to the turn-on spike normally present in peak-current mode control. In rare cases, this internal blanking might not be enough to filter out the turn-on spike. In these instances, an external RC filter needs to be added between the external sense resistor (RCS) and the CS pin. can be connected to the LD pin to adjust the LED current during operation. To use the internal 250mV, the LD pin can be connected to VDD. Note: Please note that the comparators are fast (with a typical 80ns response time). A proper layout minimizing external inductances will prevent false triggering of these comparators. 3.3 Oscillator The oscillator in HV9910C is controlled by a single resistor connected at the RT pin. The equation governing the oscillator time period Tosc is given by: R OSC k T OSC s = -------------------------25 If the resistor is connected between RT and GND, HV9910C operates in a constant frequency mode and the above equation determines the time period. If the resistor is connected between RT and GATE, HV9910C operates in a constant off-time mode and the above equation determines the off-time. 3.4 Gate Output The gate output of the HV9910C is used to drive an external FET. It is recommended that the GATE charge of the external FET be less than 25nC for switching frequencies ≤ 100kHz and less than 15nC for switching frequencies > 100kHz. 3.5 3.6 Although the LD pin can be pulled to GND, the output current will not go to zero. This is due to the presence of a minimum ontime, which is equal to the sum of the blanking time and the delay to output time, or about 450ns. This minimum on-time causes the FET to be on for a minimum of 450ns, and thus the LED current when LD = GND is not zero. This current is also dependent on the input voltage, inductance value, forward voltage of the LEDs, and circuit parasitics. To get zero LED current, the PWMD pin has to be used. PWM Dimming PWM Dimming can be achieved by driving the PWMD pin with a low frequency square wave signal. When the PWM signal is zero, the GATE driver is turned off; when the PWMD signal if high, the GATE driver is enabled. The PWMD signal does not turn off the other parts of the IC, therefore, the response of HV9910C to the PWMD signal is almost instantaneous. The rate of rise and fall of the LED current is thus determined solely by the rise and fall times of the inductor current. To disable PWM Dimming and enable the HV9910C permanently, connect the PWMD pin to VDD. 3.7 Over-Temperature Protection The auto-recoverable thermal shutdown at 140°C (typ.) junction temperature with 20°C hysteresis is featured to avoid thermal runaway. When the junction temperature reaches TSD = 140°C (typ.), HV9910C enters a low power consumption shut-down mode with IIN <350µA. Linear Dimming The Linear Dimming pin is used to control the LED current. There are two cases when it may be necessary to use the Linear Dimming pin. 1. 2. In some cases, when using the internal 250mV, it may not be possible to find the exact RCS value required to obtain the LED current. In these cases, an external voltage divider from the VDD pin can be connected to the LD pin to obtain a voltage (less than 250mV) corresponding to the desired voltage across RCS. Linear dimming may be desired to adjust the current level to reduce the intensity of the LEDs. In these cases, an external 0-250mV voltage DS20005323A-page 8 2014 Microchip Technology Inc. HV9910C FIGURE 3-1: INTERNAL BLOCK DIAGRAM VIN VDD + + LD CS POR 1.25V Bandgap Reference Blanking 250mV OTP R + - GATE Q S Oscillator GND 2014 Microchip Technology Inc. RT PWMD DS20005323A-page 9 HV9910C 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead SOIC 16-Lead SOIC X = Product Code YY = Year Sealed WW = Week Sealed NNN = Traceability Code e# = JEDEC Symbol ● = Pin 1 Indicator Note: The JEDEC environmental marking symbols (e#) illustrated are examples only, and might not reflect the actual value for the listed package code. DS20005323A-page 10 2014 Microchip Technology Inc. HV9910C FIGURE 4-1: 8-LEAD SOIC (NARROW BODY) PACKAGE OUTLINE (LG) θ1 D 8 Note 1 (Index Area D/2 x E1/2) E1 E L2 L 1 θ L1 Top View View B Gauge Plane Seating Plane View B Note 1 h A h A A2 Seating Plane A1 e b A Side View View A-A Notes: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol A Dimension MIN 1.35* NOM (mm) MAX 1.75 A1 A2 b 0.10 1.25 0.31 - - - 0.25 1.65* 0.51 D E E1 4.80* 5.80* 3.80* 4.90 6.00 3.90 5.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 L2 1.04 REF 0.25 BSC θ θ1 0° 5° - - 8° 15° JEDEC Registration MS-012, Variation AA, Issue E, Sep 2005. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. 2014 Microchip Technology Inc. DS20005323A-page 11 HV9910C FIGURE 4-2: 16-LEAD SOIC (NARROW BODY) PACKAGE OUTLINE (NG) D θ1 16 Note 1 (Index Area D/2 x E1/2) E1 E Gauge Plane L2 L 1 e θ L1 b Top View Seating Plane View B View B A A h h A2 Seating Plane A1 Side View View A-A A Notes: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol A Dimension MIN 1.35* NOM (mm) MAX 1.75 A1 A2 b 0.10 1.25 0.31 - - - 0.25 1.65* D E E1 9.80* 5.80* 3.80* 9.90 6.00 3.90 0.51 10.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 L2 1.04 REF 0.25 BSC θ θ1 0° 5° - - 8° 15° JEDEC Registration MS-012, Variation AC, Issue E, Sep 2005. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. DS20005323A-page 12 2014 Microchip Technology Inc. HV9910C FIGURE 4-3: 8-LEAD SOIC (NARROW BODY) PACKAGE OUTLINE (SG) D1 D 8 8 Exposed Thermal Pad Zone E1 E Note 1 (Index Area D/2 x E1/2) 1 E2 1 Bottom View Top View θ1 View B Note 1 A h h Gauge Plane L2 A A2 Seating Plane A1 e L b L1 A Side View View A-A Seating Plane θ View B Notes: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol A A1 A2 b D D1 E E1 E2 e h L L1 L2 0.25 0.40 Dimension MIN 1.25* 0.00 1.25 0.31 4.80* 3.30† 5.80* 3.80* 2.29† 1.27 1.04 0.25 NOM 4.90 6.00 3.90 REF BSC BSC (mm) MAX 1.70 0.15 1.55* 0.51 5.00* 3.81† 6.20* 4.00* 2.79† 0.50 1.27 θ θ1 0° 5° - - 8° 15° JEDEC Registration MS-012, Variation BA, Issue E, Sep 2005. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. 2014 Microchip Technology Inc. DS20005323A-page 13 HV9910C APPENDIX A: REVISION HISTORY Revision A (August 2014) • Original Release of this Document. DS20005323A-page 14 2014 Microchip Technology Inc. HV9910C THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: Users of Microchip products can receive assistance through several channels: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://microchip.com/support CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions. 2014 Microchip Technology Inc. DS20005323A-page 15 HV9910C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device - XX X - Package Environmental Options X Reel Device: HV9910C= Universal High-Brightness LED Driver Package: LG = 8-lead SOIC NG = 16-lead SOIC SG = 8-lead SOIC with head slug Environmental G = Lead (Pb)-free/ROHS-compliant package Reel: (nothing) = Reel for LG and SG packages, Tube for NG package M934 DS20005323A-page 16 Examples: a) HV9910CLG-G: 8-lead SOIC package, 2500/Reel. b) HV9910CNG-G c) HV9910CNG-G-M934: d) HV9910CSG-G: 16-lead SOIC package, 45/Tube 16-lead SOIC package, 2500/Reel. 8-lead SOIC package with heat slug, 2500/Reel. = Reel for NG package 2014 Microchip Technology Inc. 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Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-63276-529-1 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2014 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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