LINER LT1814 Single/dual operational amplifier Datasheet

LT1818/LT1819
400MHz, 2500V/µs, 9mA
Single/Dual Operational Amplifiers
U
DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
■
400MHz Gain Bandwidth Product
2500V/µs Slew Rate
–85dBc Distortion at 5MHz
9mA Supply Current Per Amplifier
Space Saving SOT-23 and MS8 Packages
6nV/√Hz Input Noise Voltage
Unity-Gain Stable
1.5mV Maximum Input Offset Voltage
8µA Maximum Input Bias Current
800nA Maximum Input Offset Current
40mA Minimum Output Current, VOUT = ±3V
±3.5V Minimum Input CMR, VS = ±5V
Specified at ±5V, Single 5V Supplies
Operating Temperature Range: – 40°C to 85°C
The LT®1818/LT1819 are single/dual wide bandwidth,
high slew rate, low noise and distortion operational amplifiers with excellent DC performance. The LT1818/LT1819
have been designed for wider bandwidth and slew rate,
much lower input offset voltage and lower noise and
distortion than devices with comparable supply current.
The circuit topology is a voltage feedback amplifier with
the excellent slewing characteristics of a current feedback
amplifier.
The output drives a 100Ω load to ±3.8V with ±5V supplies.
On a single 5V supply, the output swings from 1V to 4V
with a 100Ω load connected to 2.5V. The amplifier is unitygain stable with a 20pF capacitive load without the need for
a series resistor. Harmonic distortion is –85dBc up to
5MHz for a 2VP-P output at a gain of 2.
U
APPLICATIO S
■
■
■
■
■
■
■
The LT1818/LT1819 are manufactured on Linear
Technology’s advanced low voltage complementary bipolar process. The LT1818 (single op amp) is available in
SOT-23 and SO-8 packages; the LT1819 (dual op amp) is
available in MSOP-8 and SO-8 packages.
Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Communication Receivers
Cable Drivers
Data Acquisition Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
FFT of Single Supply ADC Driver
Single Supply Unity-Gain ADC Driver for Oversampling Applications
0
fIN = 5.102539MHz
fS = 50Msps
VIN = 300mVP-P
SFDR = 78dB
8192 POINT FFT
NO WINDOWING
OR AVERAGING
–10
5V
5V
–30
+
51.1Ω
AIN+
LT1818
–
–20
18pF
2.5V
AIN–
LTC1744
14 BITS
50Msps
(SET FOR 2VP-P
FULL SCALE)
AMPLITUDE (dBc)
2.5VDC
±1VAC
–40
–50
–60
–70
2
3
–80
18189 TA01
–90
–100
–110
0
5M
10M
15M
20M
FREQUENCY (Hz)
25M
18189 TA02
18189f
1
LT1818/LT1819
W W
W
AXI U
U
ABSOLUTE
RATI GS
(Note 1)
Total Supply Voltage (V + to V –) ........................... 12.6V
Differential Input Voltage
(Transient Only, Note 2) ..................................... ±6V
Output Short-Circuit Duration (Note 3) ........... Indefinite
Operating Temperature Range (Note 8) .. – 40°C to 85°C
Specified Temperature Range (Note 9) ... –40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
U
U
W
PACKAGE/ORDER I FOR ATIO
TOP VIEW
5 V+
OUT 1 1
V– 2
+
+IN 3
–
4 –IN
S5 PACKAGE
5-LEAD PLASTIC SOT-23
TJMAX = 150°C, θJA = 250°C/W (NOTE 10)
–IN 2
+IN 3
V–
–
+
4
S5 PART*
MARKING
LTF7
8
NC
7
V+
6
5
LT1818CS8
LT1818IS8
1
2
3
4
NC
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/W (NOTE 10)
S8 PART
MARKING
1818
1818I
8
7
6
5
A
B
V+
OUT B
–IN B
+IN B
TJMAX = 150°C, θJA = 250°C/W (NOTE 10)
MS8 PART
MARKING
LTE7
LTE5
TOP VIEW
ORDER PART
NUMBER
MS8 PACKAGE
8-LEAD PLASTIC MSOP
OUT A 1
–IN A 2
8
V+
7
OUT B
6
–IN B
5
+IN B
LT1819CS8
LT1819IS8
A
+IN A 3
OUT
ORDER PART
NUMBER
LT1819CMS8
LT1819IMS8
TOP VIEW
OUT A
–IN A
+IN A
V–
ORDER PART
NUMBER
TOP VIEW
NC 1
ORDER PART
NUMBER
LT1818CS5
LT1818IS5
V–
B
4
S8 PART
MARKING
1819
1819I
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/W (NOTE 10)
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 9) VS = ±5V, VCM = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 4)
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
TA = 0°C to 70°C (Note 7)
TA = –40°C to 85°C (Note 7)
●
●
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
∆VOS/∆T
Input Offset Voltage Drift
IOS
Input Offset Current
IB
MIN
Input Bias Current
TYP
MAX
UNITS
0.2
1.5
2.0
3.0
mV
mV
mV
10
10
15
30
µV/°C
µV/°C
60
800
1000
1200
nA
nA
nA
–2
±8
±10
±12
µA
µA
µA
en
Input Noise Voltage Density
f = 10kHz
6
nV/√Hz
in
Input Noise Current Density
f = 10kHz
1.2
pA/√Hz
18189f
2
LT1818/LT1819
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 9) VS = ±5V, VCM = 0V, unless otherwise noted.
SYMBOL
RIN
PARAMETER
Input Resistance
CIN
VCM
Input Capacitance
Input Voltage Range
(Positive/Negative)
Common Mode Rejection Ratio
CMRR
Minimum Supply Voltage
PSRR
AVOL
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Channel Separation
VOUT
Output Swing(Positive/Negative)
IOUT
Output Current
ISC
Output Short-Circuit Current
SR
Slew Rate
FPBW
GBW
Full Power Bandwidth
Gain Bandwidth Product
tr, tf
tPD
OS
tS
HD
Rise Time, Fall Time
Propagation Delay
Overshoot
Settling Time
Harmonic Distortion
dG
dP
IS
Differential Gain
Differential Phase
Supply Current
CONDITIONS
VCM = V – + 1.5V to V + – 1.5V
Differential
Guaranteed by CMRR
TA = –40°C to 85°C
VCM = ±3.5V
TA = 0°C to 70°C
TA = –40°C to 85°C
Guaranteed by PSRR
TA = –40°C to 85°C
VS = ±2V to ±5.5V
TA = 0°C to 70°C
TA = –40°C to 85°C
VOUT = ±3V, RL = 500Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
VOUT = ±3V, RL = 100Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
VOUT = ±3V, LT1819
TA = 0°C to 70°C
TA = –40°C to 85°C
RL = 500Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
RL = 100Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
VOUT = ±3V, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
VOUT = 0V, 1V Overdrive (Note 3)
TA = 0°C to 70°C
TA = –40°C to 85°C
AV = 1
AV = –1 (Note 5)
TA = 0°C to 70°C
TA = –40°C to 85°C
6VP-P (Note 6)
f = 4MHz, RL = 500Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
AV = 1, 10% to 90%, 0.1V Step
AV = 1, 50% to 50%, 0.1V Step
AV = 1, 0.1V, RL = 100Ω
AV = –1, 0.1%, 5V
HD2, AV = 2, f = 5MHz, VOUT = 2VP-P, RL = 500Ω
HD3, AV = 2, f = 5MHz, VOUT = 2VP-P, RL = 500Ω
AV = 2, RL = 150Ω
AV = 2, RL = 150Ω
Per Amplifier
TA = 0°C to 70°C
TA = –40°C to 85°C
MIN
1.5
●
●
●
±3.5
±3.5
75
73
72
TYP
5
750
1.5
±4.2
85
±1.25
●
●
●
78
76
75
1.5
1.0
0.8
1.0
0.7
0.6
82
81
80
±3.8
±3.7
±3.6
±3.50
±3.25
±3.15
±40
±35
±30
±100
±90
±70
●
●
900
750
600
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
270
260
250
±2
±2
97
2.5
6
100
±4.1
±3.8
±70
±200
2500
1800
95
400
0.6
1.0
20
10
–85
–89
0.07
0.02
9
●
●
MAX
10
13
14
UNITS
MΩ
kΩ
pF
V
V
dB
dB
dB
V
V
dB
dB
dB
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
dB
dB
dB
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
V/µs
V/µs
V/µs
V/µs
MHz
MHz
MHz
MHz
ns
ns
%
ns
dBc
dBc
%
DEG
mA
mA
mA
18189f
3
LT1818/LT1819
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 9). VS = 5V, 0V; VCM = 2.5V, RL to 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 4)
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
(Note 7)
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
∆VOS/∆T
IOS
IB
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
en
Input Noise Voltage Density
f = 10kHz
in
Input Noise Current Density
f = 10kHz
RIN
Input Resistance
CIN
Input Capacitance
VCM
Input Voltage Range (Positive)
Input Voltage Range (Negative)
CMRR
Common Mode Rejection Ratio
Minimum Supply Voltage
PSRR
AVOL
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Channel Separation
VOUT
MIN
Output Swing(Positive)
Output Swing(Negative)
= V–
+ 1.5V to V +
VCM
Differential
– 1.5V
1.5
3.5
3.5
TYP
MAX
UNITS
0.4
2.0
2.5
3.5
mV
mV
mV
10
10
15
30
µV/°C
µV/°C
60
800
1000
1200
nA
nA
nA
–2.4
±8
±10
±12
µA
µA
µA
6
nV/√Hz
1.4
pA/√Hz
5
750
MΩ
kΩ
1.5
pF
4.2
V
V
Guaranteed by CMRR
TA = –40°C to 85°C
●
Guaranteed by CMRR
TA = –40°C to 85°C
●
VCM = 1.5V to 3.5V
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
Guaranteed by PSRR
TA = –40°C to 85°C
●
VS = 4V to 11V
TA = 0°C to 70°C
TA = –40°C to 85°C
78
76
75
97
●
●
dB
dB
dB
VOUT = 1.5V to 3.5V, RL = 500Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
1.0
0.7
0.6
2
●
●
V/mV
V/mV
V/mV
VOUT = 1.5V to 3.5V, RL = 100Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
0.7
0.5
0.4
4
●
●
V/mV
V/mV
V/mV
VOUT = 1.5V to 3.5V, LT1819
TA = 0°C to 70°C
TA = –40°C to 85°C
81
80
79
100
●
●
dB
dB
dB
RL = 500Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
3.9
3.8
3.7
4.2
●
●
V
V
V
RL = 100Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
3.7
3.6
3.5
4
●
●
V
V
V
RL = 500Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
RL = 100Ω, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
0.8
73
71
70
1.5
1.5
82
±1.25
V
V
dB
dB
dB
±2
±2
V
V
0.8
1.1
1.2
1.3
V
V
V
1
1.3
1.4
1.5
V
V
V
18189f
4
LT1818/LT1819
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 9). VS = 5V, 0V; VCM = 2.5V, RL to 2.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
IOUT
Output Current
VOUT = 1.5V or 3.5V, 30mV Overdrive
TA = 0°C to 70°C
TA = –40°C to 85°C
±50
●
●
±30
±25
±20
mA
mA
mA
VOUT = 2.5V, 1V Overdrive (Note 3)
TA = 0°C to 70°C
TA = –40°C to 85°C
±80
±70
±50
±140
●
●
mA
mA
mA
●
●
450
375
300
ISC
SR
Output Short-Circuit Current
Slew Rate
AV = 1
AV = –1 (Note 5)
TA = 0°C to 70°C
TA = –40°C to 85°C
FPBW
Full Power Bandwidth
2VP-P (Note 6)
GBW
Gain Bandwidth Product
f = 4MHz, RL = 500Ω
TA = 0°C to 70°C
TA = –40°C to 85°C
●
●
240
230
220
MAX
UNITS
1000
V/µs
800
V/µs
V/µs
V/µs
125
MHz
360
MHz
MHz
MHz
tr, tf
Rise Time, Fall Time
AV = 1, 10% to 90%, 0.1V Step
0.7
ns
tPD
Propagation Delay
AV = 1, 50% to 50%, 0.1V Step
1.1
ns
OS
Overshoot
AV = 1, 0.1V, RL = 100Ω
20
%
HD
Harmonic Distortion
HD2, AV = 2, f = 5MHz, VOUT = 2VP-P, RL = 500Ω
HD3, AV = 2, f = 5MHz, VOUT = 2VP-P, RL = 500Ω
–72
–74
dBc
dBc
dG
Differential Gain
AV = 2, RL = 150Ω
0.07
%
dP
Differential Phase
AV = 2, RL = 150Ω
0.07
DEG
IS
Supply Current
Per Amplifier
TA = 0°C to 70°C
TA = –40°C to 85°C
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Differential inputs of ±6V are appropriate for transient operation
only, such as during slewing. Large sustained differential inputs can cause
excessive power dissipation and may damage the part.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up
drift.
Note 5: With ±5V supplies, slew rate is tested in a closed-loop gain of –1
by measuring the rise time of the output from –2V to 2V with an output
step from –3V to 3V. With single 5V supplies, slew rate is tested in a
closed-loop gain of –1 by measuring the rise time of the output from 1.5V
to 3.5V with an output step from 1V to 4V. Falling edge slew rate is not
production tested, but is designed, characterized and expected to be within
10% of the rising edge slew rate.
8.5
●
●
10
13
14
mA
mA
mA
Note 6: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP
Note 7: This parameter is not 100% tested.
Note 8: The LT1818C/LT1818I and LT1819C/LT1819I are guaranteed
functional over the operating temperature range of – 40°C to 85°C.
Note 9: The LT1818C/LT1819C are guaranteed to meet specified
performance from 0°C to 70°C and is designed, characterized and
expected to meet the extended temperature limits, but is not tested at
–40°C and 85°C. The LT1818I/LT1819I are guaranteed to meet the
extended temperature limits.
Note 10: Thermal resistance (θJA) varies with the amount of PC board
metal connected to the package. The specified values are for short traces
connected to the leads. If desired, the thermal resistance can be
significantly reduced by connecting the V – pin to a large metal area.
18189f
5
LT1818/LT1819
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Common Mode Range
vs Supply Voltage
Supply Current vs Temperature
V+
12
PER AMPLIFIER
8
VS = ±2.5V
6
4
2
–1.0
INPUT BIAS CURRENT (µA)
INPUT COMMON MODE RANGE (V)
SUPPLY CURRENT (mA)
VS = ±5V
2
TA = 25°C
∆VOS < 1mV
– 0.5
10
Input Bias Current vs Common
Mode Voltage
–1.5
– 2.0
2.0
1.5
1.0
TA = 25°C
VS = ± 5V
0
–2
–4
–6
0.5
50
25
0
75
TEMPERATURE (°C)
100
V–
125
0
4
3
2
5
SUPPLY VOLTAGE (± V)
1
18189 G01
INPUT VOLTAGE NOISE (nV/√Hz)
–1.2
–1.6
VS = ±5V
–2.0
VS = ±2.5V
–2.4
in
10
1
en
1
50
25
75
0
TEMPERATURE (°C)
100
10
125
100
77
74
71
68
VS = ± 5V
65
V+
OUTPUT VOLTAGE SWING (V)
RL = 500Ω
65
RL = 100Ω
–1.5
– 2.0
2.0
1.5
RL = 100Ω
1.0
100
125
18189 G07
SOURCE
–2
–3
4
3
SINK
2
–4
RL = 500Ω
V–
50
25
75
0
TEMPERATURE (°C)
TA = 25°C
VS = ±5V
∆VOS = 30mV
RL = 500Ω
–1.0
0.5
62
–50 –25
Output Voltage Swing
vs Load Current
OUTPUT VOLTAGE SWING (V)
71
10k
5
TA = 25°C
∆VOS = 30mV
– 0.5
RL = 100Ω
1k
LOAD RESISTANCE (Ω)
18189 G06
Output Voltage Swing
vs Supply Voltage
74
68
62
100
18189 G05
Open-Loop Gain vs Temperature
VS = ± 5V
VO = ± 3V
0.1
100k
1k
10k
FREQUENCY (Hz)
18189 G04
OPEN-LOOP GAIN (dB)
TA = 25°C
VS = ± 2.5V
–2.8
–50 –25
77
80
OUTPUT VOLTAGE SWING (V)
INPUT BIAS CURRENT (µA)
TA = 25°C
VS = ± 5V
AV = 101
RS = 10k
INPUT CURRENT NOISE (pA/√Hz)
–0.8
80
Open-Loop Gain vs Resistive Load
10
VCM = 0V
5
18189 G03
Input Noise Spectral Density
100
–0.4
0
2.5
– 2.5
INPUT COMMON MODE VOLTAGE (V)
18189 G02
Input Bias Current vs Temperature
0
–8
–5
7
6
OPEN-LOOP GAIN (dB)
0
–50 –25
0
1
4
3
2
5
SUPPLY VOLTAGE (± V)
6
7
18189 G08
–5
–120
–80
0
40
80
–40
OUTPUT CURRENT (mA)
120
18189 G09
18189f
6
LT1818/LT1819
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Short-Circuit Current
vs Temperature
Output Impedance vs Frequency
100
150
VS = ± 5V
VIN = ±1V
SOURCE
125
SINK
160
120
80
SOURCE, VS = ±5V
100
SINK, VS = ±5V
SINK, VS = ±2.5V
50
100
0
–50 –25
125
50
25
75
0
TEMPERATURE (˚C)
100
180
160
60
140
440
0.01
10k
125
30
80
20
60
10
40
0
20
PHASE (DEG)
100
1M
10M
FREQUENCY (Hz)
100M
GBW
VS = ± 5V
GBW
VS = ±2.5V
360
PHASE MARGIN
VS = ±2.5V
50
PHASE MARGIN
VS = ±5V
40
0
1M
10M
FREQUENCY (Hz)
100M
–20
500M
–50 –25
50
0
75
25
TEMPERATURE (°C)
10
VS = ±2.5V
VS = ±5V
100
30
125
18189 G15
Gain vs Frequency, AV = 2
Gain vs Frequency, AV = 1
TA = 25°C
AV = 1
RL = 500Ω
100k
PHASE MARGIN (DEG)
120
GAIN
40
RL = 500Ω
18189 G13
5
TA = 25°C
VS = ± 5V
18189 G12
400
GAIN BANDWIDTH (MHz)
80
70
50
GAIN (dB)
AV = 1
0.1
Gain Bandwidth and Phase
Margin vs Temperature
Gain and Phase vs Frequency
TA = 25°C
–10 AV = –1
RL = 500Ω
–20
100k
10k
AV = 10
1
18189 G11
18189 G10
PHASE
AV = 100
10
∆VOS = 30mV
VOUT = ±3V FOR VS = ±5V
VOUT = ±1V FOR VS = ±2.5V
25
50
25
75
0
TEMPERATURE (°C)
SOURCE, VS = ±2.5V
75
40
0
–50 –25
OUTPUT IMPEDANCE (Ω)
200
OUTUPT CURRENT (mA)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
240
Output Current vs Temperature
Gain vs Frequency, AV = – 1
5
RL = 500Ω
VS = ±2.5V
VS = ±5V
5
RL = 100Ω
–5
–10
1M
10M
100M
FREQUENCY (Hz)
500M
18189 G16
0
GAIN (dB)
GAIN (dB)
GAIN (dB)
0
0
TA = 25°C
–5 A = 2
V
VS = ±5V
RF = RG = 500Ω
CF = 1pF
–10
10M
1M
FREQUENCY (Hz)
–5
TA = 25°C
AV = –1
RL = RF = RG = 500Ω
100M
300M
18189 G17
–10
1M
10M
FREQUENCY (Hz)
100M
300M
18189 G18
18189f
7
LT1818/LT1819
U W
TYPICAL PERFOR A CE CHARACTERISTICS
GBW
RL = 500Ω
400
GBW
RL = 100Ω
300
PHASE MARGIN
RL = 100Ω
45
40
PHASE MARGIN
RL = 500Ω
PHASE MARGIN (DEG)
350
35
5
4
3
SUPPLY VOLTAGE (±V)
TA = 25°C
AV = 1
VS = ±5V
80
PSRR
+PSRR
60
40
20
TA = 25°C
80
VS = ±2.5V
VS = ±5V
60
40
20
0
1k
6
10k
1M
100k
FREQUENCY (Hz)
10M
100M
1k
1M
100k
FREQUENCY (Hz)
10k
10M
18189 G20
18189 G19
Slew Rate vs Input Step
TA =25°C
AV = –1
V = ±5V
1600 RS = R = R = 500Ω
F
G
L
100M
18189 G21
Slew Rate vs Supply Voltage
2000
2000
Slew Rate vs Temperature
2400
TA =25°C
AV = –1
RF = RG = RL = 500Ω
VIN = 6VP-P
VS = ±5V
2000
1500
SR +
SR –
SLEW RATE (V/µs)
SLEW RATE (V/µs)
100
0
30
2
Common Mode Rejection Ratio
vs Frequency
1200
800
SLEW RATE (V/µs)
TA = 25°C
POWER SUPPLY REJECTION RATIO (dB)
100
450
GAIN BANDWIDTH (MHz)
Power Supply Rejection Ratio
vs Frequency
COMMON MODE REJECTION RATIO (dB)
Gain Bandwidth and Phase Margin
vs Supply Voltage
1000
VIN = 2VP-P
1600
1200
VS = ±2.5V
800
500
400
400
0
0
3
4
5
INPUT STEP (VP-P)
0
6
1
4
3
2
5
SUPPLY VOLTAGE (±V)
Differential Gain and Phase
vs Supply Voltage
0.04
0.10
0.02
0.08
0
0.06
DIFFERENTIAL PHASE
RL = 150Ω
4
3
5
SUPPLY VOLTAGE (±V)
–80
6
18189 G25
3RD, RL = 500
–100
AV = 2
VS = ±5V
VO = 2VP-P
–120
1M
–80
10M
18189 G26
3RD, RL = 500
–90
3RD, RL = 100
–100
–110
2M
5M
FREQUENCY (Hz)
2ND, RL = 500
–70
2ND, RL = 500
–90
–110
0
2
DISTORTION (dB)
DIFFERENTIAL PHASE (DEG)
0.12
2ND, RL = 100
3RD, RL = 100
–70
DIFFERENTIAL GAIN (%)
0.06
0.02
–60
2ND, RL = 100
0.08
125
Distortion vs Frequency, AV = –1
–60
0.10
DIFFERENTIAL GAIN
RL = 150Ω
100
18189 G24
Distortion vs Frequency, AV = 2
TA = 25°C
50
25
75
0
TEMPERATURE (°C)
18189 G23
18189 G22
0.04
0
–50 –25
7
6
DISTORTION (dB)
2
AV = –1
RF = RG = RL = 500Ω
AV = –1
VS = ±5V
VO = 2VP-P
–120
1M
2M
5M
FREQUENCY (Hz)
10M
18189 G27
18189f
8
LT1818/LT1819
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Channel Separation
vs Frequency
Distortion vs Frequency, AV = 1
DISTORTION (dB)
–70
110
AV = 1
VS = ±5V
VO = 2VP-P
–80
100
2ND, RL = 100
CHANNEL SEPARATION (dB)
–60
3RD, RL = 100
–90
–100
3RD, RL = 500
–110
2ND, RL = 500
–120
1M
0.1% Settling Time
2M
5M
FREQUENCY (Hz)
10M
INPUT
TRIGGER
(1V/DIV)
90
80
OUTPUT
SETTLING
RESIDUE
(5mV/DIV)
70
60
50
40
T = 25°C
30 VA = ±5V
S
20 AV = –1
RF = RG = RL = 500Ω
10
100k
1M
10M
10k
FREQUENCY (Hz)
100M
1G
5ns/DIV
VS = ±5V
VOUT = ±2.5V
SETTLING TIME = 9ns
AV = –1
RF = RG = 500Ω
CF = 4.1pF
18189 G30
18188 G29
18189 G28
Small-Signal Transient, 20dB Gain
20mV/DIV
Large-Signal Transient, AV = –1
2V/DIV
10ns/DIV
VS = ±5V
18189 G31
Large-Signal Transient, AV = 1
1V/DIV
5ns/DIV
18189 G32
Large-Signal Transient, AV = –1
1V/DIV
VS = ±5V
10ns/DIV
18189 G33
VS = ±5V
10ns/DIV
18189 G34
18189f
9
LT1818/LT1819
U
W
U
U
APPLICATIO S I FOR ATIO
load, a resistor of 10Ω to 50Ω must be connected between
the output and the capacitive load to avoid ringing or
oscillation (see RS in Figure 1). The feedback must still be
taken directly from the output so that the series resistor
will isolate the capacitive load to ensure stability.
Layout and Passive Components
As with all high speed amplifiers, the LT1818/LT1819
require some attention to board layout. A ground plane is
recommended and trace lengths should be minimized,
especially on the negative input lead.
Input Considerations
Low ESL/ESR bypass capacitors should be placed directly
at the positive and negative supply (0.01µF ceramics are
recommended). For high drive current applications, additional 1µF to 10µF tantalums should be added.
The inputs of the LT1818/LT1819 amplifiers are connected to the bases of NPN and PNP bipolar transistors
in parallel. The base currents are of opposite polarity and
provide first order bias current cancellation. Due to
variation in the matching of NPN and PNP beta, the
polarity of the input bias current can be positive or
negative. The offset current, however, does not depend
on beta matching and is tightly controlled. Therefore, the
use of balanced source resistance at each input is recommended for applications where DC accuracy must be
maximized. For example, with a 100Ω source resistance
at each input, the 800nA maximum offset current results
in only 80µV of extra offset, while without balance the
8µA maximum input bias current could result in an
0.8mV offset condition.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking or
even oscillations. If feedback resistors greater than 500Ω
are used, a parallel capacitor of value
CF > RG • CIN/RF
should be used to cancel the input pole and optimize
dynamic performance (see Figure 1). For applications
where the DC noise gain is 1 and a large feedback resistor
is used, CF should be greater than or equal to CIN. An
example would be an I-to-V converter.
The inputs can withstand differential input voltages of up
to 6V without damage and without needing clamping or
series resistance for protection. This differential input
voltage generates a large internal current (up to 50mA),
which results in the high slew rate. In normal transient
closed-loop operation, this does not increase power dissipation significantly because of the low duty cycle of the
transient inputs. Sustained differential inputs, however,
will result in excessive power dissipation and therefore
this device should not be used as a comparator.
In high closed-loop gain configurations, RF >> RG, and no
CF need to be added. To optimize the bandwidth in these
applications, a capacitance, CG, may be added in parallel
with RG in order to cancel out any parasitic CF capacitance.
Capacitive Loading
The LT1818/LT1819 are optimized for low distortion and
high gain bandwidth applications. The amplifiers can drive
a capacitive load of 20pF in a unity-gain configuration and
more with higher gain. When driving a larger capacitive
IN +
IN –
+
RG
RS
–
CLOAD
CG
RF
CF
18189 F01
Figure 1
18189f
10
LT1818/LT1819
U
W
U
U
APPLICATIO S I FOR ATIO
Slew Rate
The slew rate of the LT1818/LT1819 is proportional to the
differential input voltage. Highest slew rates are therefore
seen in the lowest gain configurations. For example, a 6V
output step with a gain of 10 has a 0.6V input step, whereas
at unity gain there is a 6V input step. The LT1818/LT1819
is tested for slew rate at a gain of –1. Lower slew rates
occur in higher gain configurations, whereas the highest
slew rate (2500V/µs) occurs in a noninverting unity-gain
configuration.
Power Dissipation
The LT1818/LT1819 combine high speed and large output
drive in small packages. It is possible to exceed the
maximum junction temperature specification (150°C)
under certain conditions. Maximum junction temperature
(TJ) is calculated from the ambient temperature (TA),
power dissipation per amplifier (PD) and number of amplifiers (n) as follows:
TJ = TA + (n • PD • θJA)
Power dissipation is composed of two parts. The first is
due to the quiescent supply current and the second is due
to on-chip dissipation caused by the load current. The
worst-case load-induced power occurs when the output
voltage is at 1/2 of either supply voltage (or the maximum
swing if less than 1/2 the supply voltage). Therefore PDMAX
is:
Example: LT1819IS8 at 85°C, VS = ±5V, RL = 100Ω
PDMAX = (10V) • (14mA) + (2.5V)2/100Ω = 202.5mW
TJMAX = 85°C + (2 • 202.5mW) • (150°C/W) = 146°C
Circuit Operation
The LT1818/LT1819 circuit topology is a true voltage
feedback amplifier that has the slewing behavior of a
current feedback amplifier. The operation of the circuit can
be understood by referring to the Simplified Schematic.
Complementary NPN and PNP emitter followers buffer the
inputs and drive an internal resistor. The input voltage
appears across the resistor, generating a current that is
mirrored into the high impedance node.
Complementary followers form an output stage that buffer
the gain node from the load. The input resistor, input stage
transconductance and the capacitor on the high impedance node determine the bandwidth. The slew rate is
determined by the current available to charge the gain
node capacitance. This current is the differential input
voltage divided by R1, so the slew rate is proportional to
the input step. Highest slew rates are therefore seen in the
lowest gain configurations.
PDMAX = (V + – V –) • (ISMAX) + (V+/2)2/RL or
PDMAX = (V + – V –) • (ISMAX) +
(V+ – VOMAX) • (VOMAX/RL)
18189f
11
LT1818/LT1819
U
TYPICAL APPLICATIO
Single Supply Differential ADC Driver
5V
10µF
18pF
+
VIN
51.1Ω
1/2 LT1819
5V
–
AIN+
18pF
536Ω
AIN–
536Ω
–
LTC1744
14 BITS
50Msps
(SET FOR 2VP-P
FULL SCALE)
51.1Ω
1/2 LT1819
4.99k
18pF
+
5V
4.99k
0.1µF
18189 TA05
Results Obtained with the Circuit of Figure 2 at 5MHz.
FFT Shows 81dB Overall Spurious Free Dynamic Range
0
fIN = 5.023193MHz
fS = 50Msps
VIN = 750mVP-P
–10
–20
8192 SAMPLES
NO WINDOWING
NO AVERAGING
AMPLITUDE (dBc)
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
5M
10M
15M
20M
FREQUENCY (Hz)
25M
18189 TA06
18189f
12
LT1818/LT1819
W
W
SI PLIFIED SCHE ATIC
(One Amplifier)
V+
+IN
R1
OUT
–IN
C
V–
18189 SS
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.2 – 3.45
(.126 – .136)
0.42 ± 0.04
(.0165 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.206)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
NOTE 4
4.90 ± 0.15
(1.93 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ± 0.015
(.021 ± .006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.077)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.13 ± 0.076
(.005 ± .003)
MSOP (MS8) 0802
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
18189f
13
LT1818/LT1819
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1633)
0.62
MAX
0.95
REF
2.80 – 3.10
(NOTE 4)
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.60 – 3.00
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.25 – 0.50
TYP 5 PLCS
NOTE 3
0.95 BSC
0.90 – 1.30
0.20 BSC
0.00 – 0.15
0.90 – 1.45
DATUM ‘A’
0.35 – 0.55 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
1.90 BSC
S5 SOT-23 0502
ATTENTION: ORIGINAL SOT23-5L PACKAGE.
MOST SOT23-5L PRODUCTS CONVERTED TO THIN SOT23
PACKAGE, DRAWING # 05-08-1635 AFTER APPROXIMATELY
APRIL 2001 SHIP DATE
18189f
14
LT1818/LT1819
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
7
6
5
N
N
.245
MIN
.160 ±.005
1
.030 ±.005
TYP
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
2
3
4
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
1
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0502
18189f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1818/LT1819
U
TYPICAL APPLICATIO
80MHz, 20dB Gain Block
+
VIN
1/2 LT1819
–
+
VOUT
1/2 LT1819
432Ω
–
432Ω
200Ω
200Ω
–3dB BANDWIDTH: 80MHz
18189 TA03
Large-Signal Transient Response
20dB Gain Block Frequency Response
25
20
GAIN (dB)
15
10
1V/DIV
5
0
–5
VS = ±5V
TA = 25°C
–10
100k
1M
10M
FREQUENCY (Hz)
10ns/DIV
100M
18189 TA07
18189 TA04
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1395/LT1396/LT1397
Single/Dual/Quad 400MHz Current Feedback Amplifiers
4.6mA Supply Current
LT1806/LT1807
Single/Dual 325MHz, 140V/µs Rail-to-Rail I/O Op Amps
Low Noise: 3.5nV/√Hz
LT1809/LT1810
Single/Dual 180MHz, 350V/µs Rail-to-Rail I/O Op Amps
Low Distortion: –90dBc at 5MHz
LT1812/LT1813/LT1814
Single/Dual/Quad 100MHz, 750V/µs Op Amps
Low Power: 3.6mA Max at ±5V
LT1815/LT1816/LT1817
Single/Dual/Quad 220MHz, 1500V/µs Op Amps
Programmable Supply Current
LT6203/LT6204
Dual/Quad 100MHz, Rail-to-Rail I/O Op Amps
1.9nV/√Hz Noise, 3mA Max
18189f
16
Linear Technology Corporation
LT/TP 0103 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www linear.com
 LINEAR TECHNOLOGY CORPORATION 2002
Similar pages