MP2013 40V, 150mA, Low Quiescent Current Linear Regulator DESCRIPTION FEATURES The MP2013 is a low power linear regulator that supplies power to systems with high voltage batteries. It includes a wide 2.5V to 40V input range, low dropout voltage and low quiescent supply current. The low quiescent current and low dropout voltage allow operations at extremely low power levels. Therefore, the MP2013 are ideal for the low power microcontrollers and the battery-powered equipments. • • • The MP2013 provides wide variety of fixed output voltage options (if request): 1.8V, 1.9V, 2.3V, 2.5V, 3.0V, 3.3V, 3.45V, 5.0V; and also provides the output adjustable option (from 1.215V to 15V). The regulator output current is internally limited and the device is protected against over-load and over-temperature conditions. The MP2013 also includes thermal shutdown and current limiting fault protection, and is available in QFN6 (2x2mm), QFN8 (3x3mm) and TSOT23-5 packages. • • • • • • • • 2.5V to 40V Input Range 3.2µA Quiescent Supply Current Stable With low-value output ceramic capacitor (> 0.47 μF) 150mA specified current 620mV Dropout at 150mA Load Available in Fixed and Adjustable output (1.215 V to 15 V) versions Output ±2% Accuracy Specified current limit Thermal Shutdown -40°C to +125°C Specified Junction Temperature Range Available in TSOT23-5, QFN6 (2x2mm), or QFN8 (3x3mm) Packages APPLICATIONS • • • • • Industrial/Automotive Applications Portable/Battery-Powered Equipment Ultra low power Microcontrollers Cellular Handsets Medical Imaging All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION IN1 IN1 OUT IN2 FB GND Output Adjustable Version MP2013 Rev. 1.0 4/23/2014 OUT Vout IN2 VOUT FB GND Output Fixed Version www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 1 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR ORDERING INFORMATION Part Number* MP2013GJ MP2013GG MP2013GQ MP2013GQ-33 Package TSOT23-5 QFN6 (2x2mm) QFN8 (3x3mm) QFN8 (3x3mm) Top Marking AFF AX AFF AGG * For Tape & Reel, add suffix –Z (e.g. MP2013GJ–Z); PACKAGE REFERENCE TSOT23-5 QFN6(2x2mm) QFN8(3x3mm) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance IN1, IN2 ..................................... -0.3V to +42V OUT ............................................. -0.3V to +17V FB ................................................ -0.3V to +6V Lead Temperature ................................... 260°C Storage Temperature ............... -65°C to +150°C (2) Continuous Power Dissipation (TA = +25°C) QFN8(3x3mm) .........................................2.08W QFN6(2x2mm) .........................................1.25W TSOT23-5 ................................................0.45W TSOT23-5 ............................. 220 .... 110 .. °C/W QFN6(2x2mm) ....................... 80 ...... 16 ... °C/W QFN8(3x3mm) ....................... 48 ...... 11 ... °C/W ESD SUSCEPTIBILITY (3) HBM (Human Body Mode) ..........................2kV MM (Machine Mode) ................................ 200V Recommended Operating Conditions (4) Supply Voltage VIN .......................... 2.5V to 40V Output Voltage VOUT ................... 1.215V to 15V Operating Junction Temp. (TJ). -40°C to +125°C MP2013 Rev. 1.0 4/23/2014 (5) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Devices are ESD sensitive. Handling precaution recommended. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 2 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR ELECTRICAL CHARACTERISTICS VOUT(NOM) = 5V (VIN≥6V) or FB (VIN<6V), IOUT = 1mA, COUT = 1μF, TJ = 25°C, unless otherwise noted. Parameter Symbol Input Voltage Output Voltage range Condition Min 2.5 40 V 1.215 15 V MP2013 IGND MP2013-33 ILIMIT Output Voltage Accuracy FB Voltage VFB Dropout Voltage VIN=VOUT(NOM)-0.1V VDROPOUT FB Pin Input Current IFB (6) Line Regulation (7) Load Regulation Output Voltage PSRR MP2013 Rev. 1.0 4/23/2014 (8) Units VIN VIN=2.5V to 40V Load Current Limit Max VOUT 0<IOUT<1mA, GND Pin Current Typ 1mA<IOUT<30mA, VIN=2.5V to 15V 30mA<IOUT<150mA, VIN=3V to 6V 0<IOUT<1mA, VIN=4.3V to 40V 1mA<IOUT<30mA, VIN=4.3V to 15V 30mA<IOUT<150mA, VIN=4.3V 3.2 7.2 14 18 35 50 µA 4.4 8 15 19 35 50 VOUT = 0V, VIN=6V to 15V MP2013-33, VIN=4.3V, IO=0 180 270 400 mA 3.234 3.3 3.366 V FB = OUT, VIN=5V 1.191 1.215 1.239 V MP2013, ILOAD = 150mA, VOUT(NOM)=5V 620 900 MP2013-33, ILOAD = 150mA 740 900 –50 +4 +50 nA 0.98 1.25 1.52 μA 0.01 0.05 %/V 0.003 0.005 0.005 0.01 MP2013, VFB = 1.3V, VIN=6V,OUT floating MP2013-33,VFB = 1.3V, VIN=6V,OUT floating VIN = 2.5 to 40V, ILOAD = 1mA, OUT = FB MP2013, ILOAD = 100μA to 150mA, OUT = FB, VIN=3V to 6V MP2013-33, ILOAD = 100μA to 150mA, VIN=4.3V to 6V 100Hz, CIN = 100pF, COUT = 4.7μF ILOAD=10mA, VIN = 6V 1kHz, CIN = 100pF, COUT = 4.7μF ILOAD=10mA, VIN = 6V 100kHz,CIN = 100pF, COUT = 4.7μF ILOAD=10mA, VIN = 6V mV %/mA 58 dB 41 dB 55 dB www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 3 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR ELECTRICAL CHARACTERISTICS (continued) VOUT(NOM) = 5V (VIN≥6V) or FB (VIN<6V), IOUT = 1mA, COUT = 1μF, TJ = 25°C, unless otherwise noted. Parameter Symbol Thermal Shutdown (8) Hysteresis Notes: 6) Line Regulation= (8) TSD 150 ΔTSD | VOUT[ VIN(MAX ) ] − VOUT[ VIN(MIN) ] | (VIN(MAX) − VIN(MIN) ) × VOUT(NOM) 7) Load Regulation= Min Typ RLOAD=500Ω, COUT=6.8µF, VOUT = 5V Startup Response Time Thermal Shutdown Condition | VOUT[IOUT (MAX ) ] − VOUT[IOUT (MIN) ] | (IOUT(MAX) − IOUT(MIN) ) × VOUT(NOM) Max Units 2.5 ms 165 °C 20 °C × (% / V) × (% / mA) 8) Derived from bench characterization. Not tested in production. MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 4 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR PIN FUNCTIONS Pin # Name Description TSOT23-5 QFN6 (2x2mm) QFN8 (3x3mm) 3 1 1 IN1 Input Voltage. Connect a 2.5V to 40V supply to this pin. 2 2 2 IN2 VIN pin to power internal logic. Connect to IN1. 1 3, exposed pad 4, exposed pad GND 5 4 5 FB 4 6 8 OUT 5 3, 6, 7 NC MP2013 Rev. 1.0 4/23/2014 Ground (the exposed pad and GND pin must be connected to the same ground plane) Feedback input pin, regulated to 1.215V nominally. Connected to an external resistive divider between OUT and GND to set output voltage. For fixed output version, this pin can be just float. Regulated output voltage, only low-value ceramic capacitor (≥ 0.47μF) on output is required for stability. No connection. May be left open or tied to Ground for improved thermal performance. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 5 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR TYPICAL CHARACTERISTICS MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 6 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS CIN = 1μF, COUT = 4.7μF, VOUT=5V, TA = +25ºC, unless otherwise noted MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 7 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) CIN = 1μF, COUT = 4.7μF, VOUT=5V, TA = +25ºC, unless otherwise noted MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 8 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR OPERATION The MP2013 is a linear regulator that supplies power to systems with high voltage batteries. It includes a wide 2.5V to 40V input range, low dropout voltage and low quiescent supply current. The MP2013 provides wide variety of fixed output voltage options: 1.8V, 1.9V, 2.3V, 2.5V, 3.0V, 3.3V, 3.45V, 5.0V; and also provides the output adjustable option (from 1.215V to 15V). The output adjustable version has an output that is adjustable from 1.215V to 15V with a simple resistor divider. It uses external feedback, allowing the user to set the output voltage with an external resistor divider. The typical FB pin voltage is 1.215V. The regulator output current is internally limited and the device is protected against over-load and over-temperature conditions. The peak output current is limited to around 270mA, which exceeds the 150mA recommended continuous output current. When the junction temperature is too high, the thermal sensor sends a signal to the control logic that will shutdown the IC. The IC will restart when the temperature has sufficiently cooled. The maximum power output current is a function of the package’s maximum power dissipation for a given temperature. The maximum power dissipation is dependent on the thermal resistance of the case and the circuit board, the temperature difference between the die junction and the ambient air, and the rate of air flow. The GND pin and Exposed Pad must be connected to the ground plane for proper dissipation. VIN1 UVLO Vreference EA VOUT VIN2 GND FB For fixed output version only Figure 1: Functional Block Diagram MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 9 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR APPLICATION INFORMATION COMPONENT SELECTION Setting the Output Voltage Set the output voltage of the MP2013 by using a resistor divider as shown: OUT VOUT MP2013 R1 FB GND R2 Figure 2: FB Resistor Divider to Set VOUT Choose R2=1MΩ to maintain a 1.215µA minimum load. Calculate the value for R1 using the following equation: V R1 = R2 × OUT − 1 1.215V OUTPUT NOISE For fixed output version, VOUT also can be adjusted by adding external resistor divider. Just note to take internal FB resistor divider into consideration when choose external divider. MP2013 VOUT OUT R1_IN R2_IN GND R1 FB R2 Figure 3: FB Divider of Fixed Output Version The internal FB resistor dividers for different fixed output versions please see below table. Table 1: Internal FB Resistor Divider Fixed Output Voltage R1_IN R2_IN 3.3V 1.72MΩ 1MΩ MP2013 Rev. 1.0 4/23/2014 Input Capacitor For proper operation, place a ceramic capacitor (C1) between 1µF and 10µF of dielectric type X5R or X7R between the input pin and ground. Larger values in this range will help improve line transient response. Output Capacitor For stable operation, use a ceramic capacitor (C2) of type X5R or X7R between 1µF and 10µF. Larger values in this range will help improve load transient response and reduce noise. Output capacitors of other dielectric types may be used, but are not recommended as their capacitance can deviate greatly from their rated value over temperature. To improve load transient response, add a small ceramic (X5R, X7R or Y5V dielectric) 22nF feed forward capacitor in parallel with R1. The feed forward capacitor is not required for stable operation. The MP2013 will exhibit noise on the output during normal operation. This noise is negligible for most applications. However, in applications that include analog-to-digital converters (ADCs) of more than 12 bits, one needs to consider the ADC’s power supply rejection specifications. The feed forward capacitor C2 across R1 will significantly reduce the output noise. PCB LAYOUT GUIDE PCB layout is very important to achieve good regulation, ripple rejection, transient response and thermal performance. It is highly recommended to duplicate EVB layout for optimum performance. If change is necessary, please follow these guidelines and take figure 5 for reference. 1) Input and output bypass ceramic capacitors are suggested to be put close to the IN Pin and OUT Pin respectively. 2) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 10 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR 3) Connect IN, OUT and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. VOUT VIN IN1 C1 C2 OUT MP2013 IN2 GND C2 GND R2 R1 GND FB 5 4 NC 6 3 NC NC 7 2 IN2 OUT 8 1 IN1 R1 FB R2 C3 OUT C3 C1 IN Figure 5: PCB Layout (Top Layer) GND C1 1 GND DESIGN EXAMPLE R2 C3 FB 5 R1 2 IN2 3 IN1 C1 1uF IN2 GND C2 R1 22nF 1.72MΩ FB R2 1MΩ C3 4.7uF GND FB 4 Figure 6: Design Example 3 GND NC 5 2 IN2 OUT 6 1 IN1 C3 MP2013 Rev. 1.0 4/23/2014 OUT 3.3V OUT R1 VOUT IN1 MP2013 R2 OUT VIN C2 OUT 4 IN C2 Below is a design example following the application guidelines for VOUT=3.3V with feedforward cap. C1 IN www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 11 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR TYPICAL APPLICATION CIRCUITS VIN VOUT IN1 OUT 3.3V MP2013 C1 1uF IN2 GND R1 1.72MΩ FB C2 4.7uF R2 1MΩ Figure 7: 3.3V Output Typical Application Circuit VIN VOUT IN1 OUT 3.3V MP2013 C1 1uF IN2 GND C2 R1 22nF 1.72MΩ FB R2 1MΩ C3 4.7uF Figure 8: 3.3V Output with Feedforward Capacitor VOUT VIN IN1 OUT 5V MP2013 C1 1uF IN2 GND R1 3.1MΩ FB R2 1MΩ C2 4.7uF Figure 9: 5V Output Typical Application Circuit MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 12 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR PACKAGE INFORMATION QFN8 (3x3mm) 0.30 0.50 2.90 3.10 PIN 1 ID MARKING 0.20 0.30 2.90 3.10 PIN 1 ID INDEX AREA 1.45 1.75 PIN 1 ID SEE DETAIL A 8 1 2.25 2.55 0.65 BSC 4 5 TOP VIEW BOTTOM VIEW PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.80 1.00 0.20 REF 0.00 0.05 DETAIL A SIDE VIEW NOTE: 2.90 0.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VEEC-2. 5) DRAWING IS NOT TO SCALE. 1.70 0.25 2.50 0.65 RECOMMENDED LAND PATTERN MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 13 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR QFN6 (2x2mm) 1.90 2.10 0.30 0.40 PIN 1 ID MARKING 0.20 0.30 1.90 2.10 PIN 1 ID INDEX AREA 0.65 0.85 PIN 1 ID SEE DETAIL A 6 1 1.25 1.45 0.65 BSC 3 4 TOP VIEW BOTTOM VIEW 0.80 1.00 0.20 REF PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.00 0.05 SIDE VIEW DETAIL A 1.90 0.70 NOTE: 0.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VCCC. 5) DRAWING IS NOT TO SCALE. 0.25 1.40 0.65 RECOMMENDED LAND PATTERN MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 14 MP2013 - 40V, 150mA, LOW QUIESCENT CURRENT LINEAR REGULATOR TSOT23-5 0.95 BSC 0.60 TYP 2.80 3.00 5 4 1.20 TYP 1.50 1.70 1 2.60 3.00 2.60 TYP 3 TOP VIEW RECOMMENDED LAND PATTERN 0.84 0.90 1.00 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.10 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o 0.30 0.50 DETAIL “A” 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2013 Rev. 1.0 4/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 15