Product Folder Sample & Buy Support & Community Tools & Software Technical Documents OPA2211-EP SBOS761 – NOVEMBER 2015 OPA2211-EP 1.1-nV/√Hz Noise, Low-Power, Precision Operational Amplifier 1 Features 3 Description • • • • • • • • The OPA2211-EP series of precision operational amplifiers achieves very-low 1.1-nV/√Hz noise density with a supply current of only 3.6 mA. This series also offers rail-to-rail output swing, which maximizes dynamic range. 1 • • • • • • Low Voltage Noise: 1.1 nV/√Hz at 1 kHz Input Voltage Noise: 80 nVPP (0.1 to 10 Hz) THD+N: –136 dB (G = 1, ƒ = 1 kHz) Offset Voltage: 180 μV (Max) Offset Voltage Drift: 0.35 μV/°C (Typ) Low Supply Current: 3.6 mA/Ch (Typ) Unity-Gain Stable Gain Bandwidth Product: 80 MHz (G = 100) 45 MHz (G = 1) Slew Rate: 27 V/μs 16-Bit Settling: 700 ns Wide Supply Range: ±2.25 V to ±18 V, +4.5 V to +36 V Rail-to-Rail Output Output Current: 30 mA Supports Defense, Aerospace, and Medical Applications – Controlled Baseline – One Assembly and Test Site – One Fabrication Site – Available in Military (–55°C to 125°C) Temperature Range (1) – Extended Product Life Cycle – Extended Product-Change Notification – Product Traceability The extremely low voltage and low current noise, high speed, and wide output swing of the OPA2211EP series make these devices an excellent choice as a loop filter amplifier in PLL applications. In precision data acquisition applications, the OPA2211-EP series of operational amplifiers provides 700-ns settling time to 16-bit accuracy throughout 10-V output swings. This AC performance, combined with only 125 μV of offset and 0.35 μV/°C of drift over temperature, makes the OPA2211-EP ideal for driving high-precision 16-bit analog-to-digital converters (ADCs) or buffering the output of highresolution digital-to-analog converters (DACs). The OPA2211-EP is specified over a wide dual-power supply range of ±2.25 V to ±18 V, or for single-supply operation from 4.5 to 36 V. The OPA2211-EP is available in a small DFN-8 (3mm × 3-mm) package. These operational amplifiers are specified from TJ = –55°C to 125°C. Device Information(1) PART NUMBER OPA2211-EP (1) 3.00 mm × 3.00 mm Voltage Noise Density vs Frequency 100 Voltage Noise Density (nV/ √ Hz) PLL Loop Filter Low-Noise, Low-Power Signal Processing 16-Bit ADC Drivers DAC Output Amplifiers Active Filters Low-Noise Instrumentation Amplifiers Ultrasound Amplifiers Professional Audio Preamplifiers Low-Noise Frequency Synthesizers Infrared Detector Amplifiers Hydrophone Amplifiers Geophone Amplifiers Medical WSON (8) BODY SIZE (NOM) (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications • • • • • • • • • • • • • PACKAGE 10 1 0.1 1 10 100 1k 10k 100k Frequency (Hz) Additional temperature ranges available - contact factory 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 7 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics: VS = ±2.25 to ±18 V......... Typical Characteristics .............................................. 7.4 Device Functional Modes........................................ 16 8 Application and Implementation ........................ 17 8.1 Application Information............................................ 17 8.2 Typical Application ................................................. 19 9 Power Supply Recommendations...................... 22 9.1 Operating Voltage ................................................... 22 10 Layout................................................................... 22 10.1 Layout Guidelines ................................................. 22 10.2 Layout Example .................................................... 23 10.3 Thermal Considerations ........................................ 23 11 Device and Documentation Support ................. 24 11.1 11.2 11.3 11.4 Detailed Description ............................................ 14 7.1 Overview ................................................................. 14 7.2 Functional Block Diagram ....................................... 14 7.3 Feature Description................................................. 14 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 24 24 24 24 12 Mechanical, Packaging, and Orderable Information ........................................................... 24 4 Revision History 2 DATE REVISION NOTES November 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 5 Pin Configuration and Functions DRG Package 8-Pin WSON Top View 8 V+ OUT A 1 IN A 2 +IN A 3 7 OUT B A B V 4 6 IN B 5 +IN B (1) Pad (1) Exposed thermal die pad on underside; connect thermal die pad to V–. Soldering the thermal pad improves heat dissipation and provides specified performance Pin Functions PIN NAME NO. I/O DESCRIPTION +IN A 3 I Noninverting input for channel A –IN A 2 I Inverting input for channel A +IN B 5 I Noninverting input for channel B –IN B 6 I Inverting input for channel B OUT A 1 O Output terminal for channel A OUT B 7 O Output terminal for channel B V+ 8 — Positive supply voltage V– 4 — Negative supply voltage Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 3 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Supply voltage MAX UNIT 40 V VS = (V+) – (V–) Input voltage Input current (any pin except power-supply pins) (V–) – 0.5 (V+) + 0.5 V –10 10 mA 150 °C 150 °C Output short-circuit (2) Continuous Junction temperature, TJ Storage temperature, Tstg (1) (2) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Short-circuit to VS / 2 (ground in symmetrical dual supply setups), one amplifier per package. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±3000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN Supply voltage (V+ – V–) Operating temperature, TJ NOM MAX UNIT 4.5 (±2.25) 36 (±18) V –55 125 °C 6.4 Thermal Information OPA2211-EP THERMAL METRIC (1) DRG (WSON) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 47.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 51.8 °C/W RθJB Junction-to-board thermal resistance 21.8 °C/W ψJT Junction-to-top characterization parameter 0.7 °C/W ψJB Junction-to-board characterization parameter 21.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 4.2 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 6.5 Electrical Characteristics: VS = ±2.25 to ±18 V at TJ = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ±50 ±175 μV OFFSET VOLTAGE Input offset voltage VOS Over temperature VS = ±15 V TJ = –55°C to 125°C Drift dVOS/dT TJ = –55°C to 125°C vs power supply PSRR VS = ±2.25 V to ±18 V ±350 0.1 Over temperature µV μV/°C 0.35 1 μV/V 3 μV/V INPUT BIAS CURRENT Input bias current IB VCM = 0 V, TJ = –55°C to 125°C ±50 ±350 nA Offset current IOS VCM = 0 V, TJ = –55°C to 125°C ±20 ±200 nA en ƒ = 0.1 Hz to 10 Hz NOISE Input voltage noise 80 nVPP 2 nV/√Hz ƒ = 100 Hz 1.4 nV/√Hz ƒ = 1 kHz 1.1 nV/√Hz ƒ = 10 Hz 3.2 pA/√Hz ƒ = 1 kHz 1.7 pA/√Hz ƒ = 10 Hz Input voltage noise density Input current noise density In INPUT VOLTAGE RANGE Common-mode voltage range Common-mode rejection ratio VCM CMRR VS ≥ ±5 V (V–) + 1.8 (V+) – 1.4 V VS < ±5 V (V–) + 2 (V+) – 1.4 V VS ≥ ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V, TJ = –55°C to 125°C 114 120 dB VS < ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V, TJ = –55°C to 125°C 106 120 dB INPUT IMPEDANCE Differential 20k || 8 Ω || pF Common-mode 109 || 2 Ω || pF OPEN-LOOP GAIN Open-loop voltage gain Over temperature AOL AOL (V–) + 0.2 V ≤ VO ≤ (V+) – 0.2V, RL = 10 kΩ, TJ = –55°C to 125°C 114 130 dB (V–) + 0.6 V ≤ VO ≤ (V+) – 0.6 V, RL = 600 Ω 110 114 dB (V–) + 0.6 V ≤ VO ≤ (V+) – 0.6V, IO ≤ 15 mA, TJ = –55°C to 125°C 100 dB FREQUENCY RESPONSE Gain-bandwidth product GBW Slew rate SR Settling time, 0.01% tS 0.0015% (16-bit) Overload recovery time Total harmonic distortion + noise THD+N G = 100 80 MHz G=1 45 MHz 27 V/μs VS = ±15 V, G = –1, 10-V step, CL = 100 pF 400 ns VS = ±15 V, G = –1, 10-V step, CL = 100 pF 700 ns G = –10 500 ns G = +1, ƒ = 1kHz, VO = 3VRMS, RL = 600 Ω 0.000015 % –136 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP dB 5 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Electrical Characteristics: VS = ±2.25 to ±18 V (continued) at TJ = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT Voltage output VOUT Short-circuit current ISC Capacitive load drive CLOAD Open-loop output impedance ZO RL = 10 kΩ, AOL ≥ 114 dB, TJ = –55°C to 125°C (V–) + 0.2 (V+) – 0.2 V RL = 600 Ω, AOL ≥ 110 dB (V–) + 0.6 (V+) – 0.6 V IO < 15 mA, AOL ≥ 100 dB, TJ = –55°C to 125°C (V–) + 0.6 (V+) – 0.6 V +30/–45 mA See Typical Characteristics pF 5 Ω ƒ = 1MHz POWER SUPPLY Specified voltage VS Quiescent current (per channel) IQ Over temperature ±2.25 IOUT = 0 A 3.6 TJ = –55°C to 125°C ±18 V 4.5 mA 6 mA 125 °C TEMPERATURE RANGE Operating range 6 TJ –55 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 6.6 Typical Characteristics At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 100 Current Noise Density (pA/ÖHz) Voltage Noise Density (nV/ÖHz) 100 10 1 10 1 0.1 1 10 100 1k 10k 100k 0.1 1 10 Frequency (Hz) 100 1k 10k 100k Frequency (Hz) Figure 1. Input Voltage Noise Density vs Frequency Figure 2. Input Current Noise Density vs Frequency VS = ±15V -90 V = 3.5V IN RMS -100 G = 1 RL = 600W -110 20nV/div Channel Separation (dB) -80 -120 -130 -140 RL = 2kW -150 -160 RL = 5kW -170 -180 100 10 1k 10k Time (1s/div) 100k Frequency (Hz) Figure 4. 0.1-Hz to 10-Hz Noise Figure 3. Channel Separation vs Frequency 160 140 140 120 100 100 CMRR (dB) PSRR (dB) 120 -PSRR 80 +PSRR 60 80 60 40 40 20 20 0 0 1 10 100 1k 10k 100k 1M 10M 100M 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 5. Power-Supply Rejection Ratio vs Frequency (Referred to Input) Figure 6. Common-Mode Rejection Ratio vs Frequency Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 7 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Typical Characteristics (continued) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 180 140 10k 120 Gain (dB) 100 100 10 80 90 60 40 Gain 20 1 135 Phase Phase (°) ZO (W) 1k 45 0 0.1 100 1k 10k 100k 1M 10M 100 100M 1k 10k Figure 7. Open-Loop Output Impedance vs Frequency 5 100k 1M 10M Frequency (Hz) Frequency (Hz) Figure 8. Gain and Phase vs Frequency RL = 10kW 4 3 2 300mV Swing From Rails 1 Population Open-Loop Gain (mV/V) 0 100M -20 10 0 -1 200mV Swing From Rails -2 -3 -4 112.5 125.0 87.5 100.0 62.5 75.0 37.5 50.0 25.0 0 12.5 -12.5 -37.5 -25.0 -62.5 -50.0 75 100 125 150 175 200 -87.5 50 Temperature (°C) -75.0 25 -112.5 0 -100.0 -75 -50 -25 -125.0 -5 Offset Voltage (mV) Figure 10. Offset Voltage Production Distribution Figure 9. Normalized Open-Loop Gain vs Temperature 200 Population IB and IOS Bias Current (nA) 150 100 +IB 50 IOS 0 -50 -IB -100 -150 -200 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 -50 Offset Voltage Drift (mV/°C) 0 25 50 75 100 125 150 Ambient Temperature (°C) Figure 11. Offset Voltage Drift Production Distribution 8 -25 Figure 12. IB and IOS Current vs Temperature Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 Typical Characteristics (continued) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 12 10 2000 1500 8 VOS Shift (mV) 1000 500 VOS (mV) 20 Typical Units Shown 0 -500 -1000 6 4 2 0 -2 -4 -6 -8 -1500 -10 -12 -2000 (V-)+1.0 (V-)+1.5 (V-)+2.0 0 (V+)-1.5 (V+)-1.0 (V+)-0.5 10 20 30 VCM (V) Figure 13. Offset Voltage vs Common-Mode Voltage 100 80 60 50 Figure 14. VOS Warmup 100 5 Typical Units Shown VS = 36V 3 Typical Units Shown 75 60 50 40 20 IOS (nA) IOS (nA) 40 Time (s) 0 -20 25 0 -25 Common-Mode Range -40 -50 -60 -75 -80 -100 2.25 -100 4 6 8 10 12 14 1 18 16 5 10 15 Figure 15. Input Offset Current vs Supply Voltage 25 30 35 Figure 16. Input Offset Current vs Common-Mode Voltage 150 150 3 Typical Units Shown 100 VS = 36V 3 Typical Units Shown 100 Unit 1 -IB +IB Unit 2 50 IB (nA) 50 IB (nA) 20 VCM (V) VS (±V) 0 Unit 2 Unit 1 0 Unit 3 -50 -50 Unit 3 -100 -IB -100 Common-Mode Range +IB -150 2.25 -150 4 6 8 10 12 14 16 18 1 5 10 15 20 25 30 35 VCM (V) VS (±V) Figure 17. Input Bias Current vs Supply Voltage Figure 18. Input Bias Current vs Common-Mode Voltage Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 9 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Typical Characteristics (continued) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 6 4.0 3.5 5 3.0 2.5 IQ (mA) IQ (mA) 4 3 2.0 1.5 2 1.0 1 0.5 0 0 -75 -50 -25 0 25 0 75 100 125 150 175 200 50 4 8 12 0.05 0 ISC (mA) IQ Shift (mA) -0.05 -0.10 -0.15 -0.20 -0.25 Average of 10 Typical Units 24 28 32 36 60 50 40 30 20 10 0 -10 -20 -30 -40 -50 Sourcing Sinking -60 -0.30 0 60 120 180 240 300 360 420 480 540 -75 -50 -25 600 0 25 50 75 100 125 150 175 200 Temperature (°C) Time (s) Figure 22. Short-Circuit Current vs Temperature Figure 21. Normalized Quiescent Current vs Time G = -1 CL = 100pF G = -1 CL = 10pF CF 5.6pF CF 5.6pF RI 604W 20mV/div 20mV/div 20 Figure 20. Quiescent Current vs Supply Voltage Figure 19. Quiescent Current vs Temperature RF 604W RI 604W RF 604W +18V +18V OPA211 OPA211 CL CL -18V -18V Time (0.1µs/div) Time (0.1µs/div) Figure 23. Small-Signal Step Response (100 mV) 10 16 VS (V) Temperature (°C) Figure 24. Small-Signal Step Response (100 mV) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 Typical Characteristics (continued) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. G = +1 RL = 600W CL = 100pF 20mV/div 20mV/div G = +1 RL = 600W CL = 10pF +18V OPA211 -18V RL +18V OPA211 -18V CL Time (0.1ms/div) RL CL Time (0.1ms/div) Figure 25. Small-Signal Step Response (100 mV) Figure 26. Small-Signal Step Response (100 mV) 60 G = -1 CL = 100pF RL = 600W G = +1 40 G = -1 2V/div Overshoot (%) 50 30 G = 10 20 10 0 0 200 400 600 800 1000 1200 Time (0.5ms/div) 1400 Capacitive Load (pF) Figure 27. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) 2V/div RF = 100W Note: See the Applications Information section, Input Protection. 1.0 0.010 0.8 0.008 0.6 0.006 0.4 16-Bit Settling 0.2 -0.2 (±1/2 LSB = ±0.00075%) -0.4 -0.002 -0.004 -0.6 -0.006 -0.8 -0.008 0 Figure 29. Large-Signal Step Response 0.002 0 0 -1.0 Time (0.5ms/div) 0.004 100 200 300 400 500 600 Time (ns) D From Final Value (%) RF = 0W D From Final Value (mV) G = +1 CL = 100pF RL = 600W Figure 28. Large-Signal Step Response -0.010 700 800 900 1000 Figure 30. Large-Signal Positive Settling Time (10 VPP, CL = 100 pF) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 11 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Typical Characteristics (continued) 1.0 0.010 0.008 0.8 0.008 0.6 0.006 0.6 0.006 0.4 0.004 16-Bit Settling 0.2 0 0.002 0 -0.2 (±1/2 LSB = ±0.00075%) -0.4 -0.002 -0.004 0 0.006 0.4 16-Bit Settling 0.2 0 0.004 0.002 0 (±1/2 LSB = ±0.00075%) -0.002 -0.004 -0.6 -0.006 -0.8 -0.008 200 300 200 300 400 500 600 Time (ns) G = -10 0V 10kW 1kW OPA211 VOUT VIN VOUT -0.010 700 800 900 1000 400 500 600 Time (ns) -0.010 700 800 900 1000 VIN 5V/div D From Final Value (mV) 0.6 100 Figure 32. Large-Signal Negative Settling Time (10 VPP, CL = 100 pF) D From Final Value (%) 0.008 100 -0.004 -0.008 0.010 0 -0.002 -1.0 0.8 -1.0 (±1/2 LSB = ±0.00075%) -0.4 -0.010 700 800 900 1000 1.0 -0.4 0 -0.2 Figure 31. Large-Signal Positive Settling Time (10 VPP, CL = 10 pF) -0.2 0.002 0 -0.006 -1.0 400 500 600 Time (ns) 0.004 -0.8 -0.8 200 300 16-Bit Settling 0.2 -0.008 -0.006 100 0.4 -0.6 -0.6 0 D From Final Value (mV) 0.010 0.8 D From Final Value (%) 1.0 D From Final Value (%) D From Final Value (mV) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. Time (0.5ms/div) Figure 33. Large-Signal Negative Settling Time (10 VPP, CL = 10 pF) Figure 34. Negative Overload Recovery 20 0°C G = -10 15 10kW VOUT 1kW OPA211 VOUT VOUT (V) VIN 5V/div +85°C +125°C 10 5 +125°C 0 -55°C 0°C +150°C -5 0V VIN -10 +85°C -15 -20 Time (0.5ms/div) 0 Figure 35. Positive Overload Recovery 12 10 20 30 40 IOUT (mA) 50 60 70 Figure 36. Output Voltage vs Output Current Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 Typical Characteristics (continued) At TJ = 25°C, VS = ±18 V, and RL = 10 kΩ, unless otherwise noted. 5V/div Output +18V OPA211 Output 37VPP (±18.5V) -18V 0.5ms/div Figure 37. No Phase Reversal Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 13 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com 7 Detailed Description 7.1 Overview The OPA2211-EP is a unity-gain stable, precision operational amplifier with very low noise. Applications with noisy or high-impedance power supplies require decoupling capacitors close to the device pins. In most cases, 0.1-μF capacitors are adequate. Functional Block Diagram shows a simplified schematic of the OPA2211-EP. This die uses a SiGe bipolar process and contains 180 transistors. 7.2 Functional Block Diagram V+ Pre-Output Driver IN- OUT IN+ V- 7.3 Feature Description 7.3.1 Input Protection The input terminals of the OPA2211-EPFigure 38 are protected from excessive differential voltage with back-toback diodes, as shown in . In most circuit applications, the input protection circuitry has no consequence. However, in low-gain or G = 1 circuits, fast ramping input signals can forward bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 29 in the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10 mA or less. If the input signal current is not inherently limited, an input series resistor can be used to limit the signal input current. This input series resistor degrades the low-noise performance of the OPA2211-EP, and is discussed in Noise Performance. Figure 38 shows an example implementing a current-limiting feedback resistor. 14 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 Feature Description (continued) RF - Output OPA2211-EP RI Input + Figure 38. Pulsed Operation 7.3.2 Noise Performance Figure 39 shows total circuit noise for varying source impedances with the operational amplifier in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). Two different operational amplifiers are shown with total circuit noise calculated. The OPA2211-EP has very low voltage noise, making it ideal for low source impedances (<2 kΩ). A similar precision operational amplifier, the OPA227, has somewhat higher voltage noise but lower current noise. It provides excellent noise performance at moderate source impedance (10 kΩ to 100 kΩ). Above 100 kΩ, a FET-input operational amplifier such as the OPA132 (very-low current noise) may provide improved performance. The equation in Figure 39 is shown for the calculation of the total circuit noise. Note that en = voltage noise, In = current noise, RS = source impedance, k = Boltzmann’s constant = 1.38 × 10–23 J/K, and T is temperature in K. Votlage Noise Spectral Density, EO 10k EO 1k RS OPA227 OPA211 100 Resistor Noise 10 2 2 2 EO = en + (in RS) + 4kTRS 1 100 1k 10k 100k 1M Source Resistance, RS (Ω) Figure 39. Noise Performance of the OPA2211-EP and OPA227 in Unity-Gain Buffer Configuration 7.3.3 Basic Noise Calculations Design of low-noise operational amplifier circuits requires careful consideration of a variety of possible noise contributors: noise from the signal source, noise generated in the operational amplifier, and noise from the feedback network resistors. The total noise of the circuit is the root-sum-square combination of all noise components. The resistive portion of the source impedance produces thermal noise proportional to the square root of the resistance. This function is plotted in Figure 39. The source impedance is usually fixed; consequently, select the operational amplifier and the feedback resistors to minimize the respective contributions to the total noise. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 15 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Feature Description (continued) Figure 39 depicts total noise for varying source impedances with the operational amplifier in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). The operational amplifier itself contributes both a voltage noise component and a current noise component. The voltage noise is commonly modeled as a time-varying component of the offset voltage. The current noise is modeled as the timevarying component of the input bias current and reacts with the source resistance to create a voltage component of noise. Therefore, the lowest noise operational amplifier for a given application depends on the source impedance. For low source impedance, current noise is negligible and voltage noise generally dominates. For high source impedance, current noise may dominate. Figure 41 shows both inverting and noninverting operational amplifier circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise. The current noise of the operational amplifier reacts with the feedback resistors to create additional noise components. The feedback resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are shown for both configurations. 7.3.4 Total Harmonic Distortion Measurements OPA2211-EP series operational amplifiers have excellent distortion characteristics. THD + Noise is below 0.0002% (G = +1, VOUT = 3 VRMS) throughout the audio frequency range, 20 Hz to 20 kHz, with a 600-Ω load. The distortion produced by OPA2211-EP series operational amplifiers is below the measurement limit of many commercially available distortion analyzers. However, a special test circuit illustrated in Figure 42 can be used to extend the measurement capabilities. Operational amplifier distortion can be considered an internal error source that can be referred to the input. Figure 42 shows a circuit that causes the operational amplifier distortion to be 101 times greater than that normally produced by the operational amplifier. The addition of R3 to the otherwise standard noninverting amplifier configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the operational amplifier are the same as with conventional feedback without R3. The value of R3 should be kept small to minimize its effect on the distortion measurements. Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an Audio Precision System Two distortion/noise analyzer, which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments. 7.4 Device Functional Modes The OPAx211 has a single functional mode and is operational when the power-supply voltage is greater than 4.5 V (±2.25 V). The maximum power supply voltage for the OPAx211 is 36 V (±18 V). 16 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information 8.1.1 Electrical Overstress Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. It is helpful to have a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event. Figure 40 illustrates the ESD circuits contained in the OPA2211-EP (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where they meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation. An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, highcurrent pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent it from being damaged. The energy absorbed by the protection circuitry is then dissipated as heat. When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or more of the steering diodes. Depending on the path that the current takes, the absorption device may activate. The absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPA2211-EP but below the device breakdown voltage level. Once this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. When the operational amplifier connects into a circuit such as that illustrated in Figure 40, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. Should this condition occur, there is a risk that some of the internal ESD protection circuits may be biased on, and conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption device. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 17 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Application Information (continued) RF +VS +V OPA2211-EP RI ESD CurrentSteering Diodes -In +In Op-Amp Core Edge-Triggered ESD Absorption Circuit ID VIN Out RL (1) -V -VS (1) VIN = +VS + 500 mV Figure 40. Equivalent Internal ESD Circuitry and its Relation to a Typical Circuit Application Figure 40 depicts a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by 500mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that applications limit the input current to 10mA. If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. In extreme but rare cases, the absorption device triggers on while +VS and –VS are applied. If this event happens, a direct current path is established between the +VS and –VS supplies. The power dissipation of the absorption device is quickly exceeded, and the extreme internal heating destroys the operational amplifier. Another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies +VS and/or –VS are at 0 V. Again, it depends on the supply characteristic while at 0V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current steering diodes. This state is not a normal bias condition; the amplifier most likely will not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path. 18 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 8.2 Typical Application Noise in Noninverting Gain Configuration Noise at the output: R2 2 2 EO R1 = 1+ R2 R1 2 2 2 2 2 2 en + e1 + e2 + (inR2) + eS + (inRS) EO R2 Where eS = Ö4kTRS ´ 1 + R1 2 1+ R2 R1 = thermal noise of RS RS e1 = Ö4kTR1 ´ VS R2 R1 = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 Noise in Inverting Gain Configuration Noise at the output: R2 2 R2 2 EO = 1 + R1 R1 + RS 2 EO RS Where eS = Ö4kTRS ´ 2 2 2 2 en + e1 + e2 + (inR2) + eS R2 R1 + RS = thermal noise of RS VS e1 = Ö4kTR1 ´ R2 R1 + RS = thermal noise of R1 e2 = Ö4kTR2 = thermal noise of R2 For the OPA211 series op amps at 1kHz, en = 1.1nV/ÖHz and in = 1.7pA/ÖHz. Figure 41. Noise Calculation in Gain Configurations R1 R2 SIG. DIST. GAIN GAIN R3 Signal Gain = 1+ VOUT OPA2211-EP R2 R1 Distortion Gain = 1+ R2 R1 II R3 Generator Output R1 R2 R3 1 101 ¥ 1kW 10W 11 101 100W 1kW 11W Analyzer Input Audio Precision System Two(1) with PC Controller (1) Load For measurement bandwidth, see Figure 43, Figure 44, and Figure 45. Figure 42. Distortion Test Circuit Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 19 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com Typical Application (continued) 8.2.1 Design Requirements The design requirements for Signal Gain = 11 are: R2 Signal Gain 1 R1 where • • • • Supply voltage: 30 V (±15 V) R1 = 100 Ω R2 = 1 kΩ R3 = 11 Ω (1) 8.2.2 Detailed Design Procedure 8.2.2.1 Total Harmonic Distortion Measurements OPA2211-EP series operational amplifiers have excellent distortion characteristics. THD + Noise is below 0.0002% (G = +1, VOUT = 3VRMS) throughout the audio frequency range, 20 Hz to 20 kHz, with a 600-Ω load. The distortion produced by OPA2211-EP series operational amplifiers is below the measurement limit of many commercially available distortion analyzers. However, a special test circuit illustrated in Figure 47 can be used to extend the measurement capabilities. Operational amplifier distortion can be considered an internal error source that can be referred to the input. Figure 47 shows a circuit that causes the operational amplifier distortion to be 101 times greater than that normally produced by the operational amplifier. The addition of R3 to the otherwise standard noninverting amplifier configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the operational amplifier are the same as with conventional feedback without R3. The value of R3 should be kept small to minimize its effect on the distortion measurements. Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an Audio Precision System Two distortion/noise analyzer, which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments. Measurement BW = 80kHz 0.0001 -120 G = 11 RL = 600W G= 1 RL = 5kW G=1 RL = 600W -140 0.00001 10 100 1k 10k 20k Total Harmonic Distortion + Noise (%) -100 VS = 15V VOUT = 3VRMS 0.1 -60 0.01 -80 G = 11 0.001 -100 0.0001 0.00001 -120 VS = ±15V RL = 600W 1kHz Signal -140 Measurement BW = 80kHz 0.000001 0.01 0.1 1 G = -1 10 -160 100 Output Voltage Amplitude (VRMS) Frequency (Hz) Figure 43. THD+N Ratio vs Frequency 20 G=1 Total Harmonic Distortion + Noise (dB) 0.001 Total Harmonic Distortion + Noise (dB) Total Harmonic Distortion + Noise (%) 8.2.3 Application Curves Figure 44. THD+N Ratio vs Output Voltage Amplitude Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 Typical Application (continued) Total Harmonic Distortion + Noise (%) -100 VS = ±15V VIN = 3.5VRMS Measurement BW > 500kHz G = 11 RL = 600W 0.0001 -120 G= 1 RL = 5kW G=1 RL = 600W 0.00001 10 100 1k 10k Total Harmonic Distortion + Noise (dB) 0.001 -140 100k Frequency (Hz) Figure 45. THD+N Ratio vs Frequency Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 21 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com 9 Power Supply Recommendations 9.1 Operating Voltage OPA2211-EP series operational amplifiers operate from ±2.25-V to ±18-V supplies while maintaining excellent performance. The OPA2211-EP series can operate with as little as +4.5 V between the supplies and with up to +36 V between the supplies. However, some applications do not require equal positive and negative output voltage swing. With the OPA2211-EP series, power-supply voltages do not need to be equal. For example, the positive supply could be set to +25 V with the negative supply at –5 V or vice-versa. The common-mode voltage must be maintained within the specified range. In addition, key parameters are assured over the specified temperature range, TA = –55°C to 125°C. Parameters that vary significantly with operating voltage or temperature are shown in Typical Characteristics. 10 Layout 10.1 Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: • Noise can propagate into analog circuitry through the power pins of the circuit as a whole and op amp itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds paying attention to the flow of the ground current. For more detailed information refer to Circuit Board Layout Techniques, SLOA089. • In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. As shown in Figure 46, keeping RF and RG close to the inverting input minimizes parasitic capacitance. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. • Cleaning the PCB following board assembly is recommended for best performance. • Any precision integrated circuit may experience performance shifts due to moisture ingress into the plastic package. Following any aqueous PCB cleaning process, TI recommends baking the PCB assembly to remove moisture introduced into the device packaging during the cleaning process. A low temperature, post cleaning bake at 85°C for 30 minutes is sufficient for most circumstances. 22 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP OPA2211-EP www.ti.com SBOS761 – NOVEMBER 2015 10.2 Layout Example RIN VIN + VOUT RG ± RF (Schematic Representation) Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines as possible VS+ RF GND OUT A V+ ±IN A OUT B +IN A ±IN B V± +IN B RG GND RIN VIN GND Only needed for dualsupply operation VS± (or GND for single supply) VOUT Use low-ESR, ceramic bypass capacitor Ground (GND) plane on another layer Figure 46. Operational Amplifier Board Layout for Noninverting Configuration 10.3 Thermal Considerations The primary issue with all semiconductor devices is junction temperature (TJ). The most obvious consideration is assuring that TJ never exceeds the absolute maximum rating specified for the device. However, addressing device thermal dissipation has benefits beyond protecting the device from damage. Even modest increases in junction temperature can decrease operational amplifier performance, and temperature-related errors can accumulate. Understanding the power generated by the device within the specific application and assessing the thermal effects on the error tolerance lead to a better understanding of system performance and thermal dissipation needs. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP 23 OPA2211-EP SBOS761 – NOVEMBER 2015 www.ti.com 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.2 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 24 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: OPA2211-EP PACKAGE OPTION ADDENDUM www.ti.com 3-Mar-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) OPA2211MDRGTEP ACTIVE SON DRG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OCQM V62/15606-01XE ACTIVE SON DRG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OCQM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF OPA2211-EP : NOTE: Qualified Version Definitions: Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Dec-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device OPA2211MDRGTEP Package Package Pins Type Drawing SON DRG 8 SPQ 250 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 180.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.1 8.0 W Pin1 (mm) Quadrant 12.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Dec-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2211MDRGTEP SON DRG 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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