TI LM7322MA Dual rail-to-rail input/output 15v, high output current and unlimited capacitive load operational amplifier Datasheet

LM7321, LM7322
www.ti.com
SNOSAW8D – MAY 2008 – REVISED MARCH 2013
LM7321/LM7321Q Single/ LM7322/LM7322Q Dual Rail-to-Rail Input/Output ±15V, High
Output Current and Unlimited Capacitive Load Operational Amplifier
Check for Samples: LM7321, LM7322
FEATURES
DESCRIPTION
•
The LM7321/LM7321Q/LM7322/LM7322Q are rail-torail input and output amplifiers with wide operating
voltages
and
high
output
currents.
The
LM7321/LM7321Q/LM7322/LM7322Q are efficient,
achieving 18 V/µs slew rate and 20 MHz unity gain
bandwidth while requiring only 1 mA of supply current
per
op
amp.
The
LM7321/LM7321Q/LM7322/LM7322Q performance is
fully specified for operation at 2.7V, ±5V and ±15V.
1
2
•
•
•
•
•
•
•
•
•
•
•
•
•
(VS = ±15, TA = 25°C, Typical Values Unless
Specified.)
Wide Supply Voltage Range 2.5V to 32V
Output Current +65 mA/−100 mA
Gain Bandwidth Product 20 MHz
Slew Rate 18 V/µs
Capacitive Load Tolerance Unlimited
Input Common Mode Voltage 0.3V Beyond
Rails
Input Voltage Noise 15 nV/√Hz
Input Current Noise 1.3 pA/√Hz
Supply Current/Channel 1.1 mA
Distortion THD+Noise −86 dB
Temperature Range −40°C to 125°C
Tested at −40°C, 25°C and 125°C at 2.7V, ±5V,
±15V.
LM7321Q/LM7322Q are Automotive Grade
Products that are AEC-Q100 Grade 1 Qualified.
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
Driving MOSFETs and Power Transistors
Capacitive Proximity Sensors
Driving Analog Optocouplers
High Side Sensing
Below Ground Current Sensing
Photodiode Biasing
Driving Varactor Diodes in PLLs
Wide Voltage Range Power supplies
Automotive
International Power Supplies
The
LM7321/LM7321Q/LM7322/LM7322Q
are
designed to drive unlimited capacitive loads without
oscillations.
All
LM7321/LM7321Q
and
LM7322/LM732Q parts are tested at −40°C, 125°C,
and 25°C, with modern automatic test equipment.
High performance from −40°C to 125°C, detailed
specifications, and extensive testing makes them
suitable
for
industrial,
automotive,
and
communications applications.
Greater than rail-to-rail input common mode voltage
range with 50 dB of common mode rejection across
this wide voltage range, allows both high side and low
side sensing. Most device parameters are insensitive
to power supply voltage, and this makes the parts
easier to use where supply voltage may vary, such as
automotive electrical systems and battery powered
equipment. These amplifiers have true rail-to-rail
output and can supply a respectable amount of
current (15 mA) with minimal head- room from either
rail (300 mV) at low distortion (0.05% THD+Noise).
There are several package options for each part.
Standard SOIC versions of both parts make
upgrading existing designs easy. LM7322LM7322Q
are offered in a space saving 8-Pin VSSOP package.
The LM7321/LM7321Q are offered in small SOT-23
package, which makes it easy to place this part close
to sensors for better circuit performance.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM7321, LM7322
SNOSAW8D – MAY 2008 – REVISED MARCH 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS
10
12,200 pF
VS = ±15V
25V/DIV
1
+
VOUT from V (V)
8,600 pF
125°C
VS = ±15V, AV = +1
85°C
0.1
2,200 pF
10 pF
25°C
-40°C
INPUT
0.01
0.1
1
10
100
5 Ps/DIV
ISOURCE (mA)
Figure 1. Output Swing vs. Sourcing Current
Figure 2. Large Signal Step Response
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) (2)
Absolute Maximum Ratings
Human Body Model
ESD Tolerance
(3)
Machine Model
Charge-Device Model
VIN Differential
+
35V
−65°C to 150°C
Storage Temperature Range
Junction Temperature
(5)
Soldering Information:
(4)
(5)
(4)
V+ +0.8V, V− −0.8V
Voltage at Input/Output pins
(3)
1 kV
See
−
Supply Voltage (VS = V - V )
(2)
200V
±10V
Output Short Circuit Current
(1)
2 kV
150°C
Infrared or Convection (20 sec.)
235°C
Wave Soldering (10 sec.)
260°C
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
Operating Ratings
Supply Voltage (VS = V+ - V−)
Temperature Range
Package Thermal Resistance, θJA, (1)
(1)
2
2.5V to 32V
(1)
−40°C to 125°C
5-Pin SOT-23
325°C/W
8-Pin VSSOP
235°C/W
8-Pin SOIC
165°C/W
The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
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SNOSAW8D – MAY 2008 – REVISED MARCH 2013
2.7V Electrical Characteristics
(1)
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = 0.5V, VOUT = 1.35V, and RL > 1 MΩ to
1.35V. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Condition
VOS
Input Offset Voltage
VCM = 0.5V & VCM = 2.2V
TC VOS
Input Offset Voltage Temperature Drift
VCM = 0.5V & VCM = 2.2V
Max
(2)
Units
−5
−6
±0.7
+5
+6
mV
−2.0
−2.5
VCM = 2.2V
(5)
IOS
Input Offset Current
CMRR
PSRR
VCM = 0.5V and VCM = 2.2V
0.45
1.0
1.5
20
200
300
70
60
100
0V ≤ VCM ≤ 2.7V
55
50
70
2.7V ≤ VS ≤ 30V
78
74
104
−0.3
CMVR
AVOL
Common Mode Voltage Range
Open Loop Voltage Gain
Output Voltage Swing
High
VOUT
Output Voltage Swing
Low
IOUT
Output Current
CMRR > 50 dB
2.8
2.7
3.0
0.5V ≤ VO ≤ 2.2V
RL = 10 kΩ to 1.35V
65
62
72
0.5V ≤ VO ≤ 2.2V
RL = 2 kΩ to 1.35V
59
55
66
100
250
280
RL = 10 kΩ to 1.35V
VID = −100 mV
20
120
150
RL = 2 kΩ to 1.35V
VID = −100 mV
40
120
150
Sinking
VID = −200 mV, VOUT = 2.7V
(6)
LM7322
(7)
Slew Rate
fu
Unity Gain Frequency
(1)
(2)
(3)
(4)
(5)
(6)
(7)
30
20
48
40
30
65
V
dB
RL = 2 kΩ to 1.35V
VID = 100 mV
Supply Current
SR
−0.1
0.0
150
160
(6)
nA
dB
50
Sourcing
VID = 200 mV, VOUT = 0V
µA
dB
RL = 10 kΩ to 1.35V
VID = 100 mV
LM7321
IS
µV/C
−1.2
0V ≤ VCM ≤ 1.0V
Common Mode Rejection Ratio
Power Supply Rejection Ratio
(3)
±2
(4)
(5)
Input Bias Current
Typ
(2)
VCM = 0.5V
IB
Min
mV from
either rail
mA
0.95
1.3
1.9
2.0
2.5
3.8
mA
AV = +1, VI = 2V Step
8.5
V/µs
RL = 2 kΩ, CL = 20 pF
7.5
MHz
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
All limits are ensured by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
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2.7V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limits ensured for TA = 25°C, V+ = 2.7V, V− = 0V, VCM = 0.5V, VOUT = 1.35V, and RL > 1 MΩ to
1.35V. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Condition
Min
(2)
Typ
(3)
Max
(2)
Units
GBW
Gain Bandwidth
f = 50 kHz
16
en
Input Referred Voltage Noise Density
f = 2 kHz
11.9
nV/
in
Input Referred Current Noise Density
f = 2 kHz
0.5
pA/
+
MHz
−
THD+N
Total Harmonic Distortion + Noise
V = 1.9V, V = −0.8V
f = 1 kHz, RL = 100 kΩ, AV = +2
VOUT = 210 mVPP
−77
dB
CT Rej.
Crosstalk Rejection
f = 100 kHz, Driver RL = 10 kΩ
60
dB
±5V Electrical Characteristics
(1)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, VOUT = 0V, and RL > 1 MΩ to 0V.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Condition
VOS
Input Offset Voltage
VCM = −4.5V and VCM = 4.5V
TC VOS
Input Offset Voltage Temperature Drift
VCM = −4.5V and VCM = 4.5V
(5)
Input Bias Current
Typ
Max
(2)
Units
−5
−6
±0.7
+5
+6
mV
(2)
−2.0
−2.5
VCM = 4.5V
(5)
IOS
Input Offset Current
CMRR
PSRR
VCM = −4.5V and VCM = 4.5V
0.45
1.0
1.5
20
200
300
80
70
100
−5V ≤ VCM ≤ 5V
65
62
80
2.7V ≤ VS ≤ 30V, VCM = −4.5V
78
74
104
−5.3
CMVR
AVOL
(1)
(2)
(3)
(4)
(5)
4
Common Mode Voltage Range
Open Loop Voltage Gain
CMRR > 50 dB
µV/°C
−1.2
−5V ≤ VCM ≤ 3V
Common Mode Rejection Ratio
Power Supply Rejection Ratio
(3)
±2
(4)
VCM = −4.5V
IB
Min
5.1
5.0
5.3
−4V ≤ VO ≤ 4V
RL = 10 kΩ to 0V
74
70
80
−4V ≤ VO ≤ 4V
RL = 2 kΩ to 0V
68
65
74
µA
nA
dB
dB
−5.1
−5.0
V
dB
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
All limits are ensured by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
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LM7321, LM7322
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SNOSAW8D – MAY 2008 – REVISED MARCH 2013
±5V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, VOUT = 0V, and RL > 1 MΩ to 0V.
Boldface limits apply at the temperature extremes.
Symbol
Min
Max
RL = 10 kΩ to 0V
VID = 100 mV
100
250
280
RL = 2 kΩ to 0V
VID = 100 mV
160
350
450
RL = 10 kΩ to 0V
VID = −100 mV
35
200
250
RL = 2 kΩ to 0V
VID = −100 mV
80
200
250
Condition
Output Voltage Swing
High
VOUT
Output Voltage Swing
Low
IOUT
Typ
Parameter
Output Current
(2)
Sourcing
VID = 200 mV, VOUT = −5V
(6)
35
20
70
Sinking
VID = −200 mV, VOUT = 5V
(6)
50
30
85
LM7321
IS
VCM = −4.5V
Supply Current
LM7322
(7)
(3)
(2)
Units
mV from
either rail
mA
1.0
1.3
2
2.3
2.8
3.8
mA
SR
Slew Rate
AV = +1, VI = 8V Step
12.3
V/µs
fu
Unity Gain Frequency
RL = 2 kΩ, CL = 20 pF
9
MHz
GBW
Gain Bandwidth
f = 50 kHz
16
en
Input Referred Voltage Noise Density
f = 2 kHz
14.3
nV/
in
Input Referred Current Noise Density
f = 2 kHz
1.35
pA/
THD+N
Total Harmonic Distortion + Noise
f = 1 kHz, RL = 100 kΩ, AV = +2
VOUT = 8 VPP
−79
dB
CT Rej.
Crosstalk Rejection
f = 100 kHz, Driver RL = 10 kΩ
60
dB
(6)
(7)
MHz
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
±15V Electrical Characteristics
(1)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 15V, V− = −15V, VCM = 0V, VOUT = 0V, and RL > 1MΩ to
15V. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Condition
VOS
Input Offset Voltage
VCM = −14.5V and VCM = 14.5V
TC VOS
Input Offset Voltage Temperature Drift
VCM = −14.5V and VCM = 14.5V
(5)
Input Bias Current
VCM = 14.5V
(5)
IOS
(1)
(2)
(3)
(4)
(5)
Input Offset Current
Typ
Max
(2)
Units
−6
−8
±0.7
+6
+8
mV
(2)
VCM = −14.5V and VCM = 14.5V
(3)
±2
(4)
VCM = −14.5V
IB
Min
−2
−2.5
µV/°C
−1.1
0.45
1.0
1.5
30
300
500
µA
nA
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self-heating where TJ > TA.
All limits are ensured by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
Offset voltage temperature drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
Positive current corresponds to current flowing into the device.
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LM7321, LM7322
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±15V Electrical Characteristics (1) (continued)
Unless otherwise specified, all limited ensured for TA = 25°C, V+ = 15V, V− = −15V, VCM = 0V, VOUT = 0V, and RL > 1MΩ to
15V. Boldface limits apply at the temperature extremes.
Symbol
CMRR
Min
Typ
−15V ≤ VCM ≤ 12V
80
75
100
−15V ≤ VCM ≤ 15V
72
70
80
2.7V ≤ VS ≤ 30V, VCM = −14.5V
78
74
100
Parameter
Condition
(2)
Common Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
(3)
−15.3
CMVR
Common Mode Voltage Range
AVOL
Open Loop Voltage Gain
Output Voltage Swing
High
VOUT
Output Voltage Swing
Low
IOUT
Output Current
CMRR > 50 dB
15.1
15
15.3
−13V ≤ VO ≤ 13V
RL = 10 kΩ to 0V
75
70
85
−13V ≤ VO ≤ 13V
RL = 2 kΩ to 0V
70
65
78
Supply Current
dB
−15.1
−15
RL = 2 kΩ to 0V
VID = 100 mV
250
550
650
RL = 10 kΩ to 0V
VID = −100 mV
60
200
250
RL = 2 kΩ to 0V
VID = −100 mV
130
300
400
Sinking
VID = −200 mV, VOUT = 15V
(6)
(6)
VCM = −14.5V
40
65
60
100
V
dB
300
350
Sourcing
VID = 200 mV, VOUT = −15V
Units
dB
150
LM7322
(7)
(2)
RL = 10 kΩ to 0V
VID = 100 mV
LM7321
IS
Max
mV from
either rail
mA
1.1
1.7
2.4
2.5
4
5.6
mA
SR
Slew Rate
AV = +1, VI = 20V Step
18
V/µs
fu
Unity Gain Frequency
RL = 2 kΩ, CL = 20 pF
11.3
MHz
GBW
Gain Bandwidth
f = 50 kHz
20
MHz
en
Input Referred Voltage Noise Density
f = 2 kHz
15
nV/
in
Input Referred Current Noise Density
f = 2 kHz
1.3
pA/
THD+N
Total Harmonic Distortion +Noise
f = 1 kHz, RL 100 kΩ,
AV = +2, VOUT = 23 VPP
−86
dB
CT Rej.
Crosstalk Rejection
f = 100 kHz, Driver RL = 10 kΩ
60
dB
(6)
(7)
6
Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Short circuit test is a momentary test. Output short circuit duration is
infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.
Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.
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CONNECTION DIAGRAMS
N/C
-IN
-
V
3
-
+IN
4
-IN
Figure 3. 5-Pin SOT-23
Top View
V
-
8
2
-
2
+
+IN
1
3
4
+
7
6
5
N/C
OUT A
+
-IN A
OUT
+IN A
V
N/C
Figure 4. 8-Pin SOIC
Top View
V
-
1
8
A
2
3
7
B
+
+
V
+
5
1
4
6
-
OUT
5
+
V
OUT B
-IN B
+IN B
Figure 5. 8-Pin VSSOP/SOIC
Top View
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Typical Performance Characteristics
Unless otherwise specified: TA = 25°C.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
10
VOUT from V (V)
1
+
VOUT from V (V)
VS = 2.7V
125°C
85°C
0.1
VS = 2.7V
1
125°C
85°C
0.1
25°C
25°C
-40°C
0.01
0.1
-40°C
1
10
0.01
0.1
100
1
ISOURCE (mA)
Figure 6.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
VOUT from V (V)
VS = ±5V
1
+
100
Figure 7.
10
VOUT from V (V)
10
ISINK (mA)
125°C
85°C
0.1
VS = ±5V
1
125°C
0.1
85°C
25°C
25°C
-40°C
-40°C
0.01
0.1
1
10
0.01
0.1
100
1
ISOURCE (mA)
100
ISINK (mA)
Figure 8.
Figure 9.
Output Swing vs. Sourcing Current
Output Swing vs. Sinking Current
10
10
VS = ±15V
VOUT from V (V)
VS = ±15V
1
+
VOUT from V (V)
10
125°C
85°C
0.1
25°C
1
125°C
0.1
85°C
-40°C
25°C
-40°C
0.01
0.1
1
10
100
0.01
0.1
ISOURCE (mA)
10
100
ISINK (mA)
Figure 10.
8
1
Figure 11.
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SNOSAW8D – MAY 2008 – REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS Distribution
VOS vs. VCM (Unit 1)
-0.5
12
VS = ±5V
10
-0.9
-1.1
8
VOS (mV)
PERCENTAGE (%)
VS = 2.7V
-0.7
6
4
-40°C
-1.3
-1.5
25°C
-1.7
85°C
-1.9
-2.1
2
125°C
-2.3
0
-2.5
-2
-3
-1
0
1
2
3
-1
0
1
2
VOS (mV)
VCM (V)
Figure 12.
Figure 13.
VOS vs. VCM (Unit 2)
3
4
3
4
VOS vs. VCM (Unit 3)
0
-0.5
VS = 2.7V
VS = 2.7V
-0.7
-0.1
-40°C
-0.9
-0.2
VOS (mV)
VOS (mV)
-1.1
-0.3
85°C
-0.4
-40°C
-0.5
125°C
-0.6
-0.8
-1
-1.7
85°C
-2.1
125°C
125°C
-2.3
-40°C
0
25°C
-1.5
-1.9
25°C
-0.7
-1.3
1
2
3
-2.5
4
-1
0
1
2
VCM (V)
VCM (V)
Figure 14.
Figure 15.
VOS vs. VCM (Unit 1)
VOS vs. VCM (Unit 2)
-1
-0.3
VS = ±5V
VS = ±5V
-1.25
-0.4
-40°C
85°C
VOS (mV)
VOS (mV)
-1.5
25°C
-1.75
85°C
-0.5
-40°C
-0.6
125°C
-2
125°C
-0.7
-2.25
-2.5
-6
-4
25°C
-2
0
2
4
6
-0.8
-6
-4
-2
0
VCM (V)
VCM (V)
Figure 16.
Figure 17.
0
4
6
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS vs. VCM (Unit 2)
VOS vs. VCM (Unit 1)
-0.5
-1
VS = ±15V
VS = ±5V
-0.75
-40°C
-1.25
VOS (mV)
VOS (mV)
-1.25
-40°C
-1
25°C
-1.5
-1.75
-1.5
25°C
-1.75
85°C
85°C
125°C
-2
-2
125°C
-2.25
-2.5
-6
-4
-2
2
0
4
-2.25
-20 -15 -10
6
VCM (V)
Figure 19.
10
15
20
VOS vs. VCM (Unit 3)
-0.5
VS = ±15V
-0.7
-0.2
VS = ±15V
-0.9
-40°C
125°C
85°C
-0.3
-1.1
-0.4
VOS (mV)
VOS (mV)
5
Figure 18.
VOS vs. VCM (Unit 2)
25°C
-0.5
-40°C
-0.6
-1.3
25°C
-1.5
-1.7
-0.7
-1.9
-0.8
-2.1
-0.9
85°C
125°C
-2.3
-1
-20 -15
-10
-5
0
5
10
15
-2.5
-20 -15
20
-10
-5
VCM (V)
10
15
20
35
40
VOS vs. VS (Unit 2)
0
VCM = V +0.5V
-40°C
-1.3
5
Figure 21.
VOS vs. VS (Unit 1)
-1.1
0
VCM (V)
Figure 20.
VCM = V +0.5V
-0.1
-1.5
-0.2
25°C
VOS (mV)
VOS (mV)
0
VCM (V)
0
-0.1
-5
-1.7
-1.9
85°C
125°C
-2.1
-0.3
-0.4
85°C
25°C
-0.5
-2.3
-40°C
-0.6
125°C
-2.5
-0.7
0
10
20
30
40
0
10
15
20
25
30
VS (V)
VS (V)
Figure 22.
10
5
Figure 23.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
VOS vs. VS (Unit 3)
VOS vs. VS (Unit 1)
-1
0
VCM = V +0.5V
+
VCM = V -0.5V
-1.2
-0.5
VOS (mV)
VOS (mV)
-40°C
-1
25°C
-1.5
-40°C
-1.4
-1.6
25°C
85°C
-2
85°C
-1.8
125°C
125°C
-2
-2.5
0
5
10
15
20
25
30
35
0
40
5
10
15
20
VS (V)
Figure 24.
35
40
VOS vs. VS (Unit 3)
-1
+
VCM = V+ -0.5V
VCM = V -0.5V
-0.1
30
Figure 25.
VOS vs. VS (Unit 2)
0
25
VS (V)
-1.2
-0.2
-40°C
-1.4
-0.4
VOS (mV)
VOS (mV)
-0.3
85°C
-0.5
125°C
-0.6
-1.6
25°C
-1.8
-0.7
25°C
-0.8
-2.2
-1
0
5
10
15
20
25
30
85°C
-2
-40°C
-0.9
35
40
125°C
5
0
10
15
20
25
30
35
40
VS (V)
VS (V)
Figure 26.
Figure 27.
IBIAS vs. VCM
IBIAS vs. VCM
1
1
VS = 2.7V
-40°C
VS = ±5V
25°C
0.5
0.5
IBAIS (PA)
IBIAS (PA)
85°C 125°C
0
-0.5
0
-0.5
125°C
-1
85°C
25°C
-1
-1.5
0
0.5
1
1.5
2
2.5
3
-1.5
-5
-40°C
-3
-1
1
VCM (V)
VCM (V)
Figure 28.
Figure 29.
3
5
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IBIAS vs. VCM
IBIAS vs. VS
-1
1
VCM = V +0.5V
VS = ±15V
-1.1
0.5
85°C
125°C
0
IBIAS (PA)
IBIAS (PA)
-1.2
-0.5
-40°C
-1.4
85°C
125°C
25°C
-1.3
-1
-1.5
-1.5
-15
-40°C
25°C
-10
-5
-1.6
0
5
10
0
15
5
10
15
VCM (V)
Figure 30.
VS = 2.7V
40
125°C
1.4
85°C
-40°C
1.2
0.55
0.5
IS (mA)
IBIAS (PA)
1.6
25°C
25°C
1
0.8
-40°C
85°C
0.45
0.6
125°C
0.4
0.4
0.35
0.2
0.3
0
10
20
30
0
-1
40
0
1
VS (V)
2
3
4
VCM (V)
Figure 32.
Figure 33.
IS vs. VCM (LM7322)
IS vs. VCM (LM7321)
3.5
2
125°C
1.8
3
VS = ±5V
1.6
85°C
2.5
1.4
25°C
2
IS (mA)
IS (mA)
35
IS vs. VCM (LM7321)
+
0.6
30
1.8
VCM = V -0.5V
0.65
25
Figure 31.
IBIAS vs. VS
0.7
20
VS (V)
-40°C
1.5
1.2
125°C
85°C
1
25°C
0.8
0.6
1
-40°C
0.4
0.5
0.2
VS = 2.7V
0
-1
0
1
2
3
4
0
-6
VCM (V)
-2
0
2
4
6
VCM (V)
Figure 34.
12
-4
Figure 35.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IS vs. VCM (LM7322)
IS vs. VCM (LM7321)
4
2.5
VS = ±5V
VS = ±15V
3.5
2
3
125°C
IS (mA)
IS (mA)
2.5
85°C
2
25°C
1.5
1.5
125°C
85°C
1
25°C
-40°C
1
-40°C
0.5
0.5
0
-6
-4
-2
2
0
4
0
-20 -15 -10
6
-5
VCM (V)
Figure 36.
VS = ±15V
3.5
20
VCM = V +0.5V
125°C
1.2
3
85°C
1
25°C
IS (mA)
IS (mA)
15
-
1.4
85°C
2
10
IS vs. VS (LM7321)
1.6
4
2.5
5
Figure 37.
IS vs. VCM (LM7322)
4.5
0
VCM (V)
25°C
25°C
0.8
-40°C
0.6
1.5
-40°C
0.4
1
0.2
0.5
0
-20 -15 -10
-5
0
5
10
15
0
20
0
5
10
15
VCM (V)
25
20
30
30
40
VS (V)
Figure 38.
Figure 39.
IS vs. VS (LM7322)
IS vs. VS (LM7321)
2.5
4.5
+
VCM = V -0.5V
4
2
125°C
3.5
85°C
125°C
85°C
25°C
2.5
IS (mA)
IS (mA)
3
-40°C
2
1.5
25°C
1
-40°C
1.5
1
0.5
0.5
0
+
VCM = V -0.5V
0
5
10
15
20
25
30
35
40
0
0
5
10
15
20
25
30
35
40
VS (V)
VS (V)
Figure 40.
Figure 41.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
IS vs. VS (LM7322)
Positive Output Swing vs. Supply Voltage
3
0.3
85°C
RL = 2 k:
125°C
2.5
125°C
0.25
85°C
25°C
1.5
-40°C
1
0.2
-40°C
0.15
0.1
0.05
0.5
0
25°C
VOUT from RAIL (V)
IS (mA)
2
VCM = V +0.5V
5
0
10
15
20
25
30
35
0
40
0
10
20
VS (V)
Figure 42.
40
Figure 43.
Positive Output Swing vs. Supply Voltage
Negative Output Swing vs. Supply Voltage
0.16
0.16
125°C
RL = 10 k:
30
VS (V)
RL = 2 k:
125°C
0.14
0.14
0.12
VOUT from RAIL (V)
85°C
0.1
25°C
0.08
-40°C
0.06
0.04
0.12
25°C
0.1
-40°C
0.08
0.06
0.04
0.02
0.02
0
0
5
10
15
20
25
30
35
0
40
0
10
20
VS (V)
30
Figure 44.
Figure 45.
Negative Output Swing vs. Supply Voltage
Open Loop Frequency Response with Various Capacitive
Load
0.07
140
158
VS = r15V
RL = 10 M: 135
RL = 10 k:
0.06
120
125°C
100
0.05
85°C
0.04
GAIN (dB)
VOUT from RAIL (V)
40
VS (V)
25°C
0.03
-40°C
PHASE
80
60
10
20
30
40
90
68
20 pF
40
45
50 pF
100 pF
200 pF
0
0
100 pF
50 pF
GAIN
20
0
113
200 pF
500 pF
0.02
0.01
1000 pF
23
0
500 pF
1000 pF
-20
1k
10k
100k
PHASE (q)
VOUT from RAIL (V)
85°C
1M
10M
-23
100M
VS (V)
FREQUENCY (Hz)
Figure 46.
14
Figure 47.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
Open Loop Frequency Response with Various Resistive
Load
120
PHASE
120
113
100
600:
100
140
158
VS = r15V
CL = 20 pF 135
158
RL = 2 k:
CL = 20 pF 135
PHASE
113
VS = 30V
90
10 k:
60
68
GAIN
40
100 k:
2 k:
600:
20
45
10 M:
0
-20
1k
10k
100k
1M
80
GAIN
40
20
0
0
68
VS = 30V
45
VS = 2.7V
23
0
VS = 10V
-20
1k
10k
100k
1M
10M
-23
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 48.
Figure 49.
Phase Margin vs. Capacitive Load
CMRR vs. Frequency
100
70
VS = ±15V
90
60
RL = 600:
80
50
70
RL = 2 k:
CMRR (dB)
PHASE MARGIN (°)
90
VS = 10V
VS = 2.7V
60
23
-23
100M
10M
GAIN (dB)
80
PHASE (q)
GAIN (dB)
2 k:
PHASE (q)
140
Open Loop Frequency Response with Various Supply
Voltage
40
30
RL = 10 M:, 10 k:, 100 k:
60
50
40
30
20
20
10
10
VS = ±15V
0
10
0
10
1000
100
10k
1k
CAPACITIVE LOAD (pF)
FREQUENCY (Hz)
Figure 50.
Figure 51.
100
VS = 2.7V
VCM = 2V
80
VS = 10V
VCM = 8V
-PSRR (dB)
80
1M
VS = 30V
90
VCM = 0.7V
100
100k
−PSRR vs. Frequency
+PSRR vs. Frequency
120
+PSRR (dB)
100
VS = 30V
60 VCM = 28V
40
70 VS = 10V
VCM = 2V
60
50
VS = 2.7V
VCM = 2V
40
30
20
20
10
0
10
100
1k
10k
100k
1M
0
10
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 52.
Figure 53.
100k
1M
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
Small Signal Step Response
Large Signal Step Response
12,200 pF
VS = ±5V
1000 pF
AV = +1
8,600 pF
100 mV/DIV
750 pF
VS = ±15V, AV = +1
25V/DIV
500 pF
330 pF
2,200 pF
100 pF
10 pF
10 pF
INPUT
INPUT
200 ns/DIV
5 Ps/DIV
Figure 54.
Figure 55.
Input Referred Noise Density vs. Frequency
1000
Input Referred Noise Density vs. Frequency
1000
100
100
VOLTAGE
1
10
CURRENT
1
1
10
100
1k
10k
VOLTAGE NOISE (nV Hz)
10
CURRENT NOISE (pA/ Hz)
VOLTAGE NOISE (nV Hz)
100
100
10
CURRENT
VOLTAGE
1
10
0.1
100k
1
1
10
FREQUENCY (Hz)
100
1k
10k
CURRENT NOISE (pA/ Hz)
VS = ±5V
VS = 2.7V
0.1
100k
FREQUENCY (Hz)
Figure 56.
Figure 57.
Input Referred Noise Density vs. Frequency
1000
THD+N vs. Frequency
100
0
AV = +2
VS = ±15V
10
CURRENT
VOLTAGE
1
10
RL = 100 k:
-20
THD+N (dB)
100
CURRENT NOISE (pA/ Hz)
VOLTAGE NOISE (nV Hz)
-10 VIN = 520 mVPP
-30
-40
-50
VS = 2.7V, VCM = 0.8V
-60
-70
1
1
10
100
1k
10k
0.1
100k
VS = ±15V
-80
10
FREQUENCY (Hz)
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 58.
16
VS = ±5V
Figure 59.
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Typical Performance Characteristics (continued)
Unless otherwise specified: TA = 25°C.
THD+N vs. Output Amplitude
0
THD+N vs. Output Amplitude
0
VS = 2.7V
VS = ±5V
-10 f = 1 kHz
-10 VCM = 0.8V
-20
f = 1 kHz
-20
-30 A = +2
V
-30
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
0.001
RL = 100 k:
AV = +2
THD+N (dB)
THD+N (dB)
RL = 100 k:
0.01
0.1
1
-90
0.001
10
0.01
Figure 60.
THD+N vs. Output Amplitude
Crosstalk Rejection vs. Frequency
90
CROSSTALK REJECTION (dB)
VS = ±15V
-10 f = 1 kHz
RL = 100 k:
AV = +2
-30
THD+N (dB)
100
Figure 61.
0
-40
-50
-60
-70
-80
-90
0.001
10
OUTPUT AMPLITUDE (VPP)
OUTPUT AMPLITUDE (VPP)
-20
1
0.1
80
70
VS = ±15V
60
50
VS = ±5V
40
+
V = 1.8V
30
VCM = 0.9V
20
10
0.01
0.1
1
10
100
0
1k
OUTPUT AMPLITUDE (VPP)
Figure 62.
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 63.
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APPLICATION INFORMATION
DRIVING CAPACITIVE LOADS
The LM7321/LM7321Q/LM7322/LM7322Q are specifically designed to drive unlimited capacitive loads without
oscillations as shown in Figure 64.
Figure 64. ±5% Settling Time vs. Capacitive Load
In addition, the output current handling capability of the device allows for good slewing characteristics even with
large capacitive loads as shown in Figure 65 and Figure 66.
Figure 65. +SR vs. Capacitive Load
18
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Figure 66. −SR vs. Capacitive Load
The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter input
amplifiers, etc.
However, as in most op amps, addition of a series isolation resistor between the op amp and the capacitive load
improves the settling and overshoot performance.
Output current drive is an important parameter when driving capacitive loads. This parameter will determine how
fast the output voltage can change. Referring to the Slew Rate vs. Capacitive Load Plots (Typical Performance
Characteristics section), two distinct regions can be identified. Below about 10,000 pF, the output Slew Rate is
solely determined by the op amp’s compensation capacitor value and available current into that capacitor.
Beyond 10 nF, the Slew Rate is determined by the op amp’s available output current. Note that because of the
lower output sourcing current compared to the sinking one, the Slew Rate limit under heavy capacitive loading is
determined by the positive transitions. An estimate of positive and negative slew rates for loads larger than 100
nF can be made by dividing the short circuit current value by the capacitor.
For the LM7321/LM7321Q/LM7322/LM7322Q, the available output current increases with the input overdrive.
Referring to Figure 67 and Figure 68, Output Short Circuit Current vs. Input Overdrive, it can be seen that both
sourcing and sinking short circuit current increase as input overdrive increases. In a closed loop amplifier
configuration, during transient conditions while the fed back output has not quite caught up with the input, there
will be an overdrive imposed on the input allowing more output current than would normally be available under
steady state condition. Because of this feature, the op amp’s output stage quiescent current can be kept to a
minimum, thereby reducing power consumption, while enabling the device to deliver large output current when
the need arises (such as during transients).
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Figure 67. Output Short Circuit Sourcing Current vs. Input Overdrive
Figure 68. Output Short Circuit Sinking Current vs. Input Overdrive
Figure 69 shows the output voltage, output current, and the resulting input overdrive with the device set for AV =
+1 and the input tied to a 1 VPP step function driving a 47 nF capacitor. As can be seen, during the output
transition, the input overdrive reaches 1V peak and is more than enough to cause the output current to increase
to its maximum value (see Figure 67 and Figure 68 plots). Note that because of the larger output sinking current
compared to the sourcing one, the output negative transition is faster than the positive one.
20
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Figure 69. Buffer Amplifier Scope Photo
ESTIMATING THE OUTPUT VOLTAGE SWING
It is important to keep in mind that the steady state output current will be less than the current available when
there is an input overdrive present. For steady state conditions, the Output Voltage vs. Output Current plot
(Typical Performance Characteristics section) can be used to predict the output swing. Figure 70 and Figure 71
show this performance along with several load lines corresponding to loads tied between the output and ground.
In each cases, the intersection of the device plot at the appropriate temperature with the load line would be the
typical output swing possible for that load. For example, a 1 kΩ load can accommodate an output swing to within
250 mV of V− and to 330 mV of V+ (VS = ±15V) corresponding to a typical 29.3 VPP unclipped swing.
Figure 70. Output Sourcing Characteristics with Load Lines
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Figure 71. Output Sinking Characteristics with Load Lines
SETTLING TIME WITH LARGE CAPACITIVE LOADS
Figure 72 below shows a typical application where the LM7321/LM7321Q/LM7322/LM7322Q is used as a buffer
amplifier for the VCOM signal employed in a TFT LCD flat panel:
Figure 72. VCOM Driver Application Schematic
Figure 73 shows the time domain response of the amplifier when used as a VCOM buffer/driver with VREF at
ground. In this application, the op amp loop will try and maintain its output voltage based on the voltage on its
non-inverting input (VREF) despite the current injected into the TFT simulated load. As long as this load current is
within the range tolerable by the LM7321/LM7321Q/LM7322/LM7322Q (45 mA sourcing and 65 mA sinking for
±5V supplies), the output will settle to its final value within less than 2 μs.
22
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SNOSAW8D – MAY 2008 – REVISED MARCH 2013
Figure 73. VCOM Driver Performance Scope Photo
OUTPUT SHORT CIRCUIT CURRENT AND DISSIPATION ISSUES
The LM7321/LM7321Q/LM7322/LM7322Q output stage is designed for maximum output current capability. Even
though momentary output shorts to ground and either supply can be tolerated at all operating voltages, longer
lasting short conditions can cause the junction temperature to rise beyond the absolute maximum rating of the
device, especially at higher supply voltage conditions. Below supply voltage of 6V, the output short circuit
condition can be tolerated indefinitely.
With the op amp tied to a load, the device power dissipation consists of the quiescent power due to the supply
current flow into the device, in addition to power dissipation due to the load current. The load portion of the
power itself could include an average value (due to a DC load current) and an AC component. DC load current
would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the op amp
operates in a single supply application where the output is maintained somewhere in the range of linear
operation.
Therefore:
PTOTAL = PQ + PDC + PAC
PQ = IS · VS
Op Amp Quiescent Power Dissipation
PDC = IO · (Vr - Vo)
DC Load Power
PAC = See Table 1
AC Load Power
where:
IS: Supply Current
VS: Total Supply Voltage (V+ − V−)
VO: Average Output Voltage
Vr: V+ for sourcing and V− for sinking current
Table 1 shows the maximum AC component of the load power dissipated by the op amp for standard Sinusoidal,
Triangular, and Square Waveforms:
Table 1. Normalized AC Power Dissipated in the Output Stage for Standard Waveforms
PAC (W.Ω/V2)
Sinusoidal
−3
50.7 x 10
Triangular
−3
46.9 x 10
Square
62.5 x 10−3
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The table entries are normalized to VS2/RL. To figure out the AC load current component of power dissipation,
simply multiply the table entry corresponding to the output waveform by the factor VS2/RL. For example, with
±12V supplies, a 600Ω load, and triangular waveform power dissipation in the output stage is calculated as:
PAC = (46.9 x 10−3) · (242/600) = 45.0 mW
(1)
The maximum power dissipation allowed at a certain temperature is a function of maximum die junction
temperature (TJ(MAX)) allowed, ambient temperature TA, and package thermal resistance from junction to ambient,
θJA.
TJ(MAX) - TA
PD(MAX) =
TJA
(2)
For the LM7321/LM7321Q/LM7322/LM7322Q, the maximum junction temperature allowed is 150°C at which no
power dissipation is allowed. The power capability at 25°C is given by the following calculations:
For VSSOP package:
PD(MAX) =
150°C ± 25°C
= 0.53W
235°C/W
(3)
For SOIC package:
PD(MAX) =
150°C ± 25°C
= 0.76W
165°C/W
(4)
Similarly, the power capability at 125°C is given by:
For VSSOP package:
PD(MAX) =
150°C ± 125°C
= 0.11W
235°C/W
(5)
For SOIC package:
PD(MAX) =
150°C ± 125°C
= 0.15W
165°C/W
(6)
Figure 74 shows the power capability vs. temperature for VSSOP and SOIC packages. The area under the
maximum thermal capability line is the operating area for the device. When the device works in the operating
area where PTOTAL is less than PD(MAX), the device junction temperature will remain below 150°C. If the
intersection of ambient temperature and package power is above the maximum thermal capability line, the
junction temperature will exceed 150°C and this should be strictly prohibited.
1.4
POWER CAPABILITY (W)
1.2
M
1
ax
im
um
0.8
Ma
0.6
um
0.4
0.2
th
e
the
rm
al
ca
Operating area
0
-40 -20 0
rm
al
xi m
pa
bil
ca
p
ity
ab
lin
i li t
y
e(
li n
e
(S
O
IC
)
MS
OP
)
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
Figure 74. Power Capability vs. Temperature
When high power is required and ambient temperature can't be reduced, providing air flow is an effective
approach to reduce thermal resistance therefore to improve power capability.
24
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Other Application Hints
The use of supply decoupling is mandatory in most applications. As with most relatively high speed/high output
current Op Amps, best results are achieved when each supply line is decoupled with two capacitors; a small
value ceramic capacitor (∼0.01 μF) placed very close to the supply lead in addition to a large value Tantalum or
Aluminum (> 4.7 μF). The large capacitor can be shared by more than one device if necessary. The small
ceramic capacitor maintains low supply impedance at high frequencies while the large capacitor will act as the
charge "bucket" for fast load current spikes at the op amp output. The combination of these capacitors will
provide supply decoupling and will help keep the op amp oscillation free under any load.
SIMILAR HIGH OUTPUT DEVICES
The LM7332 is a dual rail-to-rail amplifier with a slightly lower GBW capable of sinking and sourcing 100 mA. It is
available in SOIC and VSSOP packages.
The LM4562 is dual op amp with very low noise and 0.7 mV voltage offset.
The LME49870 and LME49860 are single and dual low noise amplifiers that can work from ±22 volt supplies.
OTHER HIGH PERFORMANCE SOT-23 AMPLIERS
The LM7341 is a 4 MHz rail-to-rail input and output part that requires only 0.6 mA to operate, and can drive
unlimited capacitive load. It has a voltage gain of 97 dB, a CMRR of 93 dB, and a PSRR of 104 dB.
The LM6211 is a 20 MHz part with CMOS input, which runs on ±12 volt or 24 volt single supplies. It has rail-torail output and low noise.
The LM7121 has a gain bandwidth of 235 MHz.
Detailed information on these parts can be found at www.ti.com.
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SNOSAW8D – MAY 2008 – REVISED MARCH 2013
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REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
•
26
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 25
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM7321MA/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
1MA
LM7321MAX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
1MA
LM7321MF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AU4A
LM7321MFE/NOPB
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AU4A
LM7321MFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AU4A
LM7321QMF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AR8A
LM7321QMFE/NOPB
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AR8A
LM7321QMFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AR8A
LM7322MA/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
2MA
LM7322MAX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
2MA
LM7322MM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AZ4A
LM7322MME/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AZ4A
LM7322MMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
AZ4A
LM7322QMA/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
2QMA
LM7322QMAX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM732
2QMA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM7321, LM7321-Q1, LM7322, LM7322-Q1 :
• Catalog: LM7321, LM7322
• Automotive: LM7321-Q1, LM7322-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM7321MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM7321MF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7321MFE/NOPB
SOT-23
DBV
5
250
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7321MFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7321QMF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7321QMFE/NOPB
SOT-23
DBV
5
250
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7321QMFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM7322MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM7322MM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM7322MME/NOPB
VSSOP
DGK
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM7322MMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM7322QMAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM7321MAX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM7321MF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM7321MFE/NOPB
SOT-23
DBV
5
250
210.0
185.0
35.0
LM7321MFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LM7321QMF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM7321QMFE/NOPB
SOT-23
DBV
5
250
210.0
185.0
35.0
LM7321QMFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LM7322MAX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM7322MM/NOPB
VSSOP
DGK
8
1000
210.0
185.0
35.0
LM7322MME/NOPB
VSSOP
DGK
8
250
210.0
185.0
35.0
LM7322MMX/NOPB
VSSOP
DGK
8
3500
367.0
367.0
35.0
LM7322QMAX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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